Circuitized substrate with conductive polymer and seed material adhesion layer
    1.
    发明授权
    Circuitized substrate with conductive polymer and seed material adhesion layer 失效
    导电聚合物和种子材料粘附层的电路基板

    公开(公告)号:US07332212B2

    公开(公告)日:2008-02-19

    申请号:US11242841

    申请日:2005-10-05

    IPC分类号: B32B3/00 H05K1/02

    摘要: A method of making a circuitized substrate such as a laminate chip carrier in which a polymer, e.g., Teflon, is used as a dielectric layer and a promotion adhesion layer of a polymer is used to securely adhere a conductive layer thereto which is deposited by plating. The resulting product is thus able to provide extremely narrow conductive circuitry for subsequent connections, e.g., to a semiconductor chip. Electroless plating is the preferred plating method with the dielectric immersed in a solution of conductive monomers, e.g., pyrrole monomer, the solution also possibly containing a seed material such as palladium-tin.

    摘要翻译: 使用诸如聚四氟乙烯等聚合物作为电介质层和聚合物的促进粘附层的层叠芯片载体的电路化基板的制造方法,可靠地将导电层附着在电镀层上 。 因此,所得到的产品能够为后续连接提供极窄的导电电路,例如提供给半导体芯片。 无电镀是将电介质浸入导电单体例如吡咯单体的溶液中的优选电镀方法,该溶液也可能含有种子材料如钯 - 锡。

    Treating copper surfaces for electronic applications
    2.
    发明授权
    Treating copper surfaces for electronic applications 失效
    处理电子应用的铜表面

    公开(公告)号:US06962642B2

    公开(公告)日:2005-11-08

    申请号:US10255456

    申请日:2002-09-26

    IPC分类号: B32B15/08 H05K3/38 B32B31/12

    摘要: A process by which high frequency printed wiring board construction can be fabricated using smooth copper surfaces. A conductive, thin film polymer is plated on smooth copper surfaces of a core lamination. The polymer can be selected from a group of materials consisting of polypyrrole, polyaniline, polythiophene, and combinations thereof. The conductive polymer promotes adhesion between the resin polymer of the laminate and the smooth copper surfaces.

    摘要翻译: 可以使用光滑的铜表面制造高频印刷线路板结构的方法。 将导电薄膜聚合物镀在芯片层压的光滑铜表面上。 聚合物可以选自由聚吡咯,聚苯胺,聚噻吩及其组合组成的一组材料。 导电聚合物促进层压体的树脂聚合物与光滑的铜表面之间的粘附。

    Colloidal seed formation for printed circuit board metallization
    3.
    发明申请
    Colloidal seed formation for printed circuit board metallization 审中-公开
    用于印刷电路板金属化的胶体种子形成

    公开(公告)号:US20050042383A1

    公开(公告)日:2005-02-24

    申请号:US10939735

    申请日:2004-09-13

    IPC分类号: C23C18/28 H05K3/18 B05D1/18

    CPC分类号: C23C18/28 H05K3/181

    摘要: A colloidal metal seed formulation useful for catalytically activating a surface of a non-conductive dielectric substrate in an electroless plating process is provided. The colloidal metal seed formulation includes stannous chloride, palladium chloride, HCl and a surfactant selected from a diphenyloxide disulfonic acid or alkali or alkaline earth metal salt thereof, C30H50O10, an alcohol alkoxylate and mixtures thereof. A method of electroless plating of a conductive metal onto a non-conductive dielectric substrate using the colloidal metal seed formulation is also provided.

    摘要翻译: 提供了一种用于在非电镀过程中催化活化非导电电介质基片的表面的胶态金属种子制剂。 胶体金属种子制剂包括氯化亚锡,氯化钯,HCl和选自二苯氧基二磺酸或其碱金属或碱土金属盐,C30H50O10,醇烷氧基化物及其混合物的表面活性剂。 还提供了使用胶体金属种子制剂将导电金属化学镀在非导电电介质基底上的方法。

    Printed wiring board with conformally plated circuit traces
    4.
    发明授权
    Printed wiring board with conformally plated circuit traces 失效
    印刷电路板,带有电镀电路迹线

    公开(公告)号:US06815126B2

    公开(公告)日:2004-11-09

    申请号:US10119489

    申请日:2002-04-09

    IPC分类号: G03F700

    摘要: A PWB or multilayer board with circuit traces is treated by a process that serves to reduce the incident of failure of the board. The process includes the steps of applying a thin commoning layer of copper onto a catalyzed surface of the board substrate and the circuit lines. A photoresist is then applied over the commoning layer after which the photoresist is removed only from the commoning material over the circuit lines. A thin layer of a more noble metal, such as nickel, is electrodeposited over the exposed conductive layer. This is followed by a gold layer electrodeposited over the nickel in close registry therewith. The process provides the traces with a conforming nickel/gold layer that extends down the side of the traces. This reduces the tendency of a subsequent copper etch step from undercutting the nickel/gold, thereby causing slivers that could cause short circuiting between adjacent circuit patterns.

    摘要翻译: 具有电路迹线的PWB或多层板被用于减少电路板故障事故的过程来处理。 该方法包括以下步骤:将铜的薄共同层施加到板基板和电路线的催化表面上。 然后将光致抗蚀剂施加在共用层上,之后仅通过电路线从普通材料除去光致抗蚀剂。 更贵的金属如镍的薄层电沉积在暴露的导电层上。 之后是电沉积在镍上的金层与其紧密对准。 该工艺为痕迹提供了沿着迹线侧面延伸的一致的镍/金层。 这降低了随后的铜蚀刻步骤从底切镍/金的趋势,从而导致可能导致相邻电路图案之间短路的条子。

    Circuitized substrate and method of making same
    5.
    发明申请
    Circuitized substrate and method of making same 失效
    电路基板及其制作方法

    公开(公告)号:US20060029781A1

    公开(公告)日:2006-02-09

    申请号:US11242841

    申请日:2005-10-05

    IPC分类号: B32B3/00

    摘要: A method of making a circuitized substrate such as a laminate chip carrier in which a polymer, e.g., Teflon, is used as a dielectric layer and a promotion adhesion layer of a polymer is used to securely adhere a conductive layer thereto which is deposited by plating. The resulting product is thus able to provide extremely narrow conductive circuitry for subsequent connections, e.g., to a semiconductor chip. Electroless plating is the preferred plating method with the dielectric immersed in a solution of conductive monomers, e.g., pyrrole monomer, the solution also possibly containing a seed material such as palladium-tin.

    摘要翻译: 使用诸如聚四氟乙烯等聚合物作为电介质层和聚合物的促进粘附层的层叠芯片载体的电路化基板的制造方法,可靠地将导电层附着在电镀层上 。 因此,所得到的产品能够为后续连接提供极窄的导电电路,例如提供给半导体芯片。 无电镀是将电介质浸入导电单体例如吡咯单体的溶液中的优选电镀方法,该溶液也可能含有种子材料如钯 - 锡。

    Method of making a printed wiring board with conformally plated circuit traces
    6.
    发明申请
    Method of making a printed wiring board with conformally plated circuit traces 有权
    制造具有保形电路迹线的印刷电路板的方法

    公开(公告)号:US20050058945A1

    公开(公告)日:2005-03-17

    申请号:US10969684

    申请日:2004-10-20

    摘要: A PWB or multilayer board with circuit traces is treated by a process that serves to reduce the incident of failure of the board. The process includes the steps of applying a thin commoning layer of copper onto a catalyzed surface of the board substrate and the circuit lines. A photoresist is then applied over the commoning layer after which the photoresist is removed only from the commoning material over the circuit lines. A thin layer of a more noble metal, such as nickel, is electrodeposited over the exposed conductive layer. This is followed by a gold layer electrodeposited over the nickel in close registry therewith. The process provides the traces with a conforming nickel/gold layer that extends down the side of the traces. This reduces the tendency of a subsequent copper etch step from undercutting the nickel/gold, thereby causing slivers that could cause short circuiting between adjacent circuit patterns.

    摘要翻译: 具有电路迹线的PWB或多层板被用于减少电路板故障事故的过程来处理。 该方法包括以下步骤:将铜的薄共同层施加到板基板和电路线的催化表面上。 然后将光致抗蚀剂施加在共用层上,之后仅通过电路线从普通材料除去光致抗蚀剂。 更贵的金属如镍的薄层电沉积在暴露的导电层上。 之后是电沉积在镍上的金层与其紧密对准。 该工艺为痕迹提供了沿着迹线侧面延伸的一致的镍/金层。 这降低了随后的铜蚀刻步骤从底切镍/金的趋势,从而导致可能导致相邻电路图案之间短路的条子。

    Circuitized substrate and method of making same
    7.
    发明申请
    Circuitized substrate and method of making same 失效
    电路基板及其制作方法

    公开(公告)号:US20050039840A1

    公开(公告)日:2005-02-24

    申请号:US10643909

    申请日:2003-08-20

    摘要: A method of making a circuitized substrate such as a laminate chip carrier in which a polymer, e.g., Teflon, is used as a dielectric layer and a promotion adhesion layer of a polymer is used to securely adhere a conductive layer thereto which is deposited by plating. The resulting product is thus able to provide extremely narrow conductive circuitry for subsequent connections, e.g., to a semiconductor chip. Electroless plating is the preferred plating method with the dielectric immersed in a solution of conductive monomers, e.g., pyrrole monomer, the solution also possibly containing a seed material such as palladium-tin.

    摘要翻译: 使用诸如聚四氟乙烯等聚合物作为电介质层和聚合物的促进粘附层的层叠芯片载体的电路化基板的制造方法,可靠地将导电层附着在电镀层上 。 因此,所得到的产品能够为后续连接提供极窄的导电电路,例如提供给半导体芯片。 无电镀是将电介质浸入导电单体例如吡咯单体的溶液中的优选电镀方法,该溶液也可能含有种子材料如钯 - 锡。

    Method of making a printed wiring board with conformally plated circuit traces
    9.
    发明授权
    Method of making a printed wiring board with conformally plated circuit traces 有权
    制造具有保形电路迹线的印刷电路板的方法

    公开(公告)号:US07378227B2

    公开(公告)日:2008-05-27

    申请号:US10969684

    申请日:2004-10-20

    IPC分类号: G03F7/00

    摘要: A PWB or multilayer board with circuit traces is treated by a process that serves to reduce the incident of failure of the board. The process includes the steps of applying a thin commoning layer of copper onto a catalyzed surface of the board substrate and the circuit lines. A photoresist is then applied over the commoning layer after which the photoresist is removed only from the commoning material over the circuit lines. A thin layer of a more noble metal, such as nickel, is electrodeposited over the exposed conductive layer. This is followed by a gold layer electrodeposited over the nickel in close registry therewith. The process provides the traces with a conforming nickel/gold layer that extends down the side of the traces. This reduces the tendency of a subsequent copper etch step from undercutting the nickel/gold, thereby causing slivers that could cause short circuiting between adjacent circuit patterns.

    摘要翻译: 具有电路迹线的PWB或多层板被用于减少电路板故障事故的过程来处理。 该方法包括以下步骤:将铜的薄共同层施加到板基板和电路线的催化表面上。 然后将光致抗蚀剂施加在共用层上,之后仅通过电路线从普通材料除去光致抗蚀剂。 更贵的金属如镍的薄层电沉积在暴露的导电层上。 之后是电沉积在镍上的金层与其紧密对准。 该工艺为痕迹提供了沿着迹线侧面延伸的一致的镍/金层。 这降低了随后的铜蚀刻步骤从底切镍/金的趋势,从而导致可能导致相邻电路图案之间短路的条子。