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    Process for Structuring Silicon
    3.
    发明申请
    Process for Structuring Silicon 审中-公开
    硅结构工艺

    公开(公告)号：US20140252564A1

    公开(公告)日：2014-09-11

    申请号：US14286581

    申请日：2014-05-23

    申请人： Bandgap Engineering, Inc.

    发明人： Brent A. Buchine ,  Faris Modawar ,  Marcie R. Black

    IPC分类号： H01L29/34

    CPC分类号： H01L29/34 ,  B81C1/00619 ,  H01L21/30604

    摘要： A process for etching a silicon-containing substrate to form structures is provided. In the process, a metal is deposited and patterned onto a silicon-containing substrate (commonly one with a resistivity above 1-10 ohm-cm) in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. The metallized substrate is submerged into an etchant aqueous solution comprising about 4 to about 49 weight percent HF and an oxidizing agent such as about 0.5 to about 30 weight percent H2O2, thus producing a metallized substrate with one or more trenches. A second silicon etch is optionally employed to remove nanowires inside the one or more trenches.

    摘要翻译： 提供了一种用于蚀刻含硅衬底以形成结构的工艺。 在该过程中，将金属沉积并图案化到含硅衬底（通常具有高于1-10欧姆 - 厘米电阻率的衬底），使得金属存在并接触需要蚀刻并被阻挡的硅 触摸硅或其他地方不存在。 将金属化衬底浸入包含约4至约49重量％的HF和氧化剂如约0.5至约30重量％的H 2 O 2的蚀刻剂水溶液中，从而产生具有一个或多个沟槽的金属化衬底。 任选地使用第二硅蚀刻来去除一个或多个沟槽内的纳米线。

    Selective emitter nanowire array and methods of making same
    5.
    发明授权
    Selective emitter nanowire array and methods of making same 有权
    选择性发射体纳米线阵列及其制作方法

    公开(公告)号：US09136410B2

    公开(公告)日：2015-09-15

    申请号：US14467029

    申请日：2014-08-24

    申请人： Bandgap Engineering, Inc.

    发明人： Faris Modawar ,  Marcie R. Black ,  Brian Murphy ,  Jeff Miller ,  Mike Jura

    IPC分类号： H01L31/00 ,  H01L31/0352 ,  H01L31/028 ,  H01L31/0288 ,  H01L31/18

    CPC分类号： H01L31/035227 ,  H01L31/02167 ,  H01L31/028 ,  H01L31/0284 ,  H01L31/0288 ,  H01L31/068 ,  H01L31/1804 ,  H01L31/1868 ,  Y10S977/762

    摘要： Another aspect of the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure including the same material as the substrate having a non-nanostructured surface of a dimension suitable for forming an electrical contact, located on the same side of the substrate as the array of silicon nanowires; wherein the contacting structure is doped with a greater impurity concentration than the nanowire array, thereby forming a selective emitter.

    摘要翻译： 本公开的另一方面涉及包括具有顶表面和底表面的基底的装置; 具有基底和顶表面的纳米线阵列，所述基底接触所述基底的顶表面; 接触结构包括与衬底相同的材料，其具有适于形成电接触的尺寸的非纳米结构化表面，位于与硅纳米线阵列相同的衬底侧; 其中所述接触结构被掺杂有比所述纳米线阵列更大的杂质浓度，由此形成选择性发射极。

    Nanostructured devices
    6.
    发明申请
    Nanostructured devices 审中-公开

    公开(公告)号：US20130247966A1

    公开(公告)日：2013-09-26

    申请号：US13902332

    申请日：2013-05-24

    申请人： Bandgap Engineering, Inc.

    发明人： Brent A. Buchine ,  Faris Modawar ,  Marcie R. Black

    IPC分类号： H01L31/0352

    CPC分类号： H01L31/035254 ,  H01L31/02363 ,  H01L31/035227 ,  H01L31/035281 ,  H01L31/068 ,  Y02E10/50

    摘要： A photovoltaic device is provided. It comprises at least two electrical contacts, p type dopants and n type dopants. It also comprises a bulk region and nanowires in an aligned array which contact the bulk region. All nanowires in the array have one predominant type of dopant, n or p, and at least a portion of the bulk region also comprises that predominant type of dopant. The portion of the bulk region comprising the predominant type of dopant typically contacts the nanowire array. The photovoltaic devices' p-n junction would then be found in the bulk region. The photovoltaic devices would commonly comprise silicon.

    SELECTIVE EMITTER NANOWIRE ARRAY AND METHODS OF MAKING SAME
    8.
    发明申请
    SELECTIVE EMITTER NANOWIRE ARRAY AND METHODS OF MAKING SAME 有权
    选择性发射体纳米阵列及其制备方法

    公开(公告)号：US20140366934A1

    公开(公告)日：2014-12-18

    申请号：US14467029

    申请日：2014-08-24

    申请人： Bandgap Engineering, Inc.

    发明人： Faris MODAWAR ,  Marcie R. BLACK ,  Brian MURPHY ,  Jeff MILLER ,  Mike JURA

    IPC分类号： H01L31/0352 ,  H01L31/028 ,  H01L31/0288 ,  H01L31/18

    CPC分类号： H01L31/035227 ,  H01L31/02167 ,  H01L31/028 ,  H01L31/0284 ,  H01L31/0288 ,  H01L31/068 ,  H01L31/1804 ,  H01L31/1868 ,  Y10S977/762

    摘要： Another aspect of the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure including the same material as the substrate having a non-nanostructured surface of a dimension suitable for forming an electrical contact, located on the same side of the substrate as the array of silicon nanowires; wherein the contacting structure is doped with a greater impurity concentration than the nanowire array, thereby forming a selective emitter.

    摘要翻译： 本公开的另一方面涉及包括具有顶表面和底表面的基底的装置; 具有基底和顶表面的纳米线阵列，所述基底接触所述基底的顶表面; 接触结构包括与衬底相同的材料，其具有适于形成电接触的尺寸的非纳米结构化表面，位于与硅纳米线阵列相同的衬底侧; 其中所述接触结构被掺杂有比所述纳米线阵列更大的杂质浓度，由此形成选择性发射极。

    SCREEN PRINTING ELECTRICAL CONTACTS TO NANOWIRE AREAS
    10.
    发明申请
    SCREEN PRINTING ELECTRICAL CONTACTS TO NANOWIRE AREAS 有权
    屏幕打印到南非地区的电气联系

    公开(公告)号：US20140332068A1

    公开(公告)日：2014-11-13

    申请号：US14338752

    申请日：2014-07-23

    申请人： BANDGAP ENGINEERING, INC.

    发明人： Michael Jura ,  Marcie R. Black ,  Jeff Miller ,  Joanne Yim ,  Joanne Forziati ,  Brian Murphy ,  Richard Chleboski

    IPC分类号： H01L31/0236 ,  H01L31/0368 ,  H01L31/18 ,  H01L31/0216 ,  H01L31/0224 ,  H01L31/0312 ,  H01L31/0376

    CPC分类号： H01L31/02363 ,  B82Y30/00 ,  H01L29/0673 ,  H01L31/02167 ,  H01L31/022425 ,  H01L31/022433 ,  H01L31/0312 ,  H01L31/035227 ,  H01L31/03682 ,  H01L31/03762 ,  H01L31/1868 ,  Y02E10/50

    摘要： A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700C, 750C, 800C, or 850C.

    摘要翻译： 提供了一种使纳米结构化表面接触的方法。 该方法可以包括（a）在表面上提供具有纳米结构材料的基材，（b）钝化纳米结构材料所在的表面，（c）丝网印刷到纳米结构表面上，和（d）将丝网印刷油墨 在高温下。 在一些实施例中，纳米结构材料损害硅。 在一些实施例中，纳米结构材料包括硅纳米线。 在一些实施方案中，纳米线长度为约150nm，250nm或400nm。 在一些实施方案中，纳米线具有在约30nm至约200nm之间的直径范围。 在一些实施例中，纳米线是锥形的，使得基部大于尖端。 在一些实施例中，纳米线以约1度，约3度或约10度的角度逐渐变细。 在一些实施方案中，高温可以为约700℃，750℃，800℃或850℃。