High Q-factor oscillator circuit
    1.
    发明授权
    High Q-factor oscillator circuit 有权
    高Q因子振荡电路

    公开(公告)号:US06144264A

    公开(公告)日:2000-11-07

    申请号:US378791

    申请日:1999-08-23

    申请人: Cheng P. Wen

    发明人: Cheng P. Wen

    IPC分类号: H03B9/14 H03B7/14

    CPC分类号: H03B9/141

    摘要: A millimeter-wave/microwave oscillator circuit and method of fabricating same are disclosed. A high Q-factor resonator is formed by disposing a transferred electron negative resistance device, such as a Gunn diode, or an IMPATT negative resistance device in a semi-circular cross-sectional shaped resonator cavity. The equivalent capacitance of the negative resistance diode can be designed to resonate with the equivalent series inductance for the resonator cavity by adjusting the dimensions of the cavity and the placement of the negative resistance device therein. Very low cost, compact and lightweight microwave and millimeter-wave integrated circuit power sources using negative resistance diodes can be batch manufactured.

    摘要翻译: 公开了一种毫米波/微波振荡器电路及其制造方法。 通过将转移的电子负电阻器件如耿氏二极管或IMPATT负电阻器件设置在半圆形横截面形的谐振器腔中来形成高Q因子谐振器。 负电阻二极管的等效电容可以通过调节空腔的尺寸和负电阻装置的位置来设计成谐振腔谐振腔的等效串联电感。 使用负电阻二极管的成本非常低,体积小巧,微波和毫米波集成电路电源可以批量生产。

    Multiple quantum well superlattice infrared detector with graded
conductive band
    3.
    发明授权
    Multiple quantum well superlattice infrared detector with graded conductive band 失效
    具有分级导电带的多量子阱超晶格红外检测器

    公开(公告)号:US5198682A

    公开(公告)日:1993-03-30

    申请号:US792070

    申请日:1991-11-12

    IPC分类号: H01L31/0352

    CPC分类号: B82Y20/00 H01L31/035236

    摘要: A multiple quantum well superlattice radiation detector is compositionally graded to establish an internal electric field within the superlattice that allows the device to operate with a reduced or zero externally applied bias voltage. The compositional grading can be implemented by grading the doping levels of successive quantum wells or the relative proportions of elements in successive barrier layers of the superlattice, or by a combination of the two. If a tunneling current blocking layer is employed, it can also be compositionally graded to inhibit a substantial increase in the blocking layer's barrier energy level near a charge carrier collector on the other side of the blocking layer from the superlattice. The charge carrier collector can itself be provided with a graded dopant concentration near the blocking layer to inhibit reverse bias voltage breakdown in the blocking layer.

    摘要翻译: 多量子阱超晶格辐射检测器被组成分级,以在超晶格内建立内部电场,允许器件以减小的或零的外部施加的偏置电压工作。 组成分级可以通过对连续量子阱的掺杂水平进行分级或超晶格的连续势垒层中元素的相对比例,或通过两者的组合来实现。 如果使用隧道电流阻挡层,则其也可以被组成分级,以阻止阻挡层的另一侧与超晶格附近的电荷载流子收集器附近的阻挡层势垒能级的显着增加。 电荷载流子收集器本身可以在阻挡层附近设置渐变掺杂剂浓度,以阻止阻挡层中的反向偏置电压击穿。

    Coplanar waveguide directional coupler and flip-clip microwave
monolithic integrated circuit assembly incorporating the coupler
    5.
    发明授权
    Coplanar waveguide directional coupler and flip-clip microwave monolithic integrated circuit assembly incorporating the coupler 失效
    并联耦合器的共面波导定向耦合器和折叠式微波单片集成电路组件

    公开(公告)号:US5105171A

    公开(公告)日:1992-04-14

    申请号:US692833

    申请日:1991-04-29

    IPC分类号: H01P5/18

    CPC分类号: H01P5/186

    摘要: A coplanar waveguide directional coupler (116,134) may be formed on a surface (102a,106a) of a substrate (102) and/or a microwave monolithic integrated circuit (MMIC) chip (106), with the MMIC chip (106) being flip-chip mounted on the substrate (102). The directional coupler (116,134) includes an input port (114,136), a coupled port (126,154), a direct port (122,152) and an isolation port (1118,150) formed on the surface (102a,106a). At least two parallel first striplines (24,26) are formed on the surface (102a,106a), having first ends connected to the input port (114,136) and second ends connected to the direct port (122,152). At least two parallel second striplines (36,38) are formed on the surface (102a,106a), having first ends connected to the coupled port (126,154) and second ends connected to the isolation port (118,150). The second striplines (36,38) are interdigitated with the first striplines (24,26) to provide tight signal coupling therebetween. First and second main ground planes (52,54) are formed on the surface (102a,106a) and extend parallel to and on opposite respective sides of the interdigitated first and second striplines (24,26,36,38). The input port (114,136), coupled port (126,154), direct port (122,152) and isolation port (118,150) each include a coplanar waveguide section having a center conductor (14a,16a,18a,20a) connected to the ends of the respective striplines (24,26,36,38), and first and second ground planes (14b,14c), (16c,16c), (18b,18c, (20b,20c) which extend parallel to the center conductor (14a,16a,18a,20a) on opposite sides thereof and are connected in circuit to the main ground planes (52,54).

    Flip-chip MMIC oscillator assembly with off-chip coplanar waveguide
resonant inductor
    6.
    发明授权
    Flip-chip MMIC oscillator assembly with off-chip coplanar waveguide resonant inductor 失效
    倒装芯片MMIC振荡器组件,具有片外共面波导谐振电感

    公开(公告)号:US5087896A

    公开(公告)日:1992-02-11

    申请号:US641954

    申请日:1991-01-16

    IPC分类号: H03B1/00 H03B5/18

    摘要: A coplanar waveguide based microwave monolithic integrated circuit (MMIC) oscillator chip (14) having an active oscillator element (16) and a resonant capacitor (18) formed thereon is flip-chip mounted on a dielectric substrate (12). A resonant inductor (22) is formed on the substrate (12) and interconnected with the resonant capacitor (18) to form a high Q-factor resonant circuit for the oscillator (10). The resonant inductor (22) includes a shorted coplanar waveguide section (24) consisting of first and second ground strips (24b,24c), and a conductor strip (24a) extending between the first and second ground strips (24b,24c) in parallel relation thereto and being separated therefrom by first and second spaces (26a,26b) respectively. A shorting strip (24d) electrically interconnects adjacent ends of the conductor strip (24a) and first and second ground strips (24b,24c) respectively. A dielectric film (34) may be formed over at least adjacent portions of the conductor strip (24 a) and first and second ground strips (24b,24c). The resonant inductor (22) is adjusted to provide a predetermined resonant frequency for the oscillator (10) by using a laser (40) to remove part of the dielectric film (34) in the first and second spaces (26a,26b) for fine adjustment, and/or to remove part of the shorting strip (24d) at the ends of the first and second spaces (26a,26b) for coarse adjustment.

    Beam lead mixer diode
    7.
    发明授权
    Beam lead mixer diode 失效
    光束混合二极管

    公开(公告)号:US4855796A

    公开(公告)日:1989-08-08

    申请号:US871236

    申请日:1986-06-06

    摘要: A beam lead diode configuration is described, employing a planar proton bombarded conversion region and a low-permittivity dielectric separator. The diode enjoys the mechanical ruggedness of the conventional planar diodes and the electrical performance of conventional mesa-type diodes. The diode structure results in the absence of N-type mesa structures on the substrate, allowing fabrication by relatively low-cost, high-yield photolithographic processes.

    摘要翻译: 使用平面质子轰击转换区和低介电常数介质分离器来描述束引线二极管配置。 二极管具有常规平面二极管的机械坚固性和常规台面型二极管的电性能。 二极管结构导致在衬底上不存在N型台面结构,允许通过相对低成本的高产量光刻工艺制造。

    Heterojunction IMPATT diode
    8.
    发明授权
    Heterojunction IMPATT diode 失效
    异质结IMPATT二极管

    公开(公告)号:US4291320A

    公开(公告)日:1981-09-22

    申请号:US110965

    申请日:1980-01-10

    CPC分类号: H01L29/864

    摘要: A double drift IMPATT diode is formed from two semiconductors having different band gaps and carrier mobilities. The avalanche portion of the diode is created in the semiconductor having the lower band gap. The electron drift portion is created in the semiconductor having the higher electron mobility and the hole drift portion is created in the semiconductor having the higher hole mobility. This decreases the voltage required across the avalanche portion, decreases the series resistance, and thus increases the efficiency of the diode.

    摘要翻译: 双漂移IMPATT二极管由具有不同带隙和载流子迁移率的两个半导体形成。 在具有较低带隙的半导体中产生二极管的雪崩部分。 在具有较高电子迁移率的半导体中产生电子漂移部分,并且在具有较高空穴迁移率的半导体中产生空穴漂移部分。 这降低了雪崩部分所需的电压,降低了串联电阻,从而提高了二极管的效率。

    Plated nickel-gold/dielectric interface for passivated MMICs
    9.
    发明授权
    Plated nickel-gold/dielectric interface for passivated MMICs 失效
    镀镍镍/电介质界面,用于钝化MMIC

    公开(公告)号:US5861341A

    公开(公告)日:1999-01-19

    申请号:US680453

    申请日:1996-07-15

    IPC分类号: H01L23/66 H01L21/441

    CPC分类号: H01L23/66 H01L2924/0002

    摘要: A thin film (at least one atomic layer to about 400 .ANG.) of nickel is electrolytically plated on top of electrolytically-plated gold electrodes in GaAs monolithic microwave integrated circuits (MMICs) without any additional photoresist masking step. The thin electrolytically-plated nickel film improves adhesion of a passivating dielectric layer (e.g., silicon dioxide, silicon nitride, and silicon oxynitride) formed on the electrolytically-plated gold electrodes. The electrolytically-plated nickel film can be removed locally to facilitate the fabrication of plated silver bumps (for off-chip electrical connections and thermal paths) on passivated flip chip MMICs.

    摘要翻译: 在GaAs单片微波集成电路(MMIC)中的电解电镀金电极的顶部上电解电镀镍(至少一个原子层至约400)的镍膜,而无需任何额外的光刻胶掩模步骤。 薄的电解镍膜改善了在电解镀金的金电极上形成的钝化介质层(例如,二氧化硅,氮化硅和氮氧化硅)的粘附性。 可以局部去除电解镍膜,以便于在钝化倒装芯片MMIC上制造电镀银凸块(片外电连接和热路径)。

    Multi-layer collector heterojunction transistor
    10.
    发明授权
    Multi-layer collector heterojunction transistor 失效
    多层集电极异质结晶体管

    公开(公告)号:US5572049A

    公开(公告)日:1996-11-05

    申请号:US422110

    申请日:1995-04-14

    CPC分类号: H01L29/7371 H01L29/0821

    摘要: A multi-layer collector heterojunction transistor (10) provides for high power, high efficiency transistor amplifier operation, especially in the RF (radio frequency) range of operation. A larger band gap first collector layer (12), approximately 15% of the active collector region (11) thickness, is provided at the base-collector junction (13). A smaller band gap second collector layer (14) forms the remainder of the active collector region (11). The multi-layer collector structure provides higher reverse bias breakdown voltage and higher carrier mobility during relevant portions of the output signal swing. A lower saturation voltage limit, or "knee" voltage, is provided at the operating points where linear operating regions transition to saturation operating regions as depicted in the output voltage-current (I-V) characteristic curves. The magnitude of the output signal swing of an amplifier may be increased, providing higher power amplification with greater power efficiency. The power supply voltage for the amplifier may be increased, providing for the use of a smaller, lighter power supply.

    摘要翻译: 多层收集器异质结晶体管(10)提供高功率,高效率的晶体管放大器操作,特别是在RF(射频)操作范围内。 在基极 - 集电极结(13)处提供大约15%的有源集电极区域(11)厚度的较大的带隙第一集电极层(12)。 较小的带隙第二集电极层(14)形成有源集电极区域(11)的剩余部分。 多层收集器结构在输出信号摆幅的相关部分期间提供更高的反向偏压击穿电压和较高的载流子迁移率。 在输出电压 - 电流(I-V)特性曲线中描绘的线性工作区域转变到饱和工作区域的工作点处,提供较低的饱和电压限制或“拐点”电压。 可以增加放大器的输出信号摆幅的大小,以更高的功率效率提供更高的功率放大。 可以增加放大器的电源电压,从而提供更小,更轻的电源的使用。