摘要:
An audio amplifier includes a timing control circuit, an amplifying circuit, and a bias control circuit. The timing control circuit generates a first power down signal and a second power down signal, in which the first power down signal is asserted before the second power down signal is asserted. The amplifying circuit receives a bias voltage to amplify an audio signal and is deactivated when the first power down signal is asserted. The bias control circuit provides the bias voltage for the amplifying circuit and is deactivated when the second power down signal is asserted.
摘要:
The device for jitter measurement and a method thereof are provided. The device for jitter measure includes a signal retrieving module, a signal amplifying module, an edge detecting module, and a time-to-digital converting module. The signal retrieving module receives a signal-under-test, and retrieves a first pulse signal having a pulse width equal to a period of the signal-under-test. The signal amplifying module amplifies the pulse width of the first pulse signal and thereby generates a second pulse signal. The edge detecting module detects a rising edge and a falling edge of the second pulse signal, and generates a first indication signal and a second indication signal according to the respective detected results. The time-to-digital converting module converts the pulse width of the second pulse signal existed in time domain to a digital signal according to the first indication signal and the second indication signal.
摘要:
An analog-to-digital converter (ADC) for pipelined ADCs or cyclic ADCs is disclosed. The ADC includes at least one pair of two stages connected in series, and the two stages have different bits of resolution. An amplifier is shared by the pair of two stages such that the two stages operate in an interleaved manner. Accordingly, this stage-resolution scalable opamp-sharing technique is adaptable for pipelined ADC or cyclic ADC, which substantially reduces power consumption and increases operating speed.
摘要:
An audio output device is provided and includes a signal source, a detector, a plurality of digital-to-analog converters, and a plurality of amplifiers. The signal source generates a plurality of digital signals. The detector receives the digital signals and detects states of the digital signals to generate a plurality of control signals according to the detection results respectively. The digital-to-analog converters receive the digital signals and convert the digital signals to a plurality of analog signals, respectively. The amplifiers receive the analog signals and generate a plurality of amplified signals according to the control signals, respectively.
摘要:
An analog to digital converter is provided. The converter comprises a dither gain generator, a first stage, an adder, a second stage, and a digital error correction logic. The dither gain generator generates a dither gain. The first stage receives a first voltage to generate a first digital code and a second voltage. The adder is coupled to the first stage and adds the dither voltage to the second voltage to generate a third voltage. The second stage receives the third voltage to generate a second digital code. The digital error correction logic receives and corrects the first digital code and the second digital code to generate a digital code corresponding to the first voltage.
摘要:
A current-mode differential transmitter, receiving a single-end input voltage signal and accordingly generating a differential output current signal, is provided. The transmitter includes a first switch, a second switch and a current mirror. The first switch is coupled in a first current path and controlled by the single-end input voltage signal. The second switch is coupled in a second current path and controlled by an inverted signal of the single-end input voltage signal. The current mirror mirrors a reference current to the first current path when the first switch is turned on, and mirrors the reference current to the second current path when the second switch is turned on. The differential output current signal is derived from the currents on the first and second current paths.
摘要:
An audio amplifier includes an amplifying circuit, a bias control circuit, and a decoupling device. The amplifying circuit amplifies an audio signal. The bias control circuit provides at least one bias voltage for the amplifying circuit according to a power down signal, in which the power down signal represents that the audio amplifier is powered on or powered down. The decoupling device reduces the damping phenomenon of the bias voltage caused by powering on or powering down the audio amplifier.
摘要:
A method for converting analog signals into digital signals includes the steps of: superimposing a dither value on an analog input signal; sampling the superimposition of the analog input signal with the dither value to obtain a sampling signal; converting the sampling signal into corresponding digital values; correcting offsets in the digital values to generate a digital signal; and removing the dither value from the digital signal. An analog-to-digital converter is also disclosed herein.
摘要:
In a pipelined analog to digital converter with multiple stages of sub-converters, capacitor mismatch error can be reduced by splitting the capacitors into multiple numbers and randomly selecting part of the split capacitors as feedback capacitors. The selection of feedback capacitors can be made according to a digital output, clock phase, stage number of the sub-converter or the combination thereof. The approach of the present invention can be applied to the most significant bit (MSB) stage for a pipelined ADC. Moreover, a method for implementing the same is also proposed.
摘要:
A buffer circuit applied to a source driver output stage circuit includes a buffer and a D-class amplifier. The buffer is coupled to an input voltage for accordingly outputting an output voltage. The D-class amplifier includes a comparator and a switch device. The comparator is for comparing the input voltage and the output voltage and accordingly outputting a comparison signal. The switch device is coupled to an operational voltage for adjusting the output voltage according to the comparison signal.