Method of powering down an audio amplifier with timing circuit to power down bias control and amplifying circuits in sequence
    1.
    发明授权
    Method of powering down an audio amplifier with timing circuit to power down bias control and amplifying circuits in sequence 有权
    使用定时电路对音频放大器进行掉电的方法,以顺序地对偏置控制和放大电路进行断电

    公开(公告)号:US08488808B2

    公开(公告)日:2013-07-16

    申请号:US13552368

    申请日:2012-07-18

    申请人: Chih-Haur Huang

    发明人: Chih-Haur Huang

    IPC分类号: H04B15/00

    摘要: An audio amplifier includes a timing control circuit, an amplifying circuit, and a bias control circuit. The timing control circuit generates a first power down signal and a second power down signal, in which the first power down signal is asserted before the second power down signal is asserted. The amplifying circuit receives a bias voltage to amplify an audio signal and is deactivated when the first power down signal is asserted. The bias control circuit provides the bias voltage for the amplifying circuit and is deactivated when the second power down signal is asserted.

    摘要翻译: 音频放大器包括定时控制电路,放大电路和偏置控制电路。 定时控制电路产生第一掉电信号和第二掉电信号,其中在断言第二掉电信号之前断言第一掉电信号。 放大电路接收偏置电压以放大音频信号,并且当第一掉电信号被断言时,放大电路被去激活。 偏置控制电路为放大电路提供偏置电压,并且在断言第二次掉电信号时被去激活。

    Device for jitter measurement and method thereof
    2.
    发明授权
    Device for jitter measurement and method thereof 有权
    抖动测量装置及其方法

    公开(公告)号:US07957923B2

    公开(公告)日:2011-06-07

    申请号:US12117176

    申请日:2008-05-08

    IPC分类号: G06F19/00 H04B3/46

    CPC分类号: G01R31/31709

    摘要: The device for jitter measurement and a method thereof are provided. The device for jitter measure includes a signal retrieving module, a signal amplifying module, an edge detecting module, and a time-to-digital converting module. The signal retrieving module receives a signal-under-test, and retrieves a first pulse signal having a pulse width equal to a period of the signal-under-test. The signal amplifying module amplifies the pulse width of the first pulse signal and thereby generates a second pulse signal. The edge detecting module detects a rising edge and a falling edge of the second pulse signal, and generates a first indication signal and a second indication signal according to the respective detected results. The time-to-digital converting module converts the pulse width of the second pulse signal existed in time domain to a digital signal according to the first indication signal and the second indication signal.

    摘要翻译: 提供抖动测量装置及其方法。 用于抖动测量的装置包括信号检索模块,信号放大模块,边缘检测模块和时间 - 数字转换模块。 信号检索模块接收待测信号,并检索具有等于被测信号的周期的脉冲宽度的第一脉冲信号。 信号放大模块放大第一脉冲信号的脉冲宽度,从而产生第二脉冲信号。 边缘检测模块检测第二脉冲信号的上升沿和下降沿,并根据各个检测结果生成第一指示信号和第二指示信号。 时间 - 数字转换模块根据第一指示信号和第二指示信号将时域中存在的第二脉冲信号的脉冲宽度转换为数字信号。

    Stage-resolution scalable opamp-sharing technique for pipelined/cyclic ADC
    3.
    发明授权
    Stage-resolution scalable opamp-sharing technique for pipelined/cyclic ADC 有权
    流水线/循环ADC的阶段分辨率可扩展运算放大器共享技术

    公开(公告)号:US07924204B2

    公开(公告)日:2011-04-12

    申请号:US12247186

    申请日:2008-10-07

    IPC分类号: H03M1/38

    摘要: An analog-to-digital converter (ADC) for pipelined ADCs or cyclic ADCs is disclosed. The ADC includes at least one pair of two stages connected in series, and the two stages have different bits of resolution. An amplifier is shared by the pair of two stages such that the two stages operate in an interleaved manner. Accordingly, this stage-resolution scalable opamp-sharing technique is adaptable for pipelined ADC or cyclic ADC, which substantially reduces power consumption and increases operating speed.

    摘要翻译: 公开了一种用于流水线ADC或循环ADC的模数转换器(ADC)。 ADC包括串联连接的至少一对两个级,两级具有不同的分辨率。 放大器由一对两个级共享,使得两个级以交错方式操作。 因此,这种阶段分辨率可扩展的运算放大器共享技术适用于流水线ADC或循环ADC,这大大降低了功耗并提高了运行速度。

    AUDIO OUTPUT DEVICES
    4.
    发明申请
    AUDIO OUTPUT DEVICES 审中-公开
    音频输出设备

    公开(公告)号:US20110060431A1

    公开(公告)日:2011-03-10

    申请号:US12555922

    申请日:2009-09-09

    申请人: Chih-Haur Huang

    发明人: Chih-Haur Huang

    IPC分类号: G06F17/00 H03M1/12

    CPC分类号: H03M1/186 H03G3/001 H04R3/12

    摘要: An audio output device is provided and includes a signal source, a detector, a plurality of digital-to-analog converters, and a plurality of amplifiers. The signal source generates a plurality of digital signals. The detector receives the digital signals and detects states of the digital signals to generate a plurality of control signals according to the detection results respectively. The digital-to-analog converters receive the digital signals and convert the digital signals to a plurality of analog signals, respectively. The amplifiers receive the analog signals and generate a plurality of amplified signals according to the control signals, respectively.

    摘要翻译: 提供音频输出装置,并包括信号源,检测器,多个数模转换器和多个放大器。 信号源产生多个数字信号。 检测器接收数字信号并检测数字信号的状态,分别根据检测结果产生多个控制信号。 数模转换器接收数字信号并将数字信号分别转换成多个模拟信号。 放大器分别接收模拟信号并根据控制信号产生多个放大信号。

    Analog to digital converter having digital correction logic that utilizes a dither signal to correct a digital code
    5.
    发明授权
    Analog to digital converter having digital correction logic that utilizes a dither signal to correct a digital code 有权
    具有使用抖动信号校正数字码的数字校正逻辑的模数转换器

    公开(公告)号:US07830287B1

    公开(公告)日:2010-11-09

    申请号:US12437676

    申请日:2009-05-08

    申请人: Chih-Haur Huang

    发明人: Chih-Haur Huang

    IPC分类号: H03M1/20

    CPC分类号: H03M1/0639 H03M1/164

    摘要: An analog to digital converter is provided. The converter comprises a dither gain generator, a first stage, an adder, a second stage, and a digital error correction logic. The dither gain generator generates a dither gain. The first stage receives a first voltage to generate a first digital code and a second voltage. The adder is coupled to the first stage and adds the dither voltage to the second voltage to generate a third voltage. The second stage receives the third voltage to generate a second digital code. The digital error correction logic receives and corrects the first digital code and the second digital code to generate a digital code corresponding to the first voltage.

    摘要翻译: 提供了模数转换器。 转换器包括抖动增益发生器,第一级,加法器,第二级和数字纠错逻辑。 抖动增益发生器产生抖动增益。 第一级接收第一电压以产生第一数字码和第二电压。 加法器耦合到第一级,并将抖动电压加到第二电压以产生第三电压。 第二级接收第三电压以产生第二数字码。 数字纠错逻辑接收和校正第一数字码和第二数字码,以产生对应于第一电压的数字码。

    Current-mode differential transmitter and receiver
    6.
    发明授权
    Current-mode differential transmitter and receiver 失效
    电流模式差分发射器和接收器

    公开(公告)号:US07663410B2

    公开(公告)日:2010-02-16

    申请号:US11905796

    申请日:2007-10-04

    IPC分类号: H02M11/00

    CPC分类号: H04L25/0278

    摘要: A current-mode differential transmitter, receiving a single-end input voltage signal and accordingly generating a differential output current signal, is provided. The transmitter includes a first switch, a second switch and a current mirror. The first switch is coupled in a first current path and controlled by the single-end input voltage signal. The second switch is coupled in a second current path and controlled by an inverted signal of the single-end input voltage signal. The current mirror mirrors a reference current to the first current path when the first switch is turned on, and mirrors the reference current to the second current path when the second switch is turned on. The differential output current signal is derived from the currents on the first and second current paths.

    摘要翻译: 提供了接收单端输入电压信号并因此产生差分输出电流信号的电流模式差分发射器。 发射机包括第一开关,第二开关和电流镜。 第一开关耦合在第一电流路径中并由单端输入电压信号控制。 第二开关耦合在第二电流路径中并由单端输入电压信号的反相信号控制。 当第一开关导通时,电流镜反射到第一电流路径的参考电流,并且当第二开关导通时将电流反射到第二电流路径的参考电流。 差分输出电流信号从第一和第二电流路径上的电流导出。

    AUDIO AMPLIFIER
    7.
    发明申请
    AUDIO AMPLIFIER 审中-公开
    音频放大器

    公开(公告)号:US20090274319A1

    公开(公告)日:2009-11-05

    申请号:US12115138

    申请日:2008-05-05

    申请人: Chih-Haur Huang

    发明人: Chih-Haur Huang

    IPC分类号: H04B15/00

    摘要: An audio amplifier includes an amplifying circuit, a bias control circuit, and a decoupling device. The amplifying circuit amplifies an audio signal. The bias control circuit provides at least one bias voltage for the amplifying circuit according to a power down signal, in which the power down signal represents that the audio amplifier is powered on or powered down. The decoupling device reduces the damping phenomenon of the bias voltage caused by powering on or powering down the audio amplifier.

    摘要翻译: 音频放大器包括放大电路,偏置控制电路和去耦装置。 放大电路放大音频信号。 偏置控制电路根据功率下降信号为放大电路提供至少一个偏置电压,其中掉电信号表示音频放大器通电或掉电。 去耦装置减少了通过给音频放大器供电或掉电引起的偏置电压的阻尼现象。

    A/D converter and method for converting analog signals into digital signals
    8.
    发明授权
    A/D converter and method for converting analog signals into digital signals 有权
    A / D转换器和将模拟信号转换为数字信号的方法

    公开(公告)号:US07602324B1

    公开(公告)日:2009-10-13

    申请号:US12356107

    申请日:2009-01-20

    IPC分类号: H03M1/20

    摘要: A method for converting analog signals into digital signals includes the steps of: superimposing a dither value on an analog input signal; sampling the superimposition of the analog input signal with the dither value to obtain a sampling signal; converting the sampling signal into corresponding digital values; correcting offsets in the digital values to generate a digital signal; and removing the dither value from the digital signal. An analog-to-digital converter is also disclosed herein.

    摘要翻译: 一种将模拟信号转换为数字信号的方法包括以下步骤:将抖动值叠加在模拟输入信号上; 对模拟输入信号与抖动值的叠加进行取样以获得采样信号; 将采样信号转换成相应的数字值; 校正数字值中的偏移量以产生数字信号; 并从数字信号中去除抖动值。 本文还公开了一种模拟 - 数字转换器。

    Pipelined analog to digital converter with capacitor mismatch compensation
    9.
    发明授权
    Pipelined analog to digital converter with capacitor mismatch compensation 有权
    具有电容失配补偿的流水线模数转换器

    公开(公告)号:US07233276B1

    公开(公告)日:2007-06-19

    申请号:US11289045

    申请日:2005-11-29

    申请人: Chih-haur Huang

    发明人: Chih-haur Huang

    IPC分类号: H03M1/34

    CPC分类号: H03M1/066 H03M1/145

    摘要: In a pipelined analog to digital converter with multiple stages of sub-converters, capacitor mismatch error can be reduced by splitting the capacitors into multiple numbers and randomly selecting part of the split capacitors as feedback capacitors. The selection of feedback capacitors can be made according to a digital output, clock phase, stage number of the sub-converter or the combination thereof. The approach of the present invention can be applied to the most significant bit (MSB) stage for a pipelined ADC. Moreover, a method for implementing the same is also proposed.

    摘要翻译: 在具有多级子转换器的流水线模数转换器中,可以通过将电容器分成多个数字并随机选择部分分离电容器作为反馈电容器来减少电容器失配误差。 可以根据数字输出,时钟相位,子转换器的级数或其组合来进行反馈电容器的选择。 本发明的方法可以应用于流水线ADC的最高有效位(MSB)级。 此外,还提出了一种用于实现该方法的方法。

    Source driver output stage circuit, buffer circuit and voltage adjusting method thereof
    10.
    发明申请
    Source driver output stage circuit, buffer circuit and voltage adjusting method thereof 有权
    源极驱动器输出级电路,缓冲电路及其电压调整方法

    公开(公告)号:US20070103208A1

    公开(公告)日:2007-05-10

    申请号:US11594774

    申请日:2006-11-09

    IPC分类号: H03B1/00

    摘要: A buffer circuit applied to a source driver output stage circuit includes a buffer and a D-class amplifier. The buffer is coupled to an input voltage for accordingly outputting an output voltage. The D-class amplifier includes a comparator and a switch device. The comparator is for comparing the input voltage and the output voltage and accordingly outputting a comparison signal. The switch device is coupled to an operational voltage for adjusting the output voltage according to the comparison signal.

    摘要翻译: 应用于源极驱动器输出级电路的缓冲电路包括缓冲器和D级放大器。 缓冲器耦合到输入电压,从而相应地输出输出电压。 D级放大器包括比较器和开关装置。 比较器用于比较输入电压和输出电压,从而输出比较信号。 开关装置耦合到用于根据比较信号调节输出电压的工作电压。