公开(公告)号：US08450157B2

公开(公告)日：2013-05-28

申请号：US13338242

申请日：2011-12-28

申请人： Pei-Ming Chen ,  Chih-Hung Shih

发明人： Pei-Ming Chen ,  Chih-Hung Shih

IPC分类号： H01L23/60

CPC分类号： H01L27/0248

摘要： A master having a substrate including displaying units and an ESD protection structure including an adjacent first region and a second region is provided. The displaying units have a predetermined-cutting region therebetween. Each displaying unit includes a peripheral circuit region and a display region having pixels. The ESD protection structure disposed on the predetermined-cutting region, located in the peripheral circuit region, and connecting the display region includes a first patterned conductive layer disposed on the first region and having an end away from the predetermined-cutting region, a first patterned dielectric layer disposed on the first patterned conductive layer and the substrate and having a first opening exposing a portion of the first patterned conductive layer, a patterned transparent conductive layer disposed corresponding to the predetermined-cutting region and connecting the first patterned conductive layer, and a second patterned dielectric layer covering the patterned transparent conductive layer and the substrate.

摘要翻译： 提供具有包括显示单元的基板和包括相邻的第一区域和第二区域的ESD保护结构的主板。 显示单元之间具有预定切割区域。 每个显示单元包括外围电路区域和具有像素的显示区域。 设置在预定切割区域上的ESD保护结构，位于外围电路区域中并连接显示区域包括设置在第一区域上并且具有远离预定切割区域的端部的第一图案化导电层，第一图案化 电介质层，设置在第一图案化导电层和基板上，并具有暴露第一图案化导电层的一部分的第一开口，对应于预定切割区域设置并连接第一图案化导电层的图案化透明导电层，以及 覆盖图案化的透明导电层和衬底的第二图案化介电层。

公开(公告)号：US08304782B2

公开(公告)日：2012-11-06

申请号：US13439092

申请日：2012-04-04

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： H01L29/04 ,  H01L31/036

CPC分类号： H01L27/124

摘要： An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.

摘要翻译： 提供阵列基板及其制造方法，其中数据线由通过接触焊盘连接的第一和第二部分组成。 第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。 此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。 因此，可以降低导电层之间的耦合效应。 例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。 作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

公开(公告)号：US20120208305A1

公开(公告)日：2012-08-16

申请号：US13454106

申请日：2012-04-24

申请人： Chin-Yueh Liao ,  Chih-Chun Yang ,  Chih-Hung Shih ,  Shine-Kai Tseng

发明人： Chin-Yueh Liao ,  Chih-Chun Yang ,  Chih-Hung Shih ,  Shine-Kai Tseng

IPC分类号： H01L33/36

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： A method for fabricating a pixel unit is provided. A TFT is formed on a substrate. A protection layer and a patterned photoresist layer are sequentially formed on the substrate entirely. A patterned protection layer is formed by using the patterned photoresist layer as a mask and partially removing the protection layer, wherein the patterned protection layer has an undercut located at a sidewall thereof A pixel electrode material layer is formed to cover the substrate, the TFT and the patterned photoresist layer, wherein the electrode material layer is disconnected at the undercut and exposes the undercut. A pixel electrode electrically connected to the TFT is formed by lifting off the patterned photoresist layer and parts of the electrode material layer covering the patterned photoresist layer simultaneously through a stripper, wherein the stripper permeates from the undercut to an interface of the patterned photoresist layer and the patterned protection layer.

摘要翻译： 提供了一种用于制造像素单元的方法。 在基板上形成TFT。 保护层和图案化的光致抗蚀剂层完全依次形成在基板上。 通过使用图案化的光致抗蚀剂层作为掩模并且部分地去除保护层来形成图案化的保护层，其中图案化的保护层具有位于其侧壁处的底切。形成像素电极材料层以覆盖基板，TFT和 图案化的光致抗蚀剂层，其中电极材料层在底切处断开并暴露底切。 电连接到TFT的像素电极通过剥离图案化的光致抗蚀剂层和覆盖图案化的光致抗蚀剂层的电极材料层的部分同时通过剥离器形成，其中剥离剂从底切渗透到图案化的光致抗蚀剂层和 图案化保护层。

公开(公告)号：US20120086011A1

公开(公告)日：2012-04-12

申请号：US13316601

申请日：2011-12-12

申请人： Chih-Hung SHIH ,  Chih-Chun Yang ,  Ming-Yuan Huang

发明人： Chih-Hung SHIH ,  Chih-Chun Yang ,  Ming-Yuan Huang

IPC分类号： H01L29/786

CPC分类号： H01L27/12 ,  H01L21/76838 ,  H01L27/124 ,  H01L27/1288

摘要： A display panel includes a substrate having a display area and a blank area. The blank area includes at least one of a non-metal line region and a metal-line region. The non-metal line region includes a plurality of insulating patterns and a first conductive pattern layer formed on the substrate. The insulating patterns are isolated from each other by the first conductive pattern layer. The metal-line region includes an insulating multilayer formed on the substrate and a conductive pattern layer formed on the insulating multilayer. Several isolated zones are formed by the conductive pattern layer on the surface of the insulating multilayer.

摘要翻译： 显示面板包括具有显示区域和空白区域的基板。 空白区域包括非金属线区域和金属线区域中的至少一个。 非金属线区域包括多个绝缘图案和形成在基板上的第一导电图案层。 绝缘图案通过第一导电图案层彼此隔离。 金属线区域包括形成在基板上的绝缘层和形成在绝缘层上的导电图案层。 由绝缘多层的表面上的导电图案层形成几个隔离区。

公开(公告)号：US08134210B2

公开(公告)日：2012-03-13

申请号：US12035445

申请日：2008-02-22

申请人： Pei-Ming Chen ,  Chih-Hung Shih

发明人： Pei-Ming Chen ,  Chih-Hung Shih

IPC分类号： H01L23/60

CPC分类号： H01L27/0248

摘要： A master having a substrate including displaying units and an ESD protection structure including an adjacent first region and a second region is provided. The displaying units have a predetermined-cutting region therebetween. Each displaying unit includes a peripheral circuit region and a display region having pixels. The ESD protection structure disposed on the predetermined-cutting region, located in the peripheral circuit region, and connecting the display region includes a first patterned conductive layer disposed on the first region and having an end away from the predetermined-cutting region, a first patterned dielectric layer disposed on the first patterned conductive layer and the substrate and having a first opening exposing a portion of the first patterned conductive layer, a patterned transparent conductive layer disposed corresponding to the predetermined-cutting region and connecting the first patterned conductive layer, and a second patterned dielectric layer covering the patterned transparent conductive layer and the substrate.

摘要翻译： 提供具有包括显示单元的基板和包括相邻的第一区域和第二区域的ESD保护结构的主板。 显示单元之间具有预定切割区域。 每个显示单元包括外围电路区域和具有像素的显示区域。 设置在预定切割区域上的ESD保护结构，位于外围电路区域中并连接显示区域包括设置在第一区域上并且具有远离预定切割区域的端部的第一图案化导电层，第一图案化 电介质层，设置在第一图案化导电层和基板上，并具有暴露第一图案化导电层的一部分的第一开口，对应于预定切割区域设置并连接第一图案化导电层的图案化透明导电层，以及 覆盖图案化的透明导电层和衬底的第二图案化介电层。

公开(公告)号：US20120013606A1

公开(公告)日：2012-01-19

申请号：US13092228

申请日：2011-04-22

申请人： Meng-Chieh Tsai ,  Chih-Wen Chen ,  Chih-Hung Shih

发明人： Meng-Chieh Tsai ,  Chih-Wen Chen ,  Chih-Hung Shih

IPC分类号： G02F1/1335 ,  G06T15/00 ,  G02B27/22

CPC分类号： G02B27/2214 ,  G02B27/22 ,  G02F1/1323 ,  G02F1/133 ,  G02F1/1335 ,  G02F1/133512 ,  G02F1/1347 ,  G02F2201/122 ,  G02F2201/124 ,  G02F2201/44 ,  G02F2201/52 ,  G02F2203/12 ,  H04N13/31 ,  H04N13/317 ,  H04N13/324

摘要： Disclosed herein is a parallax barrier including a first substrate, a second substrate and a liquid crystal layer disposed between the first and the second substrates. A plurality of first strip electrodes and a plurality of second strip electrodes are arranged on the first substrate, whereas a plurality of third electrodes and a plurality of fourth electrodes are arranged on the second substrate. Each of the third electrodes has a step-shaped first portion and each of the fourth electrodes has a step-shaped second portion.

摘要翻译： 本文公开了包括第一基板，第二基板和设置在第一和第二基板之间的液晶层的视差屏障。 多个第一条状电极和多个第二条形电极布置在第一基板上，而多个第三电极和多个第四电极布置在第二基板上。 每个第三电极具有阶梯形的第一部分，并且每个第四电极具有阶梯形的第二部分。

公开(公告)号：US20110228200A1

公开(公告)日：2011-09-22

申请号：US12822190

申请日：2010-06-24

申请人： Ming-Yao Tsai ,  Ching-Sheng Cheng ,  Chih-Hung Shih

发明人： Ming-Yao Tsai ,  Ching-Sheng Cheng ,  Chih-Hung Shih

IPC分类号： G02F1/1335 ,  G02B5/22

CPC分类号： G02B5/201 ,  G02F1/133514 ,  G02F1/133555 ,  G02F1/13624 ,  G02F2001/136222 ,  G02F2201/52

摘要： A display panel having a reflective region and a transparent region is provided. The reflective region and the transparent region respectively have sub-pixel regions. The display panel includes a first substrate, a second substrate, a plurality of color filter patterns, a single complementary color filter pattern and a display medium. The first substrate has a plurality of pixel structures disposed corresponding to the sub-pixel regions. The second substrate is disposed opposite to the first substrate. The color filter patterns are respectively disposed in the sub-pixel regions of the transparent region on the first or second substrate. The single complementary color filter pattern is disposed in the sub-pixel regions of the reflective region on the first or second substrate. The sub-pixel regions of the reflective region are not completely covered by the single complementary color filter pattern. The display medium is disposed between the first substrate and second substrate.

摘要翻译： 提供具有反射区域和透明区域的显示面板。 反射区域和透明区域分别具有子像素区域。 显示面板包括第一基板，第二基板，多个滤色器图案，单个补充滤色器图案和显示介质。 第一衬底具有对应于子像素区域设置的多个像素结构。 第二基板与第一基板相对设置。 滤色器图案分别设置在第一或第二基板上的透明区域的子像素区域中。 单个互补滤色器图案设置在第一或第二基板上的反射区域的子像素区域中。 反射区域的子像素区域不完全被单个互补滤色器图案覆盖。 显示介质设置在第一基板和第二基板之间。

公开(公告)号：US08023611B2

公开(公告)日：2011-09-20

申请号：US12777845

申请日：2010-05-11

申请人： Ching-Huan Lin ,  Sheng-Chao Liu ,  Kuan-Chun Huang ,  Chih-Hung Shih

发明人： Ching-Huan Lin ,  Sheng-Chao Liu ,  Kuan-Chun Huang ,  Chih-Hung Shih

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677

摘要： The present invention relates to a shift register having a plurality of stages electrically coupled to each other in series. Each stage includes a first and second TFT transistor. The first TFT transistor has a get electrically coupled to the output of the immediately prior stage, a drain electrically coupled to the boost point of the stage, and a source configured to receive one of the first and second control signals. The second TFT transistor has a get electrically coupled to the output of the immediately next stage, a drain and a source electrically coupled the drain and the source of the first transistor, respectively.

摘要翻译： 本发明涉及一种具有彼此串联电耦合的多个级的移位寄存器。 每个级包括第一和第二TFT晶体管。 第一TFT晶体管被电耦合到紧邻的前级的输出，电耦合到级的升压点的漏极和被配置为接收第一和第二控制信号中的一个的源极。 第二TFT晶体管被电耦合到紧邻的下一级的输出，漏极和源极分别电耦合第一晶体管的漏极和源极。

公开(公告)号：US08008135B2

公开(公告)日：2011-08-30

申请号：US12342026

申请日：2008-12-22

申请人： Chih-Hung Shih ,  Chih-Chun Yang ,  Ming-Yuan Huang

发明人： Chih-Hung Shih ,  Chih-Chun Yang ,  Ming-Yuan Huang

IPC分类号： H01L21/20

CPC分类号： H01L27/1288 ,  G02F1/136227 ,  H01L27/1214 ,  H01L27/3248 ,  H01L51/5206 ,  H01L51/56 ,  H01L2227/323

摘要： A method for manufacturing a pixel structure includes providing a substrate having an active device thereon and forming a dielectric layer covering the active device. The dielectric layer has a contact hole disposed over the active device. Next, a first photoresist layer is formed on the dielectric layer over the active device, and a transparent conductive layer is formed to cover a portion of the dielectric layer and the first photoresist layer. The transparent conductive layer is electrically connected to the active device via the contact hole. Besides, the transparent conductive layer is irradiated with use of a laser beam, and a portion of the transparent conductive layer on the first photoresist layer is removed, such that the other portion of the transparent conductive layer on the portion of the dielectric layer forms a pixel electrode. The first patterned photoresist layer is then removed.

摘要翻译： 一种用于制造像素结构的方法包括提供其上具有有源器件的衬底，并形成覆盖有源器件的介电层。 电介质层具有设置在有源器件上方的接触孔。 接下来，在有源器件上的介电层上形成第一光致抗蚀剂层，并且形成透明导电层以覆盖电介质层和第一光致抗蚀剂层的一部分。 透明导电层经由接触孔与有源器件电连接。 此外，使用激光束照射透明导电层，并且去除第一光致抗蚀剂层上的透明导电层的一部分，使得介电层部分上的透明导电层的另一部分形成 像素电极。 然后去除第一图案化光致抗蚀剂层。

公开(公告)号：US20110149392A1

公开(公告)日：2011-06-23

申请号：US12909832

申请日：2010-10-22

申请人： Ren-Wei Liao ,  Meng-Chieh Tsai ,  Chih-Wen Chen ,  Chih-Hung Shih

发明人： Ren-Wei Liao ,  Meng-Chieh Tsai ,  Chih-Wen Chen ,  Chih-Hung Shih

IPC分类号： G02B27/22

CPC分类号： H04N13/31 ,  G02F1/1333 ,  G02F1/136286 ,  H04N13/305

摘要： A three-dimensional display includes a display panel having a plurality of first pixels arranged in the odd row, and a plurality of second pixels arranged in the even row. Each first pixel has a first and a second transparent regions and a first semiconductor pattern. Each second pixel has a third and a fourth transparent regions and a second semiconductor pattern. In any two adjacent first and second pixels, the first and the third transparent regions are mirror images of each other, and the second and the fourth transparent regions are mirror images of each other. In the adjacent first and second pixels arranged in any two rows, the loss of the light transmittance at any position along the row direction due to overlapping of the first semiconductor and the first transparent region and overlapping of the second semiconductor and the fourth transparent region remains unchanged.

摘要翻译： 三维显示器包括具有布置在奇数行中的多个第一像素的显示面板和布置在偶数行中的多个第二像素。 每个第一像素具有第一和第二透明区域和第一半导体图案。 每个第二像素具有第三和第四透明区域和第二半导体图案。 在任何两个相邻的第一和第二像素中，第一和第三透明区域是彼此的镜像，第二和第四透明区域是彼此的镜像。 在布置成任意两排的相邻的第一和第二像素中，由于第一半导体和第一透明区域的重叠以及第二半导体与第四透明区域的重叠而沿着行方向的任何位置的透光率的损失保持 不变