Abstract:
A method of forming a semiconductor device having a through-silicon via (TSV) is provided. A semiconductor device is provided having a first dielectric layer formed thereon. One or more dielectric layers are formed over the first dielectric layer, such that each of the dielectric layers have a stacking structure, wherein the stacking structures in the one or more dielectric layers are vertically aligned. The stacking structures may be, for example, metal rings. The stacking structures are then removed to form a first recess. A second recess is formed by extending the first recess into the substrate. The second recess is filled with a conductive material to form the TSV.
Abstract:
Semiconductor devices, transistors, and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a gate dielectric disposed over a workpiece, a gate disposed over the gate dielectric, and a spacer disposed over sidewalls of the gate and the gate dielectric. A source region is disposed proximate the spacer on a first side of the gate, and a drain region is disposed proximate the spacer on a second side of the gate. A metal layer is disposed over the source region and the drain region. The metal layer extends beneath the spacers by about 25% or greater than a width of the spacers.
Abstract:
A connector structure includes a coaxial cable coupler, which receives therein at least one positioning block. The positioning block has a surface against which a water seal pad is positioned. A conductive pin is arranged to extend through the positioning block and the water seal pad. As such, the arrangement of the water seal pad effectively prevents invasion of water and simplifies the assembling process to thereby reduce the assembling costs.
Abstract:
A coaxial cable terminal includes an insulating shell and a connection terminal. An interior of the insulating shell is hollow and is thus formed with a holding space. Two ends of the insulating shell are provided respectively with an opening. The connection terminal is accommodated in the holding space and is extended toward one end to form at least two leaves. Each leaf is first bent inward with an abutting section and a tail end of the abutting section is then bent outward to extend with a contact section. A bonding end is formed between the abutting section and the contact section. When a coaxial cable terminal is inserted, the coaxial cable terminal is clamped by the bonding end and is bonded by elastic abutting of the abutting section. Therefore, the present invention can be compatible with the coaxial cables of various apertures and will not be elastically fatigue easily.
Abstract:
An integrated circuit including a first transistor having a first gate dielectric layer with a first thickness. The integrated circuit also includes a second transistor having a second gate dielectric layer with a second thickness and the second transistor is configured to electrically connect to the first transistor. The integrated circuit also includes a third transistor having a third gate dielectric layer with a third thickness and the third transistor is configured to electrically connect to at least one of the first transistor or the second transistor. The first thickness, the second thickness and the third thickness of the integrated circuit are all different.
Abstract:
A memory device includes a first memory cell area having a first latch area where one or more electronic components are constructed for storing a value, and a first peripheral area surrounding the first latch area; and a second memory cell area being disposed adjacent to a first side of the first memory cell area, and having a second latch area where one or more electronic components are constructed for storing a value, and a second peripheral area surrounding the second latch area. One edge of the first memory cell area shifts away from its corresponding edge of the second memory cell area. Thus, the area or yield rate of the memory device can be adjusted.
Abstract:
An improved structure of connector includes a sheath and a conductive terminal that is received in the sheath. The sheath includes first and second sheath members. The first sheath member has an end forming a flange and an opposite end forming a plurality of elastic segments. The second sheath member forms a receiving chamber in which the first sheath member is receivable and also forms, inside an end thereof, a positioning section on which the elastic segments are positionable. As such, when an external terminal pin is inserted into the second sheath member to engage the conductive terminal, the positioning section retains the elastic segments in position to prevent the insertion of the external terminal pin from being made in an incorrect, deviated direction and thus damaging the conductive terminal. The arrangement of the elastic segments provides the conductive terminal with better capability of bearing external damages.
Abstract:
Semiconductor devices, transistors, and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a gate dielectric disposed over a workpiece, a gate disposed over the gate dielectric, and a spacer disposed over sidewalls of the gate and the gate dielectric. A source region is disposed proximate the spacer on a first side of the gate, and a drain region is disposed proximate the spacer on a second side of the gate. A metal layer is disposed over the source region and the drain region. The metal layer extends beneath the spacers by about 25% or greater than a width of the spacers.
Abstract:
An integrated circuit including a first transistor having a first gate dielectric layer with a first thickness. The integrated circuit also includes a second transistor having a second gate dielectric layer with a second thickness and the second transistor is configured to electrically connect to the first transistor. The integrated circuit also includes a third transistor having a third gate dielectric layer with a third thickness and the third transistor is configured to electrically connect to at least one of the first transistor or the second transistor. The first thickness, the second thickness and the third thickness of the integrated circuit are all different.
Abstract:
A method of forming a semiconductor device having a through-silicon via (TSV) is provided. A semiconductor device is provided having a first dielectric layer formed thereon. One or more dielectric layers are formed over the first dielectric layer, such that each of the dielectric layers have a stacking structure, wherein the stacking structures in the one or more dielectric layers are vertically aligned. The stacking structures may be, for example, metal rings. The stacking structures are then removed to form a first recess. A second recess is formed by extending the first recess into the substrate. The second recess is filled with a conductive material to form the TSV.