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    Chip-on-film package structure
    1.
    发明授权
    Chip-on-film package structure 有权

    公开(公告)号：US10211142B1

    公开(公告)日：2019-02-19

    申请号：US15886851

    申请日：2018-02-02

    申请人： ChipMOS Technologies Inc.

    发明人： Pi-Chang Chen ,  Yong-Fang Chiang

    IPC分类号： H01L23/498 ,  H01L23/00

    摘要： A COF package structure includes a flexible substrate and a chip. A chip mounting area is defined on an upper surface of a flexible base of the flexible substrate. A circuit layer of the flexible substrate includes a plurality of first upper leads, second upper leads, first conductive vias and lower leads. The second upper leads are disposed in the chip mounting area and divided into groups, and each second upper lead has a second inner end and an upper pad opposite to each other. The upper pads of each group are arranged layer by layer into at least two rows. There are two upper pads symmetrically arranged on both sides of a reference line of each group on at least one row furthest from the second inner ends. The first conductive vias connect the upper pads and the lower leads. The chip is mounted in the chip mounting area.

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10068861B2

    公开(公告)日：2018-09-04

    申请号：US15281095

    申请日：2016-09-30

    申请人： ChipMOS Technologies Inc.

    发明人： Kun-Shu Chuang

    IPC分类号： H01L23/00 ,  H01L23/498

    摘要： Provided is a semiconductor device including a substrate, a pad, a protective layer, a plurality of convex patterns, a redistribution layer (RDL), and a bump. The pad is disposed on the substrate. The protective layer is disposed on the substrate. The protective layer has a first opening exposing a portion of a surface of the pad. The convex patterns are disposed on the protective layer. The RDL is disposed on the convex patterns. The RDL extends from the pad to the convex patterns. The bump is disposed on the convex patterns.

    SEMICONDUCTOR PACKAGE AND METHOD THEREOF
    9.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD THEREOF 审中-公开
    半导体封装及其方法

    公开(公告)号：US20150236245A1

    公开(公告)日：2015-08-20

    申请号：US14553371

    申请日：2014-11-25

    申请人： ChipMOS Technologies, Inc.

    发明人： Shih-Wen CHOU

    IPC分类号： H01L43/02 ,  H01L43/12 ,  H01L43/08

    CPC分类号： H01L43/02 ,  H01L43/08 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A semiconductor package and manufacturing method thereof are disclosed. The semiconductor package includes a package carrier, a chip, a film, a first shielding metal plate and an encapsulating material. The package carrier has at least one conductive component. The chip has an active surface and a corresponding back surface. The back surface of the chip is attached to the package carrier. At least one contact point is disposed on the active surface and is electrically coupled to the conductive component by a wire. The film is disposed on the active surface and covers a portion of the wire. The first shielding metal plate is disposed on the film. The encapsulating material covers the chip, the wire, at least one portion of the package carrier, the film and at least one portion of the first shielding metal plate.

    摘要翻译： 公开了半导体封装及其制造方法。 半导体封装包括封装载体，芯片，膜，第一屏蔽金属板和封装材料。 封装载体具有至少一个导电部件。 该芯片具有活性表面和相应的背面。 芯片的背面附着在封装载体上。 至少一个接触点设置在有源表面上并且通过导线电耦合到导电部件。 该膜设置在有源表面上并覆盖该线的一部分。 第一屏蔽金属板设置在膜上。 封装材料覆盖芯片，导线，封装载体的至少一部分，薄膜以及第一屏蔽金属板的至少一部分。