Integrated circuit for current control of a power transistor
    2.
    发明授权
    Integrated circuit for current control of a power transistor 失效
    用于功率晶体管电流控制的集成电路

    公开(公告)号:US6028470A

    公开(公告)日:2000-02-22

    申请号:US930669

    申请日:1997-10-14

    摘要: An integrated circuit comprising a power transistor and a circuit arrangement. The circuit arrangement is thermally coupled to the power transistor and operates in a temperature-dependent fashion. The integrated circuit includes a pnp or npn transistor with a temperature dependent resistor coupled between the base and emitter of the transistor. The off-state current of the transistor changes as a function of temperature and initiates a change in a base current of the power transistor.

    摘要翻译: PCT No.PCT / DE96 / 00689。 371日期1997年10月14日第 102(e)日期1997年10月14日PCT 1996年4月20日PCT PCT。 第WO96 / 37955号公报 日期:1996年11月28日包括功率晶体管和电路装置的集成电路。 电路装置热耦合到功率晶体管并以温度依赖的方式工作。 集成电路包括具有耦合在晶体管的基极和发射极之间的温度依赖电阻器的pnp或npn晶体管。 晶体管的截止电流随温度的变化而变化,并引发功率晶体管的基极电流的变化。

    Circuit for protection from excess temperature
    6.
    发明授权
    Circuit for protection from excess temperature 失效
    保护温度过高的电路

    公开(公告)号:US06597556B1

    公开(公告)日:2003-07-22

    申请号:US09424478

    申请日:2000-06-01

    IPC分类号: H02H504

    摘要: An integrated circuit having a power transistor and a circuit arrangement functioning in a temperature dependant manner and thermally coupled to the power transitor. The integrated circuit is used to reliably disconnect the power transistor in the event of overheating., particularly in the case of inductive loads, and does not reactivate the power transistor until, for example, an edge change has occurred at the base terminal of the integrated circuit.

    摘要翻译: 一种具有功率晶体管和电路装置的集成电路,其以温度依赖的方式工作并热耦合到功率转换器。 集成电路用于在过热的情况下可靠地断开功率晶体管,特别是在感性负载的情况下,并且不会重新激活功率晶体管,直到例如在集成的基极端子上发生边缘变化 电路。

    Monolithically integrated semiconductor arrangement with a cover
electrode
    8.
    发明授权
    Monolithically integrated semiconductor arrangement with a cover electrode 失效
    具有覆盖电极的单片集成半导体布置

    公开(公告)号:US5479046A

    公开(公告)日:1995-12-26

    申请号:US263951

    申请日:1994-06-22

    摘要: The invention relates to a monolithically integrated semiconductor arrangement, where from the first main surface a first zone (p) and a second zone (n.sup.+) are diffused into a substrate (2), which is weakly doped (substrate region n.sup.-) under a first main surface (3) and is more strongly doped (substrate region n.sup.+) under a second main surface (4). An insulating passivation layer is attached to the first main surface (3), on top of which a metallic cover electrode (D) is located, which covers adjacent substrate regions (n.sup.-) and the edge areas of the first zone (p) and the second zone (n.sup.+). In accordance with the invention, at least one additional zone (.nu.) of the same type of conductivity as the associated zone (n.sup.+), but with weaker doping, is diffused in for increasing the break-through voltage, and is connected to the zone (n.sup.+), does not contact the other zone (p) and prevents the zone (n.sup.+) from directly bordering the substrate (n.sup.-) underneath the cover electrode (D).

    摘要翻译: 本发明涉及一种单片集成半导体装置,其中从第一主表面将第一区(p)和第二区(n +)扩散到基底(2)内,该衬底(2)是弱掺杂(衬底区n- 第一主表面(3)并且在第二主表面(4)下更强掺杂(衬底区域n +)。 绝缘钝化层附着到第一主表面(3)上,其上面设有覆盖相邻衬底区域(n-)和第一区域(p)的边缘区域的金属覆盖电极(D)和 第二区(n +)。 根据本发明,与相关区(n +)具有相同类型导电性但具有较弱掺杂的至少一个附加区(nu)被扩散用于增加突破电压,并连接到区 (n +)不接触另一区域(p),并且防止区域(n +)直接与覆盖电极(D)下方的衬底(n-)接壤。