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    CMOS COMPATIBLE INTEGRATED DIELECTRIC OPTICAL WAVEGUIDE COUPLER AND FABRICATION
    2.
    发明申请
    CMOS COMPATIBLE INTEGRATED DIELECTRIC OPTICAL WAVEGUIDE COUPLER AND FABRICATION 有权
    CMOS兼容集成电介质光波导耦合器和制造

    公开(公告)号：US20090324162A1

    公开(公告)日：2009-12-31

    申请号：US12164580

    申请日：2008-06-30

    申请人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

    发明人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

    IPC分类号： G02B6/12 ,  H01L21/302

    CPC分类号： G02B6/30 ,  B82Y20/00 ,  G02B6/1223

    摘要： An optoelectronic circuit fabrication method and integrated circuit apparatus fabricated therewith. Integrated circuits are fabricated with an integral optical coupling transition to efficiently couple optical energy from an optical fiber to an integrated optical waveguide on the integrated circuit. Layers of specific materials are deposited onto a semiconductor circuit to support etching of a trench to receive an optical coupler that performs proper impedance matching between an optical fiber and an on-circuit optical waveguide that extends part way into the transition channel. A silicon based dielectric that includes at least a portion with a refractive index substantially equal to a section of the optical fiber is deposited into the etched trench to create the optical coupler. Silicon based dielectrics with graded indices are also able to be used. Chemical mechanical polishing is used finalize preparation of the optical transition and integrated circuit.

    摘要翻译： 一种光电子电路制造方法及其制造的集成电路装置。 集成电路采用集成光耦合过渡制造，以有效地将光能从光纤耦合到集成电路上的集成光波导。 特定材料的层被沉积到半导体电路上以支持蚀刻沟槽以接收光纤耦合器，该光耦合器在光纤和部分地延伸到过渡通道中的在线光波导之间执行适当的阻抗匹配。 包括折射率基本上等于光纤的一部分的至少一部分的硅基电介质被沉积到蚀刻沟槽中以产生光耦合器。 也可以使用具有分级指数的硅基电介质。 化学机械抛光用于确定光学转换和集成电路的准备。

    Multilayer interconnect structure containing air gaps and method for making
    4.
    发明申请
    Multilayer interconnect structure containing air gaps and method for making 有权
    包含气隙的多层互连结构和制造方法

    公开(公告)号：US20070259516A1

    公开(公告)日：2007-11-08

    申请号：US11429708

    申请日：2006-05-08

    申请人： Christopher Jahnes ,  Satyanarayana Nitta ,  Kevin Petrarca ,  Katherine Saenger

    发明人： Christopher Jahnes ,  Satyanarayana Nitta ,  Kevin Petrarca ,  Katherine Saenger

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/7682 ,  H01L21/76808 ,  H01L21/76831 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2221/1026 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A multilevel air-gap-containing interconnect structure and a method of fabricating the same are provided. The multilevel air-gap-containing interconnect structure includes a collection of interspersed line levels and via levels, with via levels comprising conductive vias embedded in one or more dielectric layers in which the dielectric layers are solid underneath and above line features in adjacent levels, and perforated between line features. The line levels contain conductive lines and an air-gap-containing dielectric. A solid dielectric bridge layer, containing conductive contacts and formed by filling in a perforated dielectric layer, is disposed over the collection of interspersed line and via levels.

    摘要翻译： 提供了一种具有多级气隙的互连结构及其制造方法。 多层含气隙的互连结构包括散布的线电平和通孔电平的集合，其中通孔层包括嵌入在一个或多个电介质层中的导电通孔，其中电介质层在相邻电平之下的电极特征和固定电极层之上，以及 线之间穿孔特征。 线路电平包含导电线和含气隙的电介质。 包含导电接触并通过填充有孔电介质层形成的固体介质桥接层设置在散布的线路和通孔层的集合上。

    Diaphragm activated micro-electromechanical switch
    6.
    发明申请
    Diaphragm activated micro-electromechanical switch 有权
    隔膜激活微机电开关

    公开(公告)号：US20060017533A1

    公开(公告)日：2006-01-26

    申请号：US10523310

    申请日：2002-08-26

    申请人： Christopher Jahnes ,  Jennifer Lund ,  Katherine Saenger ,  Richard Volant

    发明人： Christopher Jahnes ,  Jennifer Lund ,  Katherine Saenger ,  Richard Volant

    IPC分类号： H01H51/22

    CPC分类号： H01H59/0009

    摘要： A micro-electromechanical (MEM) RF switch provided with a deflectable membrane (60) activates a switch contact or plunger (40). The membrane incorporates interdigitated metal electrodes (70) which cause a stress gradient in the membrane when activated by way of a DC electric field. The stress gradient results in a predictable bending or displacement of the membrane (60), and is used to mechanically displace the switch contact (30). An RF gap area (25) located within the cavity (250) is totally segregated from the gaps (71) between the interdigitated metal electrodes (70). The membrane is electrostatically displaced in two opposing directions, thereby aiding to activate and deactivate the switch. The micro-electromechanical switch includes: a cavity (250); at least one conductive path (20) integral to a first surface bordering the cavity; a flexible membrane (60) parallel to the first surface bordering the cavity (250), the flexible membrane (60) having a plurality of actuating electrodes (70); and a plunger (40) attached to the flexible membrane (60) in a direction away from the actuating electrodes (70), the plunger (40) having a conductive surface that makes electric contact with the conductive paths, opening and closing the switch.

    摘要翻译： 设置有可偏转膜（60）的微机电（MEM）RF开关激活开关触点或柱塞（40）。 膜包含交叉指向的金属电极（70），其通过DC电场激活时引起膜中的应力梯度。 应力梯度导致膜（60）的可预测的弯曲或位移，并且用于机械地移动开关触点（30）。 位于空腔（250）内的RF间隙区域（25）与交叉指向的金属电极（70）之间的间隙（71）完全分离。 膜在两个相反的方向上静电位移，从而有助于启动和停用开关。 微机电开关包括：空腔（250）; 至少一个导电通路（20），与所述空腔相邻的第一表面成一体; 柔性膜（60），其平行于与所述腔（250）接壤的所述第一表面，所述柔性膜（60）具有多个致动电极（70）; 以及沿远离所述致动电极（70）的方向附接到所述柔性膜（60）的柱塞（40），所述柱塞（40）具有导电表面，所述导电表面与所述导电路径电接触，所述开关闭合。

    CMOS compatible integrated dielectric optical waveguide coupler and fabrication
    8.
    发明授权
    CMOS compatible integrated dielectric optical waveguide coupler and fabrication 有权
    CMOS兼容的集成介质光波导耦合器和制造

    公开(公告)号：US07738753B2

    公开(公告)日：2010-06-15

    申请号：US12164580

    申请日：2008-06-30

    申请人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

    发明人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

    IPC分类号： G02B6/12 ,  G02B6/10 ,  H01L21/302

    CPC分类号： G02B6/30 ,  B82Y20/00 ,  G02B6/1223

    摘要： An optoelectronic circuit fabrication method and integrated circuit apparatus fabricated therewith. Integrated circuits are fabricated with an integral optical coupling transition to efficiently couple optical energy from an optical fiber to an integrated optical waveguide on the integrated circuit. Layers of specific materials are deposited onto a semiconductor circuit to support etching of a trench to receive an optical coupler that performs proper impedance matching between an optical fiber and an on-circuit optical waveguide that extends part way into the transition channel. A silicon based dielectric that includes at least a portion with a refractive index substantially equal to a section of the optical fiber is deposited into the etched trench to create the optical coupler. Silicon based dielectrics with graded indices are also able to be used. Chemical mechanical polishing is used finalize preparation of the optical transition and integrated circuit.

    摘要翻译： 一种光电子电路制造方法及其制造的集成电路装置。 集成电路采用集成光耦合过渡制造，以有效地将光能从光纤耦合到集成电路上的集成光波导。 特定材料的层被沉积到半导体电路上以支持蚀刻沟槽以接收光纤耦合器，该光耦合器在光纤和部分地延伸到过渡通道中的在线光波导之间执行适当的阻抗匹配。 包括折射率基本上等于光纤的一部分的至少一部分的硅基电介质被沉积到蚀刻沟槽中以产生光耦合器。 也可以使用具有分级指数的硅基电介质。 化学机械抛光用于确定光学转换和集成电路的准备。

    Method of obtaining release-standing micro structures and devices by selective etch removal of protective and sacrificial layer using the same
    9.
    发明申请
    Method of obtaining release-standing micro structures and devices by selective etch removal of protective and sacrificial layer using the same 失效
    通过使用其去除保护层和牺牲层的方法来获得释放稳定的微结构和器件

    公开(公告)号：US20060178004A1

    公开(公告)日：2006-08-10

    申请号：US11053610

    申请日：2005-02-08

    申请人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes

    发明人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes

    IPC分类号： H01L21/4763

    CPC分类号： B81C1/00476 ,  B81B2203/0118 ,  B81C2201/0132 ,  G01N1/32 ,  Y10S438/933

    摘要： A method of patterning and releasing chemically sensitive low k films without the complication of a permanent hardmask stack, yielding an unaltered free-standing structure is provided. The method includes providing a structure including a Si-containing substrate having in-laid etch stop layers located therein; forming a chemically sensitive low k film and a protective hardmask having a pattern atop the structure; transferring the pattern to the chemically sensitive low k film to provide an opening that exposes a portion of the Si-containing substrate; and etching the exposed portion of the Si-containing substrate through the opening to provide a cavity in the Si-containing substrate in which a free-standing low k film structure is formed, while removing the hardmask. In accordance with the present invention, the etching comprises a XeF2 etch gas.

    摘要翻译： 提供了图案化和释放化学敏感性低k膜的方法，而不需要永久性硬掩模堆叠的复杂性，产生未改变的独立结构。 该方法包括提供包括其中位于其中的内置蚀刻停止层的含Si衬底的结构; 形成化学敏感的低k膜和在结构顶部具有图案的保护性硬掩模; 将图案转移到化学敏感的低k膜上以提供暴露一部分含Si衬底的开口; 并且通过所述开口蚀刻含Si衬底的暴露部分，以在去除硬掩模的同时在其中形成独立的低k膜结构的含Si衬底中提供空腔。 根据本发明，蚀刻包括XeF 2 N 2蚀刻气体。

    MEMS RF switch with low actuation voltage
    10.
    发明授权
    MEMS RF switch with low actuation voltage 有权
    具有低致动电压的MEMS RF开关

    公开(公告)号：US06639488B2

    公开(公告)日：2003-10-28

    申请号：US09948478

    申请日：2001-09-07

    申请人： Hariklia Deligianni ,  Robert Groves ,  Christopher Jahnes ,  Jennifer L. Lund ,  Panayotis Andricacos ,  John Cotte ,  L. Paivikki Buchwalter ,  David Seeger ,  Raul E. Acosta

    发明人： Hariklia Deligianni ,  Robert Groves ,  Christopher Jahnes ,  Jennifer L. Lund ,  Panayotis Andricacos ,  John Cotte ,  L. Paivikki Buchwalter ,  David Seeger ,  Raul E. Acosta

    IPC分类号： H01P110

    CPC分类号： H01P1/12 ,  H01H59/0009 ,  H01H2059/0036

    摘要： Disclosed is a capacitive electrostatic MEMS RF switch comprised of a lower electrode that acts as both a transmission line and as an actuation electrode. Also, there is an array of one or more fixed beams above the lower electrode that is connected to ground. The lower electrode transmits the RF signal when the top beam or beams are up and when the upper beams are actuated and bent down, the transmission line is shunted to ground ending the RF transmission. A high dielectric constant material is used in the capacitive portion of the switch to achieve a high capacitance per unit area thus reducing the required chip area and enhancing the insertion loss characteristics in the non-actuated state. A gap between beam and lower electrode of less than 1 &mgr;m is incorporated in order to minimize the electrostatic potential (pull-in voltage) required to actuate the switch.

    摘要翻译： 公开了一种电容静电MEMS RF开关，其由作为传输线和致动电极两者的下电极组成。 此外，在下电极上方有一个或多个连接到地面的固定梁的阵列。 当顶部梁或梁向上时，下部电极发射RF信号，并且当上部梁被致动并向下弯曲时，传输线被分流到结束RF传输的地面。 在开关的电容部分中使用高介电常数材料以实现每单位面积的高电容，从而在非致动状态下减少所需的芯片面积并增强插入损耗特性。 引入小于1um的光束和下电极之间的间隙以便使致动开关所需的静电电位（拉入电压）最小化。