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公开(公告)号：US08390129B2
公开(公告)日：2013-03-05
申请号：US12945134
申请日：2010-11-12
Applicant: Chi-Chih Shen , Jen-Chuan Chen , Hui-Shan Chang , Chung-Hsi Wu , Meng-Jen Wang
Inventor： Chi-Chih Shen , Jen-Chuan Chen , Hui-Shan Chang , Chung-Hsi Wu , Meng-Jen Wang
CPC classification number: H01L23/544 , H01L23/481 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2224/16146
Abstract: The present invention relates to a semiconductor device with a plurality of mark through substrate vias, including a semiconductor substrate, a plurality of original through substrate vias and a plurality of mark through substrate vias. The original through substrate vias and the mark through substrate vias are disposed in the semiconductor substrate and protrude from the backside surface of the semiconductor substrate. The mark through substrate vias are added at a specific position and/or in a specific pattern and serve as a fiducial mark, which facilitates identifying the position and direction on the backside surface. Thus, the redistribution layer (RBL) or the special equipment for achieving the backside alignment (BSA) is not necessary.
Abstract translation: 本发明涉及具有多个标记通过衬底通孔的半导体器件，包括半导体衬底，多个原始通过衬底通孔和多个通过衬底通孔的标记。 原始通过衬底通孔和通过衬底通孔的标记设置在半导体衬底中并从半导体衬底的背面突出。 通过基板通孔的标记在特定位置和/或特定图案上添加，并且用作基准标记，这有助于识别背面上的位置和方向。 因此，不需要再分配层（RBL）或用于实现背侧对准（BSA）的专用设备。
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公开(公告)号：US08937015B2
公开(公告)日：2015-01-20
申请号：US13085311
申请日：2011-04-12
Applicant: Meng-Jen Wang , Chung-Hsi Wu
Inventor： Meng-Jen Wang , Chung-Hsi Wu
IPC: H01L21/44 , H01L21/768 , H01L23/48
CPC classification number: H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: The present invention relates to a method for forming a via in a substrate which includes the flowing steps of: (a) providing a substrate having a first surface and a second surface; (b) forming an accommodating groove and a plurality of pillars on the first surface of the substrate, the accommodating groove having a side wall and a bottom wall, the pillars remaining on the bottom wall of the accommodating groove; (c) forming a first insulating material in the accommodating groove and between the pillars; (d) removing the pillars so as to form a plurality of grooves in the first insulating material; and (e) forming a first conductive metal in the grooves. As a result, thicker insulating material can be formed in the via, and the thickness of the insulating material in the via is even.
Abstract translation: 本发明涉及一种在衬底中形成通孔的方法，该方法包括以下步骤：（a）提供具有第一表面和第二表面的衬底; （b）在所述基板的第一表面上形成容纳槽和多个柱，所述容纳槽具有侧壁和底壁，所述柱保持在所述容纳槽的底壁上; （c）在容纳槽中和柱之间形成第一绝缘材料; （d）移除所述支柱以在所述第一绝缘材料中形成多个凹槽; 和（e）在槽中形成第一导电金属。 结果，可以在通孔中形成更厚的绝缘材料，并且通孔中的绝缘材料的厚度是均匀的。
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公开(公告)号：US06861209B2
公开(公告)日：2005-03-01
申请号：US10309404
申请日：2002-12-03
Applicant: Waikin Li , Chung-Hsi Wu
Inventor： Waikin Li , Chung-Hsi Wu
CPC classification number: G03F7/405 , G03F7/0045 , G03F7/40
Abstract: A method to enhance resolution of a chemically amplified photoresist generally includes forming a relief image in the chemically amplified photoresist, wherein the relief image comprises a feature having a first dimension; and contacting the relief image with an aqueous acidic solution for a period of time effective to reduce first dimension of the relief image to a second dimension.
Abstract translation: 增强化学放大光致抗蚀剂分辨率的方法通常包括在化学放大光致抗蚀剂中形成浮雕图像，其中浮雕图像包括具有第一尺寸的特征; 并且使浮雕图像与酸性水溶液接触一段时间，以有效地将浮雕图像的第一尺寸减小到第二维度。
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公开(公告)号：US20120119335A1
公开(公告)日：2012-05-17
申请号：US12945134
申请日：2010-11-12
Applicant: Chi-Chih Shen , Jen-Chuan Chen , Hui-Shan Chang , Chung-Hsi Wu , Meng-Jen Wang
Inventor： Chi-Chih Shen , Jen-Chuan Chen , Hui-Shan Chang , Chung-Hsi Wu , Meng-Jen Wang
IPC: H01L29/41
CPC classification number: H01L23/544 , H01L23/481 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2224/16146
Abstract: The present invention relates to a semiconductor device with a plurality of mark through substrate vias, comprising a semiconductor substrate, a plurality of original through substrate vias and a plurality of mark through substrate vias. The original through substrate vias and the mark through substrate vias are disposed in the semiconductor substrate and protrude from the backside surface of the semiconductor substrate. The mark through substrate vias are added at a specific position and/or in a specific pattern and serve as a fiducial mark, which facilitates identifying to the position and direction on the backside surface. Thus, the redistribution layer (RDL) or the special equipment for achieving the backside alignment (BSA) is not necessary.
Abstract translation: 本发明涉及具有多个标记通过衬底通孔的半导体器件，包括半导体衬底，多个原始通过衬底通孔和多个通过衬底通孔的标记。 原始通过衬底通孔和通过衬底通孔的标记设置在半导体衬底中并从半导体衬底的背面突出。 通过基板通孔的标记在特定位置和/或特定图案中添加，并且用作基准标记，其有助于识别背面上的位置和方向。 因此，再分配层（RDL）或用于实现背侧对准（BSA）的专用设备是不必要的。
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公开(公告)号：US20110189852A1
公开(公告)日：2011-08-04
申请号：US13085311
申请日：2011-04-12
Applicant: Meng-Jen Wang , Chung-Hsi Wu
Inventor： Meng-Jen Wang , Chung-Hsi Wu
IPC: H01L21/28
CPC classification number: H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: The present invention relates to a method for forming a via in a substrate which includes the flowing steps of: (a) providing a substrate having a first surface and a second surface; (b) forming an accommodating groove and a plurality of pillars on the first surface of the substrate, the accommodating groove having a side wall and a bottom wall, the pillars remaining on the bottom wall of the accommodating groove; (c) forming a first insulating material in the accommodating groove and between the pillars; (d) removing the pillars so as to form a plurality of grooves in the first insulating material; and (e) forming a first conductive metal in the grooves. As a result, thicker insulating material can be formed in the via, and the thickness of the insulating material in the via is even.
Abstract translation: 本发明涉及一种在衬底中形成通孔的方法，该方法包括以下步骤：（a）提供具有第一表面和第二表面的衬底; （b）在所述基板的第一表面上形成容纳槽和多个柱，所述容纳槽具有侧壁和底壁，所述柱保持在所述容纳槽的底壁上; （c）在容纳槽中和柱之间形成第一绝缘材料; （d）移除所述支柱以在所述第一绝缘材料中形成多个凹槽; 和（e）在槽中形成第一导电金属。 结果，可以在通孔中形成更厚的绝缘材料，并且通孔中的绝缘材料的厚度是均匀的。
