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    Arithmetic unit and arithmetic processing method for operating with higher and lower clock frequencies
    4.
    发明授权
    Arithmetic unit and arithmetic processing method for operating with higher and lower clock frequencies 有权
    算术单元和算术处理方法，用于操作较高和较低的时钟频率

    公开(公告)号：US09116693B2

    公开(公告)日：2015-08-25

    申请号：US13443507

    申请日：2012-04-10

    申请人： Daisuke Suzuki ,  Minoru Saeki ,  Yuichiro Nariyoshi

    发明人： Daisuke Suzuki ,  Minoru Saeki ,  Yuichiro Nariyoshi

    IPC分类号： G06F1/04 ,  G06F1/32

    CPC分类号： G06F1/10 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/3001 ,  Y02D10/126

    摘要： There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.

    摘要翻译： 需要提供能够根据接触使用或非接触使用来操作的无电池集成电路（IC）卡，防止协处理器吞吐量降低，尽管降低的时钟频率以减少非接触下的功耗 使用，并确保非接触式使用下的高速处理。 双接口卡是能够根据联系人使用或非接触使用来操作的无电池IC卡。 双接口卡在接触式使用的高时钟下工作，在非接触式使用的情况下以低时钟工作。 目标操作包括多个不同的基本操作。 双接口卡包括基本运算电路组。 在接触使用情况下，基本算术电路组在一个周期执行目标操作的一个基本操作。 在非接触使用情况下，基本算术电路组在一个周期顺序地执行目标操作的至少两个基本操作。

    Bit generation apparatus and bit generation method
    5.
    发明授权
    Bit generation apparatus and bit generation method 有权
    位产生装置和位生成方法

    公开(公告)号：US09106213B2

    公开(公告)日：2015-08-11

    申请号：US13978598

    申请日：2011-01-13

    申请人： Koichi Shimizu ,  Daisuke Suzuki ,  Tomomi Kasuya

    发明人： Koichi Shimizu ,  Daisuke Suzuki ,  Tomomi Kasuya

    IPC分类号： H03K9/08 ,  H03K3/02 ,  H03K5/1252 ,  H04L9/32 ,  H03K19/003

    CPC分类号： H03K3/02 ,  G09C1/00 ,  H03K5/1252 ,  H03K19/003 ,  H03K19/00361 ,  H04L9/3278

    摘要： A bit generation apparatus includes a glitch generation circuit that generates glitch signals which include a plurality of pulses, and T-FF bit generation circuits which input the glitch signals, and based on either rising edges or falling edges of the plurality of pulses included in the glitch signals, generate a bit value of either 0 or 1. Each of the T-FF bit generation circuits generates a respective bit value based on either the parity of the number of rising edges or the parity of the number of falling edges of the plurality of pulses. As a result of employment of the T-FF bit generation circuits, circuits that are conventionally required but not essential for the glitch become unnecessary. This serves to prevent expansion in circuit scale and increase in processing time of bit generation for the bit generation circuit.

    摘要翻译： 位产生装置包括产生包括多个脉冲的毛刺信号的毛刺产生电路和输入毛刺信号的T-FF位产生电路，并且基于包括在多个脉冲中的多个脉冲的上升沿或下降沿 毛刺信号，产生0或1的位值.T-FF位产生电路中的每一个基于上升沿的奇偶性或多个下降沿的奇偶校验产生相应的位值 的脉冲。 作为使用T-FF位产生电路的结果，不需要通常需要但不是毛刺所必需的电路。 这用于防止电路规模的扩展，并增加位产生电路的位产生的处理时间。

    DC power supply apparatus
    6.
    发明授权
    DC power supply apparatus 有权
    直流电源装置

    公开(公告)号：US08937821B2

    公开(公告)日：2015-01-20

    申请号：US13021219

    申请日：2011-02-04

    申请人： Katsuyuki Amano ,  Daisuke Suzuki ,  Katsuhiko Saito

    发明人： Katsuyuki Amano ,  Daisuke Suzuki ,  Katsuhiko Saito

    IPC分类号： H02M1/12

    CPC分类号： H02M7/219 ,  Y02B70/1483

    摘要： A DC power supply apparatus comprising: a rectifying circuit including, a first rectifying portion, a second rectifying portion, a third rectifying portion and a fourth rectifying portion; a current detection portion; a first switching portion; and a second switching portion; wherein each of the first rectifying portion cooperatively operating with the first switching portion and the second rectifying portion cooperatively operating with the second switching portion is a semiconductor element which is formed by using a Schottky junction formed between silicon carbide or gallium nitride and metal and has a withstanding voltage property with respect to a voltage of an AC power supply.

    摘要翻译： 一种直流电源装置，包括：整流电路，包括第一整流部分，第二整流部分，第三整流部分和第四整流部分; 电流检测部分; 第一切换部; 和第二切换部分; 其中与第一开关部分和第二整流部分协同工作的第一整流部分与第二开关部分协作地操作的是通过使用在碳化硅或氮化镓和金属之间形成的肖特基结而形成的半导体元件，并且具有 相对于交流电源的电压具有耐受电压特性。

    KEY INFORMATION GENERATION DEVICE AND KEY INFORMATION GENERATION METHOD
    7.
    发明申请
    KEY INFORMATION GENERATION DEVICE AND KEY INFORMATION GENERATION METHOD 有权
    关键信息生成装置和关键信息生成方法

    公开(公告)号：US20140089685A1

    公开(公告)日：2014-03-27

    申请号：US14115251

    申请日：2011-06-02

    申请人： Daisuke Suzuki

    发明人： Daisuke Suzuki

    IPC分类号： H04L9/08

    CPC分类号： H04L9/0866 ,  G06F12/14 ,  G06F21/50 ,  G06F21/70 ,  G06F2221/21 ,  G11B20/00086 ,  H04L9/3278

    摘要： In initial generation (for example, shipping from the factory), a security device generates an identifier w specific to the security device, with the PUF technology, generates key information k (k=HF(k)) from the identifier w, generates encrypted confidential information x by encrypting (x=Enc(mk, k)) confidential information mk with the key information k, and stores the encrypted confidential information x and an authentication code h (h=HF′(k)) of the key information k, in a nonvolatile memory. In operation, the security device generates the identifier w with the PUF technology, generates the key information k from the identifier w, and decrypts the encrypted confidential information x with the key information k. At a timing where the identifier w is generated in the operation, the security device checks whether the current operating environment has largely changed from the initial generation (S311). If a change in operating environment is detected (S311→S312), the security device conducts a reset-up process (S312 to S315) of an authentication code h which is confidential information, and the encrypted confidential information x.

    摘要翻译： 在初始阶段（例如，出厂时），安全设备生成特定于安全设备的标识符w，利用PUF技术，从标识符w生成密钥信息k（k = HF（k）），生成加密 机密信息x通过用密钥信息k加密（x = Enc（mk，k））机密信息mk，并且将加密的机密信息x和密钥信息k的认证码h（h = HF'（k））存储 ，在非易失性存储器中。 在操作中，安全设备利用PUF技术生成标识符w，从标识符w生成密钥信息k，并用密钥信息k对加密的机密信息进行解密。 在操作中生成标识符w的定时，安全装置检查当前的操作环境是否从初始生成发生了很大的变化（S311）。 如果检测到操作环境发生变化（S311→S312），则安全装置进行作为机密信息的认证码h的复位处理（S312〜S315）和加密的机密信息x。

    Charge-controlling semiconductor integrated circuit and charging apparatus
    8.
    发明授权
    Charge-controlling semiconductor integrated circuit and charging apparatus 有权
    充电控制半导体集成电路和充电装置

    公开(公告)号：US08558516B2

    公开(公告)日：2013-10-15

    申请号：US12467466

    申请日：2009-05-18

    申请人： Yoshihiro Takahashi ,  Daisuke Suzuki ,  Yoshihiro Motoichi ,  Gentaro Kurokawa

    发明人： Yoshihiro Takahashi ,  Daisuke Suzuki ,  Yoshihiro Motoichi ,  Gentaro Kurokawa

    IPC分类号： H02J7/06

    CPC分类号： H02J7/00

    摘要： A charge-controlling semiconductor integrated circuit includes a current- controlling MOS transistor which is connected between a voltage input terminal and an output terminal and controls flowing current, a substratum voltage switching circuit connected between the voltage input/output terminal and a substratum to which an input/output voltage is applied, and a voltage comparison circuit to compare the input/output voltage. The charge-controlling semiconductor integrated circuit controls the substratum voltage switching circuit based on an output of the voltage comparison circuit, and the voltage comparison circuit includes an intentional offset in a first potential direction. A level shift circuit to shift the output voltage to a potential direction opposite to the first potential direction is provided in a preceding stage of a first input terminal of the voltage comparison circuit, and the input voltage is input to a second input terminal of the voltage comparison circuit.

    摘要翻译： 电荷控制半导体集成电路包括电流控制MOS晶体管，其连接在电压输入端子和输出端子之间并控制流动电流;基极电压开关电路，连接在电压输入/输出端子与基板之间， 施加输入/输出电压，以及比较输入/输出电压的电压比较电路。 电荷控制半导体集成电路基于电压比较电路的输出控制基极电压开关电路，电压比较电路包括在第一电位方向上的有意偏移。 在电压比较电路的第一输入端子的前级设置有将输出电压移位到与第一电位方向相反的电位方向的电平移位电路，输入电压输入到电压的第二输入端子 比较电路。

    CHARGE CIRCUIT
    9.
    发明申请
    CHARGE CIRCUIT 有权
    充电电路

    公开(公告)号：US20130207597A1

    公开(公告)日：2013-08-15

    申请号：US13756627

    申请日：2013-02-01

    申请人： Gentaro KUROKAWA ,  Daisuke Suzuki ,  Toshiki Sakamoto

    发明人： Gentaro KUROKAWA ,  Daisuke Suzuki ,  Toshiki Sakamoto

    IPC分类号： H02J7/00

    CPC分类号： H02J7/0052 ,  H02J7/0029 ,  H02J7/007 ,  H02J7/0073 ,  H02J2007/0039 ,  H05B37/0281

    摘要： A charge circuit includes a current limiting circuit configured to limit a current input from an input terminal; a first transistor connected between an output terminal of the current limiting circuit and a secondary battery; a charge control circuit configured to turn the first transistor on and off to start and stop supply of a charge current to the secondary battery; a second transistor configured to output a current proportional to the charge current flowing through the first transistor; and a charge timer configured to generate clock pulses according to the current output from the second transistor. The charge control circuit is configured to turn off the first transistor to stop the supply of the charge current to the secondary battery when the number of the clock pulses reaches a predetermined number.

    摘要翻译： 充电电路包括限流电路，其限制来自输入端的电流输入; 连接在限流电路的输出端子和二次电池之间的第一晶体管; 充电控制电路，被配置为使所述第一晶体管接通和断开，以开始和停止向所述二次电池供应充电电流; 第二晶体管，被配置为输出与流过所述第一晶体管的所述充电电流成比例的电流; 以及充电定时器，被配置为根据来自第二晶体管的电流输出产生时钟脉冲。 充电控制电路被配置为当时钟脉冲的数量达到预定数量时，关闭第一晶体管以停止向二次电池的充电电流的供应。

    CHARGE CONTROL DEVICE INCLUDING PROTECTIVE FUNCTION AND CELL PACK
    10.
    发明申请
    CHARGE CONTROL DEVICE INCLUDING PROTECTIVE FUNCTION AND CELL PACK 有权
    充电控制装置，包括保护功能和电池组

    公开(公告)号：US20130200847A1

    公开(公告)日：2013-08-08

    申请号：US13748174

    申请日：2013-01-23

    申请人： Gentaro KUROKAWA ,  Daisuke SUZUKI ,  Junji TAKESHITA

    发明人： Gentaro KUROKAWA ,  Daisuke SUZUKI ,  Junji TAKESHITA

    IPC分类号： H02J7/00

    CPC分类号： H02J7/0031 ,  H02J7/0042 ,  H02J2007/004

    摘要： A charge controller includes a charge control circuit that, when detecting that a charging power supply is connected, controls the charging transistor to apply the charge current; a first and second control switch element connected in series between one terminal of a secondary battery and an external terminal; and a protection circuit that, when the secondary battery is over-discharged, turns off the first control switch element to stop discharge current and when deeply discharged, turns off the second control switch element. The protection circuit sends a charge inhibit signal to the charge control circuit when the secondary battery is deeply discharged, and while receiving the charge inhibit signal, the charge control circuit keeps the charging transistor off to prevent the charge current from flowing even if detecting that the charging power supply is connected.

    摘要翻译： 充电控制器包括充电控制电路，当检测到充电电源被连接时，控制充电晶体管以施加充电电流; 串联连接在二次电池的一个端子和外部端子之间的第一和第二控制开关元件; 以及保护电路，当二次电池过放电时，关闭第一控制开关元件以停止放电电流，并且当深度放电时，关闭第二控制开关元件。 当二次电池被深度放电时，保护电路向充电控制电路发送禁止充电信号，并且在接收到充电禁止信号的同时，充电控制电路保持充电晶体管截止，以防止充电电流流动，即使检测到 充电电源连接。