公开(公告)号：US5511064A

公开(公告)日：1996-04-23

申请号：US325126

申请日：1994-10-18

申请人： Don S. Oh ,  Dong J. Shin ,  Hun Lee

发明人： Don S. Oh ,  Dong J. Shin ,  Hun Lee

IPC分类号： H04B3/23 ,  H04M3/00 ,  H04M3/24 ,  H04Q11/04 ,  H04B3/46 ,  H04J3/14

CPC分类号： H04Q11/04 ,  H04B3/23 ,  H04M3/002 ,  H04M3/244

摘要： Speech path switching control apparatus and a method for making maintenance of speech possible even upon occurrence of a fault in echo cancellation. The speech path switching control apparatus includes a time switch for receiving PCM voice data from a space switch through a switch network link and performing time slot interchange with trunk lines, an echo canceller connected to the time switch through a plurality of sub-highways to cancel echoes, an access switching processor for discriminating whether echo cancellation is required for a trunk call allocated with a particular one of the trunk lines and outputting the resultant discrimination signal, and a time switch control processor for controlling the time switch and the echo canceller in response to the discrimination signal from the access switching processor. If the echo cancellation is not required or the echo canceller is abnormal, there is formed a speech path which is not passed through the echo canceller. In the case where the echo cancellation is required and the echo canceller is normal, there is formed a speech path which is passed through the echo canceller.

摘要翻译： 语音路径切换控制装置以及即使发生回波消除中的故障也可以进行语音维护的方法。 语音路径切换控制装置包括：时间切换，用于通过交换网络链路从空间交换机接收PCM语音数据，并与中继线进行时隙交换;回波消除器，通过多条子公路连接到时间切换以取消 回波，接入切换处理器，用于鉴别分配有特定一条干线的中继线呼叫是否需要回波消除，并输出结果鉴别信号;以及时间切换控制处理器，用于响应于时间切换和回波消除器的控制 对来自接入交换处理器的识别信号。 如果不需要回波消除或回波消除器异常，则形成不通过回波消除器的语音路径。 在需要回波消除并且回波消除器正常的情况下，形成通过回声消除器的语音路径。

公开(公告)号：US5479420A

公开(公告)日：1995-12-26

申请号：US173177

申请日：1993-12-28

申请人： Jae H. Hong ,  Dong J. Shin ,  Youn K. Jeong ,  Hyeong J. Park

发明人： Jae H. Hong ,  Dong J. Shin ,  Youn K. Jeong ,  Hyeong J. Park

IPC分类号： G06F1/04 ,  G06F11/00 ,  H04L7/00 ,  G11B27/00

CPC分类号： G06F11/0757 ,  G06F1/04 ,  H04L7/0083

摘要： A circuit for determining whether a digital circuit clock is operating normally. It includes a monitoring clock receiver for receiving a monitoring clock signal, a counter reset generator which generates a first reset signal in response to the monitoring clock signal, and a reset signal receiver for receiving a second reset signal and synchronizing the second reset signal with the monitoring clock signal. The second reset signal is also used to initialize a digital circuit pack upon power-on. The circuit further includes a monitoring counter circuit for sampling and counting a reference clock signal in response to the first and second reset signals to monitor the monitoring clock signal. The reference clock signal has a frequency twice that of the monitoring clock signal. A NAND logic unit is provided for outputting the monitored result in response to an output signal from the monitoring counter circuit so that the user can determine a clock error according to the monitored result. An output hold circuit is further provided for holding the monitored result from the NAND logic unit when the monitoring clock signal is abnormal.

摘要翻译： 用于确定数字电路时钟是否正常工作的电路。 它包括用于接收监控时钟信号的监视时钟接收器，响应监视时钟信号产生第一复位信号的计数器复位发生器，以及用于接收第二复位信号并使第二复位信号与第二复位信号同步的复位信号接收器 监控时钟信号。 第二复位信号也用于在通电时初始化数字电路板。 该电路还包括监视计数器电路，用于响应于第一和第二复位信号对参考时钟信号进行采样和计数，以监视监控时钟信号。 参考时钟信号的频率是监视时钟信号的两倍。 提供NAND逻辑单元，用于响应于来自监视计数器电路的输出信号输出监视结果，使得用户可以根据监视结果确定时钟误差。 另外还提​​供一个输出保持电路，用于当监视时钟信号异常时保持来自NAND逻辑单元的监视结果。

公开(公告)号：US4924472A

公开(公告)日：1990-05-08

申请号：US241661

申请日：1988-09-08

申请人： In W. Lee ,  Dong J. Shin

发明人： In W. Lee ,  Dong J. Shin

IPC分类号： H01S3/10 ,  H01S3/134

CPC分类号： H01S3/134

摘要： A continuous-wave stabilizing apparatus wherein laser output power is stabilized by a feedback control of a voltage applied to an auxiliary electrode installed between an anode and a cathode depending on fluctuation of laser output power.

摘要翻译： 一种连续波稳定装置，其中，通过根据激光输出功率的波动，施加到安装在阳极和阴极之间的辅助电极的电压的反馈控制来稳定激光输出功率。