Memory Based Hardware Breakpoints
    1.
    发明申请
    Memory Based Hardware Breakpoints 审中-公开
    基于内存的硬件断点

    公开(公告)号:US20110154111A1

    公开(公告)日:2011-06-23

    申请号:US12962207

    申请日:2010-12-07

    IPC分类号: G06F11/07

    CPC分类号: G06F11/362

    摘要: A mechanism is provided for managing hardware breakpoints within a computing environment comprising a processor and a memory unit with addressable words being extended using metadata. A setting or deleting of a breakpoint is issued at a specific address within the memory unit by forwarding from the processor to the memory unit the metadata. An addressable word is requested from the memory unit by forwarding a physical address of the addressable word via an address bus from the processor to the memory unit. The physical address is decoded to find the addressable word within the memory unit. Responsive to the metadata associated with the addressable word being available, the metadata is provided to the processor. A checking is made as to whether a breakpoint is set in the metadata. Responsive to the breakpoint being found in the metadata, an interrupt is triggered thereby executing the breakpoint.

    摘要翻译: 提供了一种用于管理计算环境中的硬件断点的机制,包括处理器和具有可使用元数据扩展的可寻址字的存储器单元。 通过从处理器向存储器单元转发元数据,在存储器单元内的特定地址处发出断点的设置或删除。 通过经由地址总线将可寻址字的物理地址从处理器转发到存储器单元,从存储器单元请求可寻址字。 物理地址被解码以在存储器单元内找到可寻址字。 响应于与可寻址字可用的元数据相关联的元数据,元数据被提供给处理器。 检查元数据中是否设置断点。 响应于在元数据中发现的断点,触发中断从而执行断点。