Multi-channel memory access circuit
    1.
    发明授权
    Multi-channel memory access circuit 失效
    多通道存储器存取电路

    公开(公告)号:US4805094A

    公开(公告)日:1989-02-14

    申请号:US901004

    申请日:1986-08-27

    IPC分类号: G06F12/06 G06F12/02 G06F13/16

    CPC分类号: G06F13/1673

    摘要: In many situations, contiguous data is not stored at contiguous locations within a memory. This fact alone causes an increase in processor time for retrieval purposes or the intervention of a memory management unit of some type. The situation is compounded when large amounts of data must be obtained from the memory or stored in the memory in real time. This problem is addressed by arranging a dual ported memory between the main memory and the processor and transferring the desired data into the dual ported memory. A pair of buffers are then used for each channel having access to the memory. While one buffer is being read, the other is being loaded. This structure also allows multiple devices to access the single main memory substantially simultaneously.

    摘要翻译: 在许多情况下,连续数据不会存储在内存中的连续位置。 单独的事实导致处理器时间的增加用于检索目的或某种类型的存储器管理单元的干预。 当必须从存储器中获取大量数据或实时存储在存储器中时,情况才会复杂化。 通过在主存储器和处理器之间布置双端口存储器并将期望的数据传送到双端口存储器来解决该问题。 然后,对于具有访问存储器的每个通道使用一对缓冲器。 当一个缓冲区被读取时,另一个被加载。 该结构还允许多个设备基本上同时访问单个主存储器。

    Integrated switching system and announcement circuit
    2.
    发明授权
    Integrated switching system and announcement circuit 失效
    集成开关系统和公告电路

    公开(公告)号:US4817086A

    公开(公告)日:1989-03-28

    申请号:US901011

    申请日:1986-08-27

    摘要: There is disclosed a call announcement circuit arranged for connection to a communication system via a voice (or data) path and also via a separate control channel. Using this arrangement, the system main processor can control the message delivery capacity of the announcement circuit since the circuit has direct access to the internal system buses. This configuration allows detailed control of the announcement circuit on channels separate from the communication channel.

    摘要翻译: 公开了一种呼叫通知电路,其布置成经由语音(或数据)路径以及经由单独的控制信道连接到通信系统。 使用这种布置,系统主处理器可以控制通告电路的消息传递能力,因为电路可以直接访问内部系统总线。 该配置允许在与通信信道分离的信道上对通告电路进行详细的控制。