METHOD OF MEASURING TEMPERATURE OF TUNNEL MAGNETORESISTIVE EFFECT ELEMENT
    1.
    发明申请
    METHOD OF MEASURING TEMPERATURE OF TUNNEL MAGNETORESISTIVE EFFECT ELEMENT 有权
    测量隧道磁阻效应元件温度的方法

    公开(公告)号:US20090207884A1

    公开(公告)日:2009-08-20

    申请号:US12034176

    申请日:2008-02-20

    CPC classification number: G01K7/16 G01K13/00 Y10T29/49036 Y10T428/1107

    Abstract: A method of measuring temperature of a TMR element includes a step of obtaining in advance a temperature coefficient of element resistance of a discrete TMR element that is not mounted on an apparatus, by measuring temperature versus element resistance value characteristic of the discrete TMR element in a state that a breakdown voltage is intentionally applied to the discrete TMR element and a tunnel barrier layer of the discrete TMR element is brought into a stable conductive state, a step of bringing a tunnel barrier layer of a TMR element actually mounted on the apparatus into a stable conductive state by intentionally applying the breakdown voltage to the mounted TMR element having the same structure as that of the discrete TMR element whose temperature coefficient has been measured, a step of measuring an element resistance value of the mounted TMR element with the tunnel barrier layer that has been brought into a stable conductive state, and a step of obtaining a temperature corresponding to the measured element resistance value from the previously measured temperature coefficient of element resistance.

    Abstract translation: 一种测量TMR元件的温度的方法包括以下步骤:通过测量一个TMR元件中的离散TMR元件的温度对元件电阻值特性,预先获得未安装在设备上的离散TMR元件的元件电阻的温度系数 表示有意将施加击穿电压施加到离散TMR元件,使离散TMR元件的隧道势垒层进入稳定的导通状态,将实际安装在该装置上的TMR元件的隧道势垒层导入到 通过有意地将击穿电压施加到具有与已经测量了温度系数的离散TMR元件相同的结构的安装的TMR元件的稳定的导通状态,测量安装的TMR元件的元件电阻值与隧道势垒层 已经达到稳定的导电状态,以及获得温度差的步骤 响应于先前测量的元件电阻温度系数测得的元件电阻值。

    Seal inspection apparatus and method
    2.
    发明申请
    Seal inspection apparatus and method 审中-公开
    密封检查装置及方法

    公开(公告)号:US20080100288A1

    公开(公告)日:2008-05-01

    申请号:US11586390

    申请日:2006-10-25

    CPC classification number: G01N27/9046

    Abstract: A seal inspector and a method of inspecting a seal are described. A seal inspector includes an eddy current sensor for detecting changes in an eddy current within a lid seal of a can. The eddy current sensor includes a signal line for creating a magnetic field, which induces the eddy current. The induced eddy current generates a magnetic field that acts on the alternating current and as a consequence produces an eddy current response. A signal processing control unit receives the eddy current response and determines whether a value associated with the eddy current has surpassed a threshold value. If the associated value has surpassed the threshold value, the can may be ejected from a can conveyor system.

    Abstract translation: 描述了密封检查员和检查密封件的方法。 密封检查器包括涡流传感器,用于检测罐盖的盖子内的涡流的变化。 涡流传感器包括用于产生磁场的信号线,其产生涡流。 感应涡流产生作用于交流电流的磁场,并因此产生涡流响应。 信号处理控制单元接收涡电流响应并确定与涡电流相关联的值是否超过阈值。 如果相关联的值已经超过阈值,则罐可以从罐式输送机系统中排出。

    Thin-film magnetic head with heating means for adjusting magnetic spacing
    3.
    发明申请
    Thin-film magnetic head with heating means for adjusting magnetic spacing 有权
    具有用于调节磁间距的加热装置的薄膜磁头

    公开(公告)号:US20060126224A1

    公开(公告)日:2006-06-15

    申请号:US11282651

    申请日:2005-11-21

    CPC classification number: G11B5/314 G11B5/3136 G11B5/4826 G11B5/6064 G11B5/607

    Abstract: A thin-film magnetic head that the protrusion of the head end surface due to heat generated from the heating means becomes large enough to set the magnetic spacing dMS to the smaller value efficiently is provided. The head comprises: a substrate having an element-formed surface on which at least one concave portion is formed and an ABS; at least one magnetic head element formed above or on the element-formed surface; at least one thermal expansion layer embedded in the at least one concave portion; and at least one heating means positioned directly above the at least one thermal expansion layer.

    Abstract translation: 提供了由于由加热装置产生的热量而使头端表面的突出部变得足够大以将磁性间隔d MS MS 有效地设定为较小值的薄膜磁头。 头部包括:具有形成有至少一个凹部的元件形成表面的基板和ABS; 至少一个磁头元件形成在元件形成表面之上或之上; 至少一个热膨胀层嵌入在所述至少一个凹部中; 以及至少一个位于至少一个热膨胀层上方的加热装置。

    Power management system and method for peripheral devices
    4.
    发明授权
    Power management system and method for peripheral devices 有权
    外围设备的电源管理系统和方法

    公开(公告)号:US08769329B1

    公开(公告)日:2014-07-01

    申请号:US13214068

    申请日:2011-08-19

    CPC classification number: G06F1/266 G06F1/26

    Abstract: A peripheral power management system includes a power monitor for determining a power consumption characteristic of a computing processor and a controller for generating a reference power signal based on the power consumption characteristic. The peripheral power management system also includes a power regulator control signal generator for generating a power regulator control signal based on the reference power signal. The power regulator control signal controls a peripheral device power regulator which regulates an electrical supply power of a peripheral device. In this way, the peripheral power management system controls regulation of the electrical supply power of the peripheral device based on the power consumption characteristic of the computing processor. In some embodiments, the peripheral power management system determines the power consumption characteristic of the computing processor by monitoring communication on a serial voltage identification bus.

    Abstract translation: 外围电源管理系统包括用于确定计算处理器的功耗特性的功率监视器和用于基于功耗特性产生参考功率信号的控制器。 外围电源管理系统还包括功率调节器控制信号发生器,用于基于参考功率信号产生功率调节器控制信号。 电源调节器控制信号控制外围设备电源调节器,其调节外围设备的电源功率。 以这种方式,外围电源管理系统基于计算处理器的功耗特性来控制对外围设备的电力供应的调节。 在一些实施例中,外围电源管理系统通过监视串行电压识别总线上的通信来确定计算处理器的功耗特性。

    Enhanced MRAM reference bit programming structure
    5.
    发明申请
    Enhanced MRAM reference bit programming structure 失效
    增强型MRAM参考比特编程结构

    公开(公告)号:US20070165451A1

    公开(公告)日:2007-07-19

    申请号:US11335344

    申请日:2006-01-19

    Applicant: Eric Leung

    Inventor: Eric Leung

    CPC classification number: G11C11/16 G11C11/15

    Abstract: An MRAM circuit includes an MRAM array having a plurality of operational MRAM elements and a reference cell made up of one or more reference MRAM elements. A plurality of program lines within a first region are cladded with a flux-concentrating layer configured to focus a generated magnetic field while the portions of the program lines within a second region are uncladded so that the generated magnetic field is unfocused. Generally, the first region is associated with the operational MRAM elements and the second region is associated with the reference cell.

    Abstract translation: MRAM电路包括具有多个操作MRAM元件的MRAM阵列和由一个或多个参考MRAM元件构成的参考单元。 在第一区域内的多个程序行包覆有通量集中层,其被配置为聚焦所产生的磁场,同时第二区域内的程序行的部分未被包围,使得所产生的磁场未聚焦。 通常,第一区域与操作MRAM元件相关联,并且第二区域与参考单元相关联。

    ESD, cross talk and noise pickup minimizing scheme for CPP and TMR devices
    6.
    发明申请
    ESD, cross talk and noise pickup minimizing scheme for CPP and TMR devices 有权
    ESD,串扰和噪声拾取最小化方案,用于CPP和TMR器件

    公开(公告)号:US20060198057A1

    公开(公告)日:2006-09-07

    申请号:US11074251

    申请日:2005-03-07

    Abstract: A slider mounted CPP GMR or TMR read head sensor is protected from electrostatic discharge (ESD) damage and from noise and cross-talk from an adjacent write head by means of a balanced resistive/capacitative shunt. The shunt includes highly resistive interconnections between upper and lower shields of the read head and a grounded slider substrate and a low resistance interconnection between the lower pole piece of the write head and the substrate. The capacitances between the pole piece and the upper shield, the upper shield and the lower shield and the lower shield and the substrate are made equal by either forming the shields and pole piece with equal surface areas and separating them with dielectrics of equal thicknesses, or by keeping the ratio of area to insulator thicknesses equal.

    Abstract translation: 滑块安装的CPP GMR或TMR读取头传感器通过平衡的电阻/电容分流器被保护免受静电放电(ESD)损坏和来自相邻写头的噪声和串扰的影响。 分流器包括读头的上屏蔽和下屏蔽之间的高电阻互连以及接地的滑块基板和写头的下极片与衬底之间的低电阻互连。 通过形成具有相同表面积的屏蔽件和极片,并将它们与相同厚度的电介质分离,使极片与上屏蔽,上屏蔽和下屏蔽以及下屏蔽和基板之间的电容相等,或 通过保持面积与绝缘体厚度的比例相等。

    SYSTEMS, APPARATUSES AND METHODS FOR DYNAMIC VOLTAGE AND FREQUENCY CONTROL OF COMPONENTS USED IN A COMPUTER SYSTEM
    7.
    发明申请
    SYSTEMS, APPARATUSES AND METHODS FOR DYNAMIC VOLTAGE AND FREQUENCY CONTROL OF COMPONENTS USED IN A COMPUTER SYSTEM 有权
    用于计算机系统的组件的动态电压和频率控制的系统,装置和方法

    公开(公告)号:US20120054503A1

    公开(公告)日:2012-03-01

    申请号:US12872879

    申请日:2010-08-31

    Abstract: Embodiments of the present disclosure include systems, apparatuses, and methods for dynamic frequency and voltage control of components used in a computer system. A system includes a processor voltage regulator and a system clock generator directly operably with each other. The processor voltage regulator provides a core voltage signal to a processor, and is configured to detect a present processor load state of the processor. The system clock generator is for providing a system clock signal to the processor. At least one of the processor voltage regulator or the system clock generator is further configured determine a desired frequency of the system clock signal responsive to the present processor load state, and determine a voltage level for the core voltage signal suitably paired with the desired frequency for proper operation of the processor at the desired frequency. Other systems, apparatuses, and methods are provided.

    Abstract translation: 本公开的实施例包括用于计算机系统中使用的组件的动态频率和电压控制的系统,装置和方法。 系统包括处理器电压调节器和系统时钟发生器,它们彼此直接可操作。 处理器电压调节器向处理器提供核心电压信号,并且被配置为检测处理器的当前处理器负载状态。 系统时钟发生器用于向处理器提供系统时钟信号。 处理器电压调节器或系统时钟发生器中的至少一个被进一步配置以响应于当前处理器负载状态确定系统时钟信号的期望频率,并且确定与期望频率适当配对的核心电压信号的电压电平 以所需频率正确操作处理器。 提供了其他系统,装置和方法。

    Systems, apparatuses and methods for dynamic voltage and frequency control of components used in a computer system
    8.
    发明授权
    Systems, apparatuses and methods for dynamic voltage and frequency control of components used in a computer system 有权
    用于计算机系统中组件的动态电压和频率控制的系统,装置和方法

    公开(公告)号:US08732495B2

    公开(公告)日:2014-05-20

    申请号:US12872879

    申请日:2010-08-31

    Abstract: Embodiments of the present disclosure include systems, apparatuses, and methods for dynamic frequency and voltage control of components used in a computer system. A system includes a processor voltage regulator and a system clock generator directly operably with each other. The processor voltage regulator provides a core voltage signal to a processor, and is configured to detect a present processor load state of the processor. The system clock generator is for providing a system clock signal to the processor. At least one of the processor voltage regulator or the system clock generator is further configured determine a desired frequency of the system clock signal responsive to the present processor load state, and determine a voltage level for the core voltage signal suitably paired with the desired frequency for proper operation of the processor at the desired frequency. Other systems, apparatuses, and methods are provided.

    Abstract translation: 本公开的实施例包括用于计算机系统中使用的组件的动态频率和电压控制的系统,装置和方法。 系统包括处理器电压调节器和系统时钟发生器,它们彼此直接可操作。 处理器电压调节器向处理器提供核心电压信号,并且被配置为检测处理器的当前处理器负载状态。 系统时钟发生器用于向处理器提供系统时钟信号。 处理器电压调节器或系统时钟发生器中的至少一个被进一步配置以响应于当前处理器负载状态确定系统时钟信号的期望频率,并且确定与期望频率适当配对的核心电压信号的电压电平 以所需频率正确操作处理器。 提供了其他系统,装置和方法。

    Method of measuring temperature of tunnel magnetoresistive effect element
    9.
    发明授权
    Method of measuring temperature of tunnel magnetoresistive effect element 有权
    隧道磁阻效应元件温度测量方法

    公开(公告)号:US07815369B2

    公开(公告)日:2010-10-19

    申请号:US12034176

    申请日:2008-02-20

    CPC classification number: G01K7/16 G01K13/00 Y10T29/49036 Y10T428/1107

    Abstract: A method of measuring temperature of a TMR element includes a step of obtaining in advance a temperature coefficient of element resistance of a discrete TMR element that is not mounted on an apparatus, by measuring temperature versus element resistance value characteristic of the discrete TMR element in a state that a breakdown voltage is intentionally applied to the discrete TMR element and a tunnel barrier layer of the discrete TMR element is brought into a stable conductive state, a step of bringing a tunnel barrier layer of a TMR element actually mounted on the apparatus into a stable conductive state by intentionally applying the breakdown voltage to the mounted TMR element having the same structure as that of the discrete TMR element whose temperature coefficient has been measured, a step of measuring an element resistance value of the mounted TMR element with the tunnel barrier layer that has been brought into a stable conductive state, and a step of obtaining a temperature corresponding to the measured element resistance value from the previously measured temperature coefficient of element resistance.

    Abstract translation: 一种测量TMR元件的温度的方法包括以下步骤:通过测量一个TMR元件中的离散TMR元件的温度对元件电阻值特性,预先获得未安装在设备上的离散TMR元件的元件电阻的温度系数 表示有意将施加击穿电压施加到离散TMR元件,使离散TMR元件的隧道势垒层进入稳定的导通状态,将实际安装在该装置上的TMR元件的隧道势垒层导入到 通过有意地将击穿电压施加到具有与已经测量了温度系数的离散TMR元件相同的结构的安装的TMR元件的稳定的导通状态,测量安装的TMR元件的元件电阻值与隧道势垒层 已经达到稳定的导电状态,以及获得温度差的步骤 响应于先前测量的元件电阻温度系数测得的元件电阻值。

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