Backside coating for MEMS wafer
    2.
    发明授权
    Backside coating for MEMS wafer 有权
    MEMS晶圆的背面涂层

    公开(公告)号:US07153768B2

    公开(公告)日:2006-12-26

    申请号:US11056142

    申请日:2005-02-10

    CPC分类号: B81C1/00 B81B2201/047

    摘要: A transparent substrate has a micro electro-mechanical system (MEMS) on a first side of the substrate. An opaque layer is formed on a second side of the transparent substrate opposite the first side. The opaque layer comprises a first material that is removable by a MEMS release process. A second layer is formed on the opaque layer. The second layer comprises a second material that prevents contamination of a front end of line machine by the first material during a front end of line fabrication process.

    摘要翻译: 透明基板在基板的第一面上具有微电子机械系统(MEMS)。 在透明基板的与第一面相反的第二侧上形成不透明层。 不透明层包括可通过MEMS释放工艺移除的第一材料。 在不透明层上形成第二层。 第二层包括第二材料,其在线制造过程的前端期间防止第一材料的线机器的前端的污染。

    Backside coating for MEMS wafer
    3.
    发明申请
    Backside coating for MEMS wafer 有权
    MEMS晶圆的背面涂层

    公开(公告)号:US20060177992A1

    公开(公告)日:2006-08-10

    申请号:US11056142

    申请日:2005-02-10

    IPC分类号: H01L21/00 H01L21/30

    CPC分类号: B81C1/00 B81B2201/047

    摘要: A transparent substrate has a micro electromechanical system (MEMS) on a first side of the substrate. An opaque layer is formed on a second side of the transparent substrate opposite the first side. The opaque layer comprises a first material that is removable by a MEMS release process. A second layer is formed on the opaque layer. The second layer comprises a second material that prevents contamination of a front end of line machine by the first material during a front end of line fabrication process.

    摘要翻译: 透明基板在基板的第一面上具有微机电系统(MEMS)。 在透明基板的与第一面相反的第二侧上形成不透明层。 不透明层包括可通过MEMS释放工艺移除的第一材料。 在不透明层上形成第二层。 第二层包括第二材料,其在线制造过程的前端期间防止第一材料的线机器的前端的污染。

    Pyramid-shaped capacitor structure
    4.
    发明授权
    Pyramid-shaped capacitor structure 有权
    金字塔形电容器结构

    公开(公告)号:US07183171B2

    公开(公告)日:2007-02-27

    申请号:US11252328

    申请日:2005-10-17

    IPC分类号: H01L21/8242

    CPC分类号: H01L28/60

    摘要: A capacitor structure which has generally pyramidal or stepped profile to prevent or reduce dielectric layer breakdown is disclosed. The capacitor structure includes a first conductive layer, at least one dielectric layer having a first area provided on the first conductive layer and a second conductive layer provided on the at least one dielectric layer. The second conductive layer has a second area which is less than the first area of the at least one dielectric layer. A method of fabricating a capacitor structure is also disclosed.

    摘要翻译: 公开了一种电容器结构,其具有通常为锥形或阶梯形轮廓以防止或减少介电层击穿。 电容器结构包括第一导电层,至少一个电介质层,其具有设置在第一导电层上的第一区域和设置在至少一个电介质层上的第二导电层。 第二导电层具有小于至少一个电介质层的第一区域的第二区域。 还公开了一种制造电容器结构的方法。

    Method for removing solder bodies from a semiconductor wafer
    5.
    发明授权
    Method for removing solder bodies from a semiconductor wafer 有权
    从半导体晶片去除焊锡体的方法

    公开(公告)号:US06319846B1

    公开(公告)日:2001-11-20

    申请号:US09755521

    申请日:2001-01-05

    IPC分类号: H01L21302

    摘要: A method for removing a multiplicity of solder bodies connected to a semiconductor wafer through a copper wetting layer from the semiconductor wafer is disclosed. In the method, a semiconductor wafer that has on a top surface a multiplicity of solder bodies electrically connected to a multiplicity of bond pads through a multiplicity of copper wetting layers is first provided. When the multiplicity of solder bodies is found out of specification or must be removed for any other quality reasons, the semiconductor wafer is exposed to an etchant that has an etch rate toward the copper wetting layer at least 5 times the etch rate toward a metal that forms the multiplicity of bond pads. The semiconductor wafer may be removed from the etchant when the multiplicity of copper wetting layers is substantially dissolved such that the multiplicity of solder bodies is separated from the multiplicity of bond pads. The multiplicity of solder bodies may be either solder bumps or solder balls. The etchant may be a solution that contains Ce (NH4)2 (NO3)6 in a concentration range between about 3 wt. % and about 30 wt. % in water. Ultrasonic vibration may further be used to facilitate the dissolution of the copper wetting layers in the etchant.

    摘要翻译: 公开了一种通过铜浸润层从半导体晶片去除连接到半导体晶片的多个焊料体的方法。 在该方法中,首先提供在顶表面上具有多个通过多个铜润湿层电连接到多个接合焊盘的多个焊料体的半导体晶片。 当发现多个焊料体不符合规格或由于任何其他质量原因必须除去多个焊料体时,将半导体晶片暴露于蚀刻剂,蚀刻速率朝向铜润湿层的刻蚀速率至少为蚀刻速率的5倍, 形成多个接合焊盘。 当多个铜润湿层基本上被溶解使得多个焊料体与多个接合焊盘分离时,半导体晶片可以从蚀刻剂中去除。 多个焊料体可以是焊料凸块或焊球。 蚀刻剂可以是含有浓度范围为约3重量%的Ce(NH 4)2(NO 3)6的溶液。 %和约30wt。 % 在水里。 还可以使用超声振动来促进铜湿润层在蚀刻剂中的溶解。

    Pyramid-shaped capacitor structure
    7.
    发明申请
    Pyramid-shaped capacitor structure 有权
    金字塔形电容器结构

    公开(公告)号:US20060197091A1

    公开(公告)日:2006-09-07

    申请号:US11252328

    申请日:2005-10-17

    CPC分类号: H01L28/60

    摘要: A capacitor structure which has generally pyramidal or stepped profile to prevent or reduce dielectric layer breakdown is disclosed. The capacitor structure includes a first conductive layer, at least one dielectric layer having a first area provided on the first conductive layer and a second conductive layer provided on the at least one dielectric layer. The second conductive layer has a second area which is less than the first area of the at least one dielectric layer. A method of fabricating a capacitor structure is also disclosed.

    摘要翻译: 公开了一种电容器结构,其具有通常为锥形或阶梯形轮廓以防止或减少介电层击穿。 电容器结构包括第一导电层,至少一个电介质层,其具有设置在第一导电层上的第一区域和设置在至少一个电介质层上的第二导电层。 第二导电层具有小于至少一个电介质层的第一区域的第二区域。 还公开了一种制造电容器结构的方法。