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    RESISTIVE MEMORY ELEMENTS WITH A MULTIPLE-MATERIAL ELECTRODE
    2.
    发明申请
    RESISTIVE MEMORY ELEMENTS WITH A MULTIPLE-MATERIAL ELECTRODE 有权

    公开(公告)号：US20250057058A1

    公开(公告)日：2025-02-13

    申请号：US18232868

    申请日：2023-08-11

    Applicant: GlobalFoundries Singapore Pte. Ltd.

    Inventor： Curtis Chun-I Hsieh ,  Kai Kang

    IPC: H10N70/00 ,  H10B63/00

    Abstract: Structures for a resistive memory element and methods of forming a structure for a resistive memory element. The structure comprises a resistive memory element including a first electrode, a second electrode, and a switching layer between the first electrode and the second electrode. The first electrode includes a first metal feature and a second metal feature inside the first metal feature. The first metal feature comprising a first metal, and the second metal feature comprises a second metal with a different composition than the first metal. The first metal feature adjoins a first portion of the switching layer, and the second metal feature adjoins a second portion of the switching layer.

    Lateral multi-bit memory devices and methods of making the same
    3.
    发明授权
    Lateral multi-bit memory devices and methods of making the same 有权

    公开(公告)号：US12193243B2

    公开(公告)日：2025-01-07

    申请号：US17650084

    申请日：2022-02-07

    Applicant: GlobalFoundries Singapore Pte. Ltd.

    Inventor： Desmond Jia Jun Loy ,  Eng Huat Toh ,  Shyue Seng Tan

    IPC: H10B63/00 ,  H10N70/00 ,  H10N70/20

    Abstract: The disclosed subject matter relates generally to structures, memory devices and methods of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices having two resistive layers and a conductive layer arranged between two electrodes. The present disclosure provides a memory device including a first electrode above an interlayer dielectric region, a second electrode above the interlayer dielectric region, the second electrode is laterally adjacent to the first electrode, a conductive layer between the first electrode and the second electrode, in which the conductive layer is electrically isolated, a first resistive layer between the first electrode and the conductive layer, and a second resistive layer between the second electrode and the conductive layer.

    Field-effect transistors with airgap spacers
    4.
    发明授权
    Field-effect transistors with airgap spacers 有权

    公开(公告)号：US12176405B1

    公开(公告)日：2024-12-24

    申请号：US18664386

    申请日：2024-05-15

    Applicant: GlobalFoundries Singapore Pte. Ltd.

    Inventor： Khee Yong Lim ,  Xinfu Liu ,  Xiao Mei Elaine Low

    IPC: H01L29/417 ,  H01L21/764 ,  H01L29/423 ,  H01L29/66

    Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The structure comprises a semiconductor layer, a first raised source/drain region on the semiconductor layer, a second raised source/drain region on the semiconductor layer, a gate electrode laterally between the first raised source/drain region and the second raised source/drain region, a first airgap laterally between the first raised source/drain region and the gate electrode, and a second airgap laterally between the second raised source/drain region and the gate electrode. The gate electrode includes a first section and a second section between the first section and the semiconductor layer, the first section of the gate electrode has a first width, the second section of the gate electrode has a second width, and the first width is greater than the second width.

    NON-VOLATILE PROGRAMMABLE DEVICES WITH FILAMENT CONFINEMENT
    7.
    发明申请
    NON-VOLATILE PROGRAMMABLE DEVICES WITH FILAMENT CONFINEMENT 有权

    公开(公告)号：US20240381794A1

    公开(公告)日：2024-11-14

    申请号：US18195414

    申请日：2023-05-10

    Applicant: GlobalFoundries Singapore Pte. Ltd.

    Inventor： Xinshu Cai ,  Shyue Seng Tan

    IPC: H01L29/94

    Abstract: Structures for a non-volatile programmable device and methods of forming a structure for a non-volatile programmable device. The structure comprises a first electrode including a corner and a sidewall that extends to the corner, a first dielectric layer adjacent to the first sidewall, a second dielectric layer adjacent to the first dielectric layer, and a second electrode including a portion inside a recess between the first dielectric layer and the second dielectric layer. The portion of the second electrode is disposed adjacent to the corner of the first electrode.

    Deep trench isolation structures with a substrate connection
    8.
    发明授权
    Deep trench isolation structures with a substrate connection 有权

    公开(公告)号：US12136649B2

    公开(公告)日：2024-11-05

    申请号：US17723665

    申请日：2022-04-19

    Applicant: GlobalFoundries Singapore Pte. Ltd.

    Inventor： Jianbo Zhou ,  Shiang Yang Ong ,  Namchil Mun ,  Hung Chang Liao ,  Zhongxiu Yang

    IPC: H01L29/00 ,  H01L21/762 ,  H01L29/06

    Abstract: Semiconductor structures including a deep trench isolation structure and methods of forming a semiconductor structure including a deep trench isolation structure. The semiconductor structure includes a semiconductor substrate having a device region, and a deep trench isolation structure in the semiconductor substrate. The deep trench isolation structure further includes a first portion, a second portion adjacent to the first portion, and a conductor layer in the first portion and the second portion. The conductor layer in the first portion of the deep trench isolation structure surrounds the device region. The conductor layer in the second portion of the deep trench isolation structure defines an electrical connection to the semiconductor substrate.

    RESISTIVE RANDOM-ACCESS MEMORY ELEMENTS WITH LATERAL SIDEWALL SWITCHING
    9.
    发明公开
    RESISTIVE RANDOM-ACCESS MEMORY ELEMENTS WITH LATERAL SIDEWALL SWITCHING 审中-公开

    公开(公告)号：US20240365566A1

    公开(公告)日：2024-10-31

    申请号：US18140677

    申请日：2023-04-28

    Applicant: GlobalFoundries Singapore Pte. Ltd.

    Inventor： Kai Kang ,  Curtis Chun-I Hsieh ,  Jianxun Sun ,  Juan Boon Tan

    IPC: H10B63/00

    CPC classification number: H10B63/80

    Abstract: Structures for a resistive random-access memory element and methods of forming a structure for a resistive random-access memory element. The structure comprises an interlayer dielectric layer including a first trench having a sidewall and a second trench having a sidewall adjacent to the sidewall of the first trench. The structure further comprises a first layer on the sidewall of the first trench, a second layer inside the second trench, and a third layer on the sidewall of the second trench. The first layer comprises a first metal, the second layer comprises a second metal, and the third layer comprises a dielectric material. The third layer includes a portion positioned between the first layer and the second layer.

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