Method And System For Hybrid Integration Of Optical Communication Systems
    1.
    发明申请
    Method And System For Hybrid Integration Of Optical Communication Systems 有权
    光通信系统混合集成方法与系统

    公开(公告)号:US20120301149A1

    公开(公告)日:2012-11-29

    申请号:US13568406

    申请日:2012-08-07

    IPC分类号: H04B10/02

    摘要: Methods and systems for hybrid integration of optical communication systems are disclosed and may include receiving continuous wave (CW) optical signals in a silicon photonics die (SPD) from an optical source external to the SPD. The received CW optical signals may be processed based on electrical signals received from an electronics die bonded to the SPD via metal interconnects. Modulated optical signals may be received in the SPD from optical fibers coupled to the SPD. Electrical signals may be generated in the SPD based on the received modulated optical signals and communicated to the electronics die via the metal interconnects. The CW optical signals may be received from an optical source assembly coupled to the SPD and/or from one or more optical fibers coupled to the SPD. The received CW optical signals may be processed utilizing one or more optical modulators, which may comprise Mach-Zehnder interferometer modulators.

    摘要翻译: 公开了用于光通信系统的混合集成的方法和系统,并且可以包括在来自SPD外部的光源的硅光子管芯(SPD)中接收连续波(CW)光信号。 接收到的CW光信号可以基于从通过金属互连结合到SPD的电子管芯接收的电信号进行处理。 可以在SPD中从耦合到SPD的光纤接收调制的光信号。 电信号可以基于接收到的调制光信号在SPD中产生,并通过金属互连传送到电子管芯。 CW光信号可以从耦合到SPD的光源组件和/或从耦合到SPD的一个或多个光纤接收。 可以使用一个或多个光学调制器来处理接收的CW光信号,该调制器可以包括马赫 - 曾德干涉仪调制器。

    Method and System for Optoelectronic Receivers Utilizing Waveguide Heterojunction Phototransistors Integrated in a CMOS SOI Wafer
    2.
    发明申请
    Method and System for Optoelectronic Receivers Utilizing Waveguide Heterojunction Phototransistors Integrated in a CMOS SOI Wafer 有权
    集成在CMOS SOI晶圆中的波导异质结光电晶体管的光电接收机的方法和系统

    公开(公告)号:US20110042553A1

    公开(公告)日:2011-02-24

    申请号:US12859016

    申请日:2010-08-18

    IPC分类号: H03F3/08 H01J40/14

    摘要: A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via optical fibers operably coupled to a top surface of the chip. Electrical signals may be generated utilizing HPTs that detect the optical signals. The electrical signals may be amplified via voltage amplifiers, or transimpedance amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. The optical signals may be coupled into opposite ends of the HPTs. A collector of the HPTs may comprise a silicon layer and a germanium layer, a base may comprise a silicon germanium alloy with germanium composition ranging from 70% to 100%, and an emitter including crystalline or poly Si or SiGe. The optical signals may be demodulated by communicating a mixer signal to a base terminal of the HPTs.

    摘要翻译: 公开了一种利用集成在CMOS SOI晶片中的波导异质结光电晶体管(HPT)的光电子接收器的方法和系统,并且可以包括通过可操作地耦合到芯片顶表面的光纤接收光信号。 可以利用检测光信号的HPT产生电信号。 电信号可以经由电压放大器或跨阻放大器来放大,其输出可用于通过反馈网络偏置HPT。 光信号可以耦合到HPT的相对端。 HPT的集电极可以包括硅层和锗层,碱可以包括具有70%至100%的锗组成的硅锗合金,以及包括晶体或多晶硅或SiGe的发射极。 可以通过将混合器信号传送到HPT的基站来解调光信号。

    Design of CMOS Integrated Germanium Photodiodes
    3.
    发明申请
    Design of CMOS Integrated Germanium Photodiodes 有权
    CMOS集成锗光电二极管的设计

    公开(公告)号:US20080193076A1

    公开(公告)日:2008-08-14

    申请号:US11735251

    申请日:2007-04-13

    CPC分类号: G02B6/12007

    摘要: A CMOS processing compatible germanium on silicon integrated waveguide photodiode. Positioning contacts in predicted low optical field regions, establishing side trenches in the silicon layer along the length of the photodiode reduces optical losses. Novel taper dimensions are selected based on the desirability of expected operational modes, reducing optical losses when light is injected from the silicon layer to the germanium layer. Reduced vertical mismatch systems have improved coupling between waveguide and photodiode. Light is coupled into and/or out of a novel silicon ring resonator and integrated waveguide photodiode system with reduced optical losses by careful design of the geometry of the optical path. An integrated waveguide photodiode with a reflector enables transmitted light to reflect back through the integrated waveguide photodiode, improving sensitivity. Careful selection of the dimensions of a novel integrated waveguide microdisk photodiode system results in reduced scattering. Improved sensitivity integrated waveguide photodiodes comprise integrated heaters.

    摘要翻译: CMOS处理兼容锗硅集成波导光电二极管。 在预测的低光场区域中定位触点,沿着光电二极管的长度在硅层中建立侧沟槽减少光损耗。 基于期望的操作模式的期望来选择新的锥形尺寸,当光从硅层注入到锗层时减小光学损耗。 减少的垂直失配系统改善了波导和光电二极管之间的耦合。 通过仔细设计光路的几何形状,光被耦合到新的硅环谐振器和集成波导光电二极管系统中并减少光损耗。 具有反射器的集成波导光电二极管使得透射光能够通过集成波导光电二极管反射回来,从而提高灵敏度。 仔细选择新型集成波导微盘光电二极管系统的尺寸导致散射减少。 集成波导光电二极管的灵敏度提高集成加热器。

    Germanium integrated CMOS wafer and method for manufacturing the same
    4.
    发明授权
    Germanium integrated CMOS wafer and method for manufacturing the same 有权
    锗集成CMOS晶片及其制造方法

    公开(公告)号:US07262117B1

    公开(公告)日:2007-08-28

    申请号:US11064035

    申请日:2005-02-22

    IPC分类号: H01L21/20

    摘要: The present invention discloses an integration flow of germanium into a conventional CMOS process, with improvements in performing selective area growth, and implementing electrical contacts to the germanium, in a way that has minimal impact on the preexisting transistor devices. The present invention also provides methods to integrate the germanium without impacting the optical or electrical performance of these devices, except where intended, such as in a germanium photodetector, or germanium waveguide photodetector.

    摘要翻译: 本发明公开了以对现有晶体管器件具有最小影响的方式,将锗转化为常规CMOS工艺的集成流程,其中改进了选择性区域生长并实现与锗的电接触。 本发明还提供了在不影响这些器件的光学或电气性能的情况下集成锗的方法,除非例如在锗光电探测器或锗波导光电探测器中。

    METHOD AND SYSTEM FOR MONOLITHIC INTEGRATION OF PHOTONICS AND ELECTRONICS IN CMOS PROCESSES
    5.
    发明申请
    METHOD AND SYSTEM FOR MONOLITHIC INTEGRATION OF PHOTONICS AND ELECTRONICS IN CMOS PROCESSES 有权
    CMOS工艺中光电子和电子单片集成的方法与系统

    公开(公告)号:US20100059822A1

    公开(公告)日:2010-03-11

    申请号:US12554449

    申请日:2009-09-04

    IPC分类号: H01L27/12 H01L21/782

    摘要: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

    摘要翻译: 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统,并且可以包括在具有不同硅层厚度的单个CMOS晶片上制造光子和电子器件。 利用体CMOS工艺和/或利用SOI CMOS工艺的SOI晶片,可以在绝缘体上半导体(SOI)晶片上制造器件。 可以使用双重SOI工艺和/或选择性区域生长工艺来制造不同的厚度。 可以利用一个或多个氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。 硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。 可以利用选择性背面蚀刻来制造包覆层。 可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。 集成在CMOS晶片中的二氧化硅或硅锗可以用作蚀刻停止层。

    Germanium silicon heterostructure photodetectors
    6.
    发明授权
    Germanium silicon heterostructure photodetectors 失效
    锗硅异质结构光电探测器

    公开(公告)号:US07397101B1

    公开(公告)日:2008-07-08

    申请号:US11177132

    申请日:2005-07-07

    IPC分类号: H01L31/00

    摘要: A horizontal germanium silicon heterostructure photodetector comprising a horizontal germanium p-i-n diode disposed over a horizontal parasitic silicon p-i-n diode uses silicon contacts for electrically coupling to the germanium p-i-n through the p-type doped and n-type doped regions in the silicon p-i-n without requiring direct physical contact to germanium material. The current invention may be optically coupled to on-chip and/or off-chip optical waveguide through end-fire or evanescent coupling. In some cases, the doping of the germanium p-type doped and/or n-type doped region may be accomplished based on out-diffusion of dopants in the doped silicon material of the underlying parasitic silicon p-i-n during high temperature steps in the fabrication process such as, the germanium deposition step(s), cyclic annealing, contact annealing and/or dopant activation.

    摘要翻译: 水平锗硅异质结构光电探测器,其包括设置在水平寄生硅pin二极管上的水平锗pin二极管,使用硅触点,通过硅引脚中的p型掺杂区域和n型掺杂区域与锗引脚电耦合,而不需要直接物理 与锗材料接触。 本发明可以通过端火或渐逝耦合光耦合到片上和/或片外光波导。 在一些情况下,可以基于在制造过程中的高温步骤期间基底寄生硅引脚的掺杂硅材料中的掺杂剂的扩散扩散来实现锗p型掺杂和/或n型掺杂区域的掺杂 例如锗沉积步骤,循环退火,接触退火和/或掺杂剂激活。

    Monolithic integration of photonics and electronics in CMOS processes
    7.
    发明授权
    Monolithic integration of photonics and electronics in CMOS processes 有权
    光电子学与电子学在CMOS工艺中的整体集成

    公开(公告)号:US09053980B2

    公开(公告)日:2015-06-09

    申请号:US13364845

    申请日:2012-02-02

    摘要: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices with at least a portion of each of the wafers bonded together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.

    摘要翻译: 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统,并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件用于光子和电子器件,其中每个晶片的至少一部分结合在一起 其中第一CMOS晶片包括光子器件,并且第二CMOS晶片包括电子器件。 电子器件可以利用穿硅通孔耦合到光学器件。 可以使用选择性区域生长过程来制造不同的厚度。 可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。 硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。 可以利用选择性背面蚀刻来制造包覆层。 可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

    Method and system for multi-mode integrated receivers
    8.
    发明授权
    Method and system for multi-mode integrated receivers 有权
    多模式集成接收机的方法和系统

    公开(公告)号:US08923664B2

    公开(公告)日:2014-12-30

    申请号:US13156990

    申请日:2011-06-09

    摘要: A method and system for multi-mode integrated receivers are disclosed and may include receiving an optical signal from an optical fiber coupled to a chip comprising a photonic circuit. The photonic circuit may comprise an optical coupler, one or more multi-mode optical waveguides, and a detector. The received optical signal may be coupled to a plurality of optical modes in the one or more multi-mode optical waveguides, which are communicated to a detector to generate an electrical signal from the communicated modes. The optical coupler may comprise a grating coupler. The chip may comprise a CMOS chip, and the optical fiber may comprise a single-mode or a multi-mode fiber. The detector may comprise a germanium or silicon-germanium photodiode, and/or a waveguide detector. The optical fiber may be coupled to a top surface of the chip and the multi-mode optical waveguides may comprise rib waveguides.

    摘要翻译: 公开了一种用于多模式集成接收机的方法和系统,并且可以包括从耦合到包括光子电路的芯片的光纤接收光信号。 光子电路可以包括光耦合器,一个或多个多模光波导和检测器。 接收到的光信号可以耦合到一个或多个多模光波导中的多个光模,其被传送到检测器以从所传送的模式产生电信号。 光耦合器可以包括光栅耦合器。 芯片可以包括CMOS芯片,并且光纤可以包括单模或多模光纤。 检测器可以包括锗或硅锗光电二极管和/或波导检测器。 光纤可以耦合到芯片的顶表面,并且多模光波导可以包括肋波导。

    Monolithic Integration Of Photonics And Electronics In CMOS Processes
    9.
    发明申请
    Monolithic Integration Of Photonics And Electronics In CMOS Processes 有权
    CMOS工艺中光子学与电子学的一体化

    公开(公告)号:US20120132993A1

    公开(公告)日:2012-05-31

    申请号:US13364909

    申请日:2012-02-02

    IPC分类号: H01L27/12 H01L21/782

    摘要: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices bonded to at least a portion of each of the wafers together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.

    摘要翻译: 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统,并且可以包括在具有不同硅层厚度的两个CMOS晶片上制造光子和电子器件,用于光子和电子器件,其结合到每个晶片的至少一部分 其中第一CMOS晶片包括光子器件,并且第二CMOS晶片包括电子器件。 电子器件可以利用穿硅通孔耦合到光学器件。 可以使用选择性区域生长过程来制造不同的厚度。 可以使用氧注入和/或在CMOS晶片上利用CMOS沟槽氧化物来制造覆层。 硅可以利用外延横向过度生长沉积在CMOS沟槽氧化物上。 可以利用选择性背面蚀刻来制造包覆层。 可以通过在选择性蚀刻的区域上沉积金属来制造反射表面。

    METHOD AND SYSTEM FOR MULTI-MODE INTEGRATED RECEIVERS
    10.
    发明申请
    METHOD AND SYSTEM FOR MULTI-MODE INTEGRATED RECEIVERS 有权
    多模式集成接收机的方法与系统

    公开(公告)号:US20110305416A1

    公开(公告)日:2011-12-15

    申请号:US13156990

    申请日:2011-06-09

    IPC分类号: G02B6/26

    摘要: A method and system for multi-mode integrated receivers are disclosed and may include receiving an optical signal from an optical fiber coupled to a chip comprising a photonic circuit. The photonic circuit may comprise an optical coupler, one or more multi-mode optical waveguides, and a detector. The received optical signal may be coupled to a plurality of optical modes in the one or more multi-mode optical waveguides, which are communicated to a detector to generate an electrical signal from the communicated modes. The optical coupler may comprise a grating coupler. The chip may comprise a CMOS chip, and the optical fiber may comprise a single-mode or a multi-mode fiber. The detector may comprise a germanium or silicon-germanium photodiode, and/or a waveguide detector. The optical fiber may be coupled to a top surface of the chip and the multi-mode optical waveguides may comprise rib waveguides.

    摘要翻译: 公开了一种用于多模式集成接收机的方法和系统,并且可以包括从耦合到包括光子电路的芯片的光纤接收光信号。 光子电路可以包括光耦合器,一个或多个多模光波导和检测器。 所接收的光信号可以耦合到一个或多个多模光波导中的多个光模,其被传送到检测器以从所传送的模式产生电信号。 光耦合器可以包括光栅耦合器。 芯片可以包括CMOS芯片,并且光纤可以包括单模或多模光纤。 检测器可以包括锗或硅锗光电二极管和/或波导检测器。 光纤可以耦合到芯片的顶表面,并且多模光波导可以包括肋波导。