公开(公告)号：US08825912B2

公开(公告)日：2014-09-02

申请号：US12564493

申请日：2009-09-22

申请人： Gregg Lahti ,  Rodney Pesavento ,  Joseph W. Triece ,  D. C. Sessions

发明人： Gregg Lahti ,  Rodney Pesavento ,  Joseph W. Triece ,  D. C. Sessions

IPC分类号： G06F3/00 ,  G06F13/28 ,  G06F13/12

CPC分类号： G06F13/124 ,  G06F13/28 ,  Y02D10/14

摘要： A microcontroller or integrated system has a bus, a plurality of peripheral devices each one coupled with the bus, a non-volatile memory, and a state machine coupled with the non-volatile memory and being operable to initialize the peripheral devices by reading initialization information from the non-volatile memory and writing it to the peripheral devices.

摘要翻译： 微控制器或集成系统具有总线，与总线耦合的多个外围设备，非易失性存储器和与非易失性存储器耦合的状态机，并且可操作以通过读取初始化信息来初始化外围设备 从非易失性存储器写入外围设备。

公开(公告)号：US20100121988A1

公开(公告)日：2010-05-13

申请号：US12564493

申请日：2009-09-22

申请人： Gregg Lahti ,  Rodney Pesavento ,  Joseph W. Triece ,  D.C. Sessions

发明人： Gregg Lahti ,  Rodney Pesavento ,  Joseph W. Triece ,  D.C. Sessions

IPC分类号： G06F3/00

CPC分类号： G06F13/124 ,  G06F13/28 ,  Y02D10/14

摘要： A microcontroller or integrated system has a bus, a plurality of peripheral devices each one coupled with the bus, a non-volatile memory, and a state machine coupled with the non-volatile memory and being operable to initialize the peripheral devices by reading initialization information from the non-volatile memory and writing it to the peripheral devices.

摘要翻译： 微控制器或集成系统具有总线，与总线耦合的多个外围设备，非易失性存储器和与非易失性存储器耦合的状态机，并且可操作以通过读取初始化信息来初始化外围设备 从非易失性存储器写入外围设备。

公开(公告)号：US09946667B2

公开(公告)日：2018-04-17

申请号：US12560688

申请日：2009-09-16

申请人： Gregg Lahti ,  Steven Dawson

发明人： Gregg Lahti ,  Steven Dawson

IPC分类号： G06F13/24

CPC分类号： G06F13/24

摘要： A microcontroller may have a central processing unit (CPU); a programmable logic device receiving input signals and having input/outputs coupled with external pins, and an interrupt control unit receiving at least one of the internal input signals or being coupled with at least one of the input/outputs and generating an interrupt signal fed to the CPU.

公开(公告)号：US20100122007A1

公开(公告)日：2010-05-13

申请号：US12560688

申请日：2009-09-16

申请人： Gregg Lahti ,  Steven Dawson

发明人： Gregg Lahti ,  Steven Dawson

IPC分类号： G06F13/24

CPC分类号： G06F13/24

摘要： A microcontroller may have a central processing unit (CPU); a programmable logic device receiving input signals and having input/outputs coupled with external pins, and an interrupt control unit receiving at least one of the internal input signals or being coupled with at least one of the input/outputs and generating an interrupt signal fed to the CPU.

摘要翻译： 微控制器可以具有中央处理单元（CPU）; 可编程逻辑器件，其接收输入信号并具有与外部引脚耦合的输入/输出;以及中断控制单元，其接收所述内部输入信号中的至少一个或与所述输入/输出中的至少一个耦合，并产生馈送到 CPU。