Saturation-based loop control assistance
    1.
    发明授权
    Saturation-based loop control assistance 有权
    基于饱和度的回路控制辅助

    公开(公告)号:US08854750B2

    公开(公告)日:2014-10-07

    申请号:US13562140

    申请日:2012-07-30

    IPC分类号: G11B5/02

    CPC分类号: H03G3/3052 G11B20/10009

    摘要: The present inventions are related to systems and methods for data processing, and more particularly to data processing using distortion-correction loops with saturation-based assistance.

    摘要翻译: 本发明涉及用于数据处理的系统和方法,更具体地涉及使用基于饱和的协助的失真校正循环的数据处理。

    Zero gain start bias estimation
    2.
    发明授权
    Zero gain start bias estimation 有权
    零增益启动偏差估计

    公开(公告)号:US08824087B2

    公开(公告)日:2014-09-02

    申请号:US13564763

    申请日:2012-08-02

    IPC分类号: G11B5/03

    CPC分类号: G11B5/09 G11B2005/0008

    摘要: A method and system for estimating a zero gain start (ZGS) bias in a read channel is disclosed. The method may include: receiving preamble samples within a fixed-length window selected for ZGS calculation; calculating an energy associated with a 2T frequency in the preamble samples; calculating an energy associated with non-2T frequencies in the preamble samples; and calculating the ZGS bias based on the energy associated with the 2T frequency in the preamble samples and the energy associated with non-2T frequencies in the preamble samples.

    摘要翻译: 公开了一种用于估计读取通道中的零增益开始(ZGS)偏置的方法和系统。 该方法可以包括:在为ZGS计算选择的固定长度窗口内接收前导码样本; 计算在前导码样本中与2T频率相关联的能量; 计算在前导码样本中与非2T频率相关联的能量; 并且基于在前导码样本中与2T频率相关联的能量和与前同步码样本中的非2T频率相关联的能量来计算ZGS偏差。

    Systems and methods for post processing gain correction
    3.
    发明授权
    Systems and methods for post processing gain correction 有权
    后处理增益校正系统和方法

    公开(公告)号:US08760991B2

    公开(公告)日:2014-06-24

    申请号:US13539709

    申请日:2012-07-02

    申请人: Haotian Zhang

    发明人: Haotian Zhang

    IPC分类号: G11B7/00

    摘要: Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing system is disclosed that includes: a data detector circuit, a filter circuit, a gain error generation circuit, and a multiplier circuit. The data detector circuit is operable to apply a data detection algorithm to a data set to yield a detected output. The filter circuit is operable to filter the detected output to yield a filtered output. The gain error generation circuit is operable to calculate an error value based upon a combination of an instance of the data set and a corresponding instance of the filtered output. The multiplier circuit operable to multiply the instance of the data set by a gain feedback value to yield a gain corrected output. The gain feedback value is derived from the error value.

    摘要翻译: 本发明的各种实施例提供用于数据处理的电路,系统和方法。 例如,公开了一种数据处理系统,其包括:数据检测器电路,滤波器电路,增益误差产生电路和乘法器电路。 数据检测器电路可操作以将数据检测算法应用于数据集以产生检测到的输出。 滤波器电路可操作以对所检测的输出进行滤波以产生滤波输出。 增益误差产生电路可操作以基于数据集的实例与滤波输出的对应实例的组合来计算误差值。 乘法器电路可操作以将数据集的实例乘以增益反馈值以产生增益校正输出。 增益反馈值来自误差值。

    Automatic filter-reset mechanism
    4.
    发明授权
    Automatic filter-reset mechanism 失效
    自动过滤器复位机构

    公开(公告)号:US08422609B2

    公开(公告)日:2013-04-16

    申请号:US12570326

    申请日:2009-09-30

    IPC分类号: H04B1/10

    摘要: In one embodiment, a (hard-drive) read channel has a (DFIR equalization) filter, whose tap coefficients are adaptively updated. A reset controller monitors an (LLR) signal generated downstream of the filter to automatically determine when to reset the filter, e.g., by reloading an initial set of user-specified tap coefficients. For LLR values, the reset controller determines to reset the filter when the reset controller detects that too many recent LLR values have confidence values that are too low. When implemented in a hard-drive read channel, the reset controller can reset the filter one or more times during read operations within a sector of the hard drive.

    摘要翻译: 在一个实施例中,(硬盘驱动器)读通道具有(DFIR均衡)滤波器,其抽头系数被自适应地更新。 复位控制器监视在滤波器下游产生的(LLR)信号,以自动确定何时复位滤波器,例如通过重新加载用户指定的抽头系数的初始集合。 对于LLR值,当复位控制器检测到过多的近期LLR值具有太低的置信度值时,复位控制器确定复位滤波器。 当在硬盘驱动器读取通道中实现时,复位控制器可以在硬盘驱动器的扇区内的读取操作期间复位一次或多次过滤器。

    Systems and methods for filter constraint estimation
    5.
    发明授权
    Systems and methods for filter constraint estimation 有权
    滤波器约束估计的系统和方法

    公开(公告)号:US09219469B2

    公开(公告)日:2015-12-22

    申请号:US12887330

    申请日:2010-09-21

    IPC分类号: H03H7/30 H04N11/02 H03H17/02

    CPC分类号: H03H17/0289 H03H17/0294

    摘要: Various embodiments of the present invention provide systems and methods for calibrating a data processing circuit. For example, a method for calibrating a data processing circuit is discussed that includes providing a digital filter, providing a detector circuit, and providing an analog filter. Operation of the digital filter is at least in part governed by filter taps that correspond to a filter tap constraint value. Operation of the detector circuit is at least in part governed by a target parameter. Operation of the analog filter is at least in part governed by an analog parameter that is one of a plurality of analog parameters. The methods further include selecting a target parameter, and calculating the filter tap constraint value based on the target parameter. Combinations of the target parameter, the calculated filter tap constraint value, and each of the plurality of analog parameters are applied to identify the analog parameter.

    摘要翻译: 本发明的各种实施例提供了用于校准数据处理电路的系统和方法。 例如,讨论了一种用于校准数据处理电路的方法,其包括提供数字滤波器,提供检测器电路和提供模拟滤波器。 数字滤波器的操作至少部分地由对应于滤波器抽头约束值的滤波器抽头来控制。 检测器电路的操作至少部分地由目标参数控制。 模拟滤波器的操作至少部分地由作为多个模拟参数之一的模拟参数来控制。 所述方法还包括选择目标参数,以及基于所述目标参数来计算所述滤波器抽头约束值。 应用目标参数,计算滤波器抽头约束值和多个模拟参数中的每一个的组合以识别模拟参数。

    Nyquist constrained digital finite impulse response filter
    6.
    发明授权
    Nyquist constrained digital finite impulse response filter 有权
    奈奎斯特约束数字有限脉冲响应滤波器

    公开(公告)号:US08996597B2

    公开(公告)日:2015-03-31

    申请号:US13272209

    申请日:2011-10-12

    摘要: Various embodiments of the present invention provide apparatuses and methods for filtering a digital signal with a Nyquist constrained digital finite impulse response filter. For example, an apparatus for filtering digital data is disclosed that includes a digital finite impulse response filter having a plurality of taps. The apparatus also includes a tap weight controller connected to the digital finite impulse response filter, operable to adjust a tap weight for each of a subset of the taps such that a magnitude of a Nyquist response of the digital finite impulse response filter remains within a constraint range.

    摘要翻译: 本发明的各种实施例提供了用奈奎斯特约束数字有限脉冲响应滤波器对数字信号进行滤波的装置和方法。 例如,公开了一种用于对数字数据进行滤波的装置,其包括具有多个抽头的数字有限脉冲响应滤波器。 该装置还包括连接到数字有限脉冲响应滤波器的抽头加权控制器,可操作以调整抽头子集中的每一个的抽头权重,使得数字有限脉冲响应滤波器的奈奎斯特响应的幅度保持在约束 范围。

    ZERO GAIN START BIAS ESTIMATION
    7.
    发明申请
    ZERO GAIN START BIAS ESTIMATION 有权
    零增益偏差估计

    公开(公告)号:US20140036385A1

    公开(公告)日:2014-02-06

    申请号:US13564763

    申请日:2012-08-02

    IPC分类号: G11B5/03

    CPC分类号: G11B5/09 G11B2005/0008

    摘要: A method and system for estimating a zero gain start (ZGS) bias in a read channel is disclosed. The method may include: receiving preamble samples within a fixed-length window selected for ZGS calculation; calculating an energy associated with a 2T frequency in the preamble samples; calculating an energy associated with non-2T frequencies in the preamble samples; and calculating the ZGS bias based on the energy associated with the 2T frequency in the preamble samples and the energy associated with non-2T frequencies in the preamble samples.

    摘要翻译: 公开了一种用于估计读通道中的零增益开始(ZGS)偏置的方法和系统。 该方法可以包括:在为ZGS计算选择的固定长度窗口内接收前导码样本; 计算在前导码样本中与2T频率相关联的能量; 计算在前导码样本中与非2T频率相关联的能量; 并且基于在前导码样本中与2T频率相关联的能量和与前同步码样本中的非2T频率相关联的能量来计算ZGS偏差。

    Systems and methods for semi-independent loop processing
    8.
    发明授权
    Systems and methods for semi-independent loop processing 有权
    半独立循环处理的系统和方法

    公开(公告)号:US08237597B2

    公开(公告)日:2012-08-07

    申请号:US12887327

    申请日:2010-09-21

    IPC分类号: H03M1/12

    CPC分类号: H03M1/06 H03M1/12

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes an analog to digital converter circuit, a digital filter circuit, a data detector circuit, a mimic filter circuit, and a sample clock generation circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples. The digital filter circuit is operable to receive the digital samples and to provide a filtered output. The data detector circuit is operable to perform a data detection process on the filtered output to yield a detected output. The mimic filter circuit is operable to receive the digital samples and to provide a mimicked output. The sample clock generation circuit is operable to provide a sample clock based at least in part on the detected output and the mimicked output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,讨论了包括模数转换器电路,数字滤波器电路,数据检测器电路,模拟滤波器电路和采样时钟产生电路的数据处理电路。 模数转换器电路可操作以接收数据输入并提供对应的数字采样。 数字滤波器电路可操作以接收数字样本并提供滤波输出。 数据检测器电路可操作以对滤波的输出执行数据检测处理,以产生检测的输出。 模拟滤波器电路可操作以接收数字样本并提供模拟输出。 采样时钟产生电路可操作以至少部分地基于所检测的输出和模拟输出来提供采样时钟。

    Nyquist Constrained Digital Finite Impulse Response Filter
    9.
    发明申请
    Nyquist Constrained Digital Finite Impulse Response Filter 有权
    奈奎斯特约束数字有限脉冲响应滤波器

    公开(公告)号:US20130097213A1

    公开(公告)日:2013-04-18

    申请号:US13272209

    申请日:2011-10-12

    IPC分类号: G06F17/10

    摘要: Various embodiments of the present invention provide apparatuses and methods for filtering a digital signal with a Nyquist constrained digital finite impulse response filter. For example, an apparatus for filtering digital data is disclosed that includes a digital finite impulse response filter having a plurality of taps. The apparatus also includes a tap weight controller connected to the digital finite impulse response filter, operable to adjust a tap weight for each of a subset of the taps such that a magnitude of a Nyquist response of the digital finite impulse response filter remains within a constraint range.

    摘要翻译: 本发明的各种实施例提供了用奈奎斯特约束数字有限脉冲响应滤波器对数字信号进行滤波的装置和方法。 例如,公开了一种用于对数字数据进行滤波的装置,其包括具有多个抽头的数字有限脉冲响应滤波器。 该装置还包括连接到数字有限脉冲响应滤波器的抽头加权控制器,可操作以调整抽头子集中的每一个的抽头权重,使得数字有限脉冲响应滤波器的奈奎斯特响应的幅度保持在约束 范围。

    Systems and Methods for ADC Sample Based Timing Recovery
    10.
    发明申请
    Systems and Methods for ADC Sample Based Timing Recovery 审中-公开
    基于ADC样本的定时恢复的系统和方法

    公开(公告)号:US20120124454A1

    公开(公告)日:2012-05-17

    申请号:US12947962

    申请日:2010-11-17

    IPC分类号: G06F11/07

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes an analog to digital converter circuit operable to receive a data input and to provide corresponding digital samples, and a digital filter circuit operable to receive the digital samples and to provide a filtered output. A data detector circuit is operable to perform a data detection process on the filtered output to yield a detected output, and a phase detector circuit operable to calculate an error feedback value based at least in part on the detected output and the digital samples.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,讨论了一种数据处理电路,其包括可操作以接收数据输入并提供对应的数字样本的模数转换器电路,以及可操作以接收数字样本并提供滤波输出的数字滤波器电路。 数据检测器电路可操作以对滤波的输出执行数据检测处理以产生检测的输出;以及相位检测器电路,可用于至少部分地基于检测的输出和数字样本来计算误差反馈值。