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公开(公告)号:US06432746B1
公开(公告)日:2002-08-13
申请号:US09840725
申请日:2001-04-23
申请人: Shin Kim , Hee-Guk Choi , Se Ill Kim , Se Yong Oh
发明人: Shin Kim , Hee-Guk Choi , Se Ill Kim , Se Yong Oh
IPC分类号: H01L2144
摘要: A method for manufacturing a chip scale package (CSP) including a semiconductor chip and conductive bumps is disclosed. In the present invention, a flexible substrate is provided with a conductive pattern formed thereon. The substrate has a top surface and a bottom surface. Then, a first photosensitive resin pattern is formed over the top surface of the substrate. Next, the first photosensitive resin pattern is cured. Subsequently, a second photosensitive resin pattern is formed over the cured first photosensitive resin pattern. The second photosensitive resin pattern includes a slit comprising a bottom of the first photosensitive resin pattern and side walls of the second photosensitive resin pattern. With the present invention, the problem of burning of neighboring patterns as well as the problem of the overflow of the encapsulant can be overcome.
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公开(公告)号:US20060035453A1
公开(公告)日:2006-02-16
申请号:US11196243
申请日:2005-08-04
申请人: Seung-Woo Kim , Pyeong-Wan Kim , Sang-Ho Ahn , Bo-Seong Kim , Ho-Jeong Moon , Tae-Seong Park , Hee-Guk Choi
发明人: Seung-Woo Kim , Pyeong-Wan Kim , Sang-Ho Ahn , Bo-Seong Kim , Ho-Jeong Moon , Tae-Seong Park , Hee-Guk Choi
CPC分类号: H05K1/111 , H01L21/4853 , H01L23/49816 , H01L2224/03831 , H01L2224/0391 , H01L2224/0401 , H01L2224/05551 , H01L2224/05557 , H01L2224/05567 , H01L2224/05571 , H01L2224/13007 , H01L2224/13018 , H01L2224/13022 , H01L2924/0002 , H01L2924/01046 , H01L2924/01327 , H05K3/06 , H05K3/282 , H05K3/3452 , H05K2201/09745 , H05K2201/099 , H05K2203/0353 , Y02P70/611 , Y10T29/49124 , Y10T29/49147 , H01L2924/00 , H01L2224/05552 , H01L2924/00012
摘要: In the method, a conductive pad of the board is etched to a depth that is greater than 50% and less than 100% of a thickness of the conductive pad. Subsequently, a solder ball may be formed on the etched conductive pad. For example, the conductive pad may be copper.
摘要翻译: 在该方法中,将电路板的导电焊盘蚀刻到大于导电焊盘厚度的50%且小于100%的深度。 随后,可以在蚀刻的导电焊盘上形成焊球。 例如,导电焊盘可以是铜。
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公开(公告)号:US07213329B2
公开(公告)日:2007-05-08
申请号:US11196243
申请日:2005-08-04
申请人: Seung-Woo Kim , Pyeong-Wan Kim , Sang-Ho Ahn , Bo-Seong Kim , Ho-Jeong Mun , Tae-Seong Park , Hee-Guk Choi
发明人: Seung-Woo Kim , Pyeong-Wan Kim , Sang-Ho Ahn , Bo-Seong Kim , Ho-Jeong Mun , Tae-Seong Park , Hee-Guk Choi
CPC分类号: H05K1/111 , H01L21/4853 , H01L23/49816 , H01L2224/03831 , H01L2224/0391 , H01L2224/0401 , H01L2224/05551 , H01L2224/05557 , H01L2224/05567 , H01L2224/05571 , H01L2224/13007 , H01L2224/13018 , H01L2224/13022 , H01L2924/0002 , H01L2924/01046 , H01L2924/01327 , H05K3/06 , H05K3/282 , H05K3/3452 , H05K2201/09745 , H05K2201/099 , H05K2203/0353 , Y02P70/611 , Y10T29/49124 , Y10T29/49147 , H01L2924/00 , H01L2224/05552 , H01L2924/00012
摘要: In the method, a conductive pad of the board is etched to a depth that is greater than 50% and less than 100% of a thickness of the conductive pad. Subsequently, a solder ball may be formed on the etched conductive pad. For example, the conductive pad may be copper.
摘要翻译: 在该方法中,将电路板的导电焊盘蚀刻到大于导电焊盘厚度的50%且小于100%的深度。 随后,可以在蚀刻的导电焊盘上形成焊球。 例如,导电焊盘可以是铜。
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