公开(公告)号：US20120273970A1

公开(公告)日：2012-11-01

申请号：US13442247

申请日：2012-04-09

申请人： Hiroshi KURODA

发明人： Hiroshi KURODA

IPC分类号： H01L25/065

CPC分类号： H01L25/18 ,  H01L23/3128 ,  H01L23/5386 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/06155 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2924/10253 ,  H01L2924/00014 ,  H01L2924/00

摘要： Miniaturization and acceleration of the operating speed of a System In Package (SIP) type semiconductor device in which a memory chip and a microcomputer chip are mounted over a wiring board are promoted. When mounting a microcomputer chip and a memory chip over an upper surface of a wiring board, the memory chip is disposed such that second conductive pads of the wiring board arranged along a first chip side (a side along which data system electrode pads are arranged) of the memory chip are positioned, in the plan view, in a region between an extended line of a third chip side of the microcomputer chip and an extended line of a fourth chip side of the microcomputer chip. Thus, a length of a data system wiring for coupling a data system electrode pad of the microcomputer chip with the data system electrode pad of the memory chip is minimized.

摘要翻译： 促进将存储芯片和微型计算机芯片安装在布线板上的系统级封装（SIP）型半导体器件的操作速度的小型化和加速。 当将微计算机芯片和存储芯片安装在布线板的上表面上时，存储芯片被布置成沿着第一芯片侧（布置有数据系统电极焊盘的一侧）布置的布线板的第二导电焊盘， 在平面图中，位于微型计算机芯片的第三芯片侧的延长线与微型计算机芯片的第四芯片侧的延长线之间的区域。 因此，将微型计算机芯片的数据系统电极焊盘与存储芯片的数据系统电极焊盘耦合的数据系统布线的长度最小化。

公开(公告)号：US07777347B2

公开(公告)日：2010-08-17

申请号：US11756941

申请日：2007-06-01

申请人： Hiroshi Kuroda

发明人： Hiroshi Kuroda

IPC分类号： H01L23/52

CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A first semiconductor chip, a spacer of plane shape, and a second semiconductor chip are put on a module substrate, sequentially. These semiconductor chips have a relation that every side of the first semiconductor chip is shorter than the first side and the second side of the second semiconductor chip, and longer than the third side and the fourth side of the second semiconductor chip. The border of the spacer is parallel to the third side and the fourth side and is placed inside the border of the first semiconductor chip. Even if the second electrode pad of the second semiconductor chip approaches the border of the first semiconductor chip, since a spacer secures space between the border portion of the first semiconductor chip and the second semiconductor chip, the wire combined with the second electrode pad does not contact the first semiconductor chip.

摘要翻译： 依次将第一半导体芯片，平面形状的间隔物和第二半导体芯片放置在模块基板上。 这些半导体芯片具有这样的关系：第一半导体芯片的每侧比第二半导体芯片的第一侧和第二侧短，并且比第二半导体芯片的第三侧和第四侧长。 间隔件的边界平行于第三侧和第四侧，并且被放置在第一半导体芯片的边界内。 即使第二半导体芯片的第二电极焊盘接近第一半导体芯片的边界，由于间隔物固定第一半导体芯片的边界部分和第二半导体芯片之间的空间，所以与第二电极焊盘组合的导线不 接触第一个半导体芯片。

公开(公告)号：US07745921B2

公开(公告)日：2010-06-29

申请号：US12264970

申请日：2008-11-05

申请人： Kazuhiko Hiranuma ,  Hiroshi Kuroda ,  Yoshiyuki Abe

发明人： Kazuhiko Hiranuma ,  Hiroshi Kuroda ,  Yoshiyuki Abe

IPC分类号： H01L23/02

CPC分类号： H01L27/14618 ,  H01L23/498 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L27/14634 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes semiconductor chips differing in withstand voltage or in noise immunity, such as a multi-chip module. The semiconductor device includes first and second semiconductor chips mounted over a package substrate which has bonding pads arranged along the edges. The first semiconductor chip includes bonding pads for analog signals, and the second semiconductor chip includes bonding pads for high-voltage signals. The edges along which the bonding pads for analog signals are arranged and the edges along which the bonding pads for high-voltage signals are arranged are disposed along mutually different edges of the package substrate. Adjoining of electrodes or wirings for high voltage signals and those for analog signals over the package substrate can be easily avoided, and SI deterioration can be thereby restrained.

摘要翻译： 半导体器件包括不同于耐电压或抗噪声的诸如多芯片模块的半导体芯片。 半导体器件包括安装在封装衬底上的第一和第二半导体芯片，该封装衬底具有沿边缘布置的焊盘。 第一半导体芯片包括用于模拟信号的接合焊盘，第二半导体芯片包括用于高电压信号的焊盘。 布置用于模拟信号的接合焊盘的边缘以及布置有用于高电压信号的接合焊盘的边缘沿着封装衬底的相互不同的边缘设置。 可以容易地避免用于高电压信号的电极或布线与封装基板上的模拟信号的连接，从而可以抑制SI劣化。

公开(公告)号：US07259711B2

公开(公告)日：2007-08-21

申请号：US10739223

申请日：2003-12-19

申请人： Fumihiko Okai ,  Hiroshi Kuroda

发明人： Fumihiko Okai ,  Hiroshi Kuroda

IPC分类号： G01S13/93 ,  G01S7/40 ,  G01S13/00

CPC分类号： G01S13/931 ,  B60W30/09 ,  B60W2050/143 ,  G01S7/40 ,  G01S7/411 ,  G01S7/412 ,  G01S2013/9321 ,  G01S2013/9346 ,  G01S2013/935 ,  G01S2013/9353

摘要： A vehicle control apparatus includes an obstruction detection unit for measuring a headway distance until an obstruction existing ahead of the vehicle by means of a radar device, a unit for performing vehicle control or alarm control on the basis of the headway distance, a unit for detecting detection performance of the obstruction detection means in a vehicle in which the obstruction detection unit is used to perform two or more controls containing the vehicle control or alarm control, and a unit for controlling to stop operation of the vehicle control or alarm control in accordance with the detection performance individually.

摘要翻译： 车辆控制装置包括障碍物检测单元，用于通过雷达装置，用于根据前进距离进行车辆控制或报警控制的单元来测量前方车辆前方的障碍物的前进距离，检测单元 其中障碍物检测单元用于执行包含车辆控制或报警控制的两个或多个控制的车辆中的障碍物检测装置的检测性能，以及用于控制停止车辆控制或报警控制的操作的单元 检测性能分别。

公开(公告)号：US20070120267A1

公开(公告)日：2007-05-31

申请号：US11563416

申请日：2006-11-27

申请人： Hiroshi KURODA ,  Kazuhiko Hiranuma

发明人： Hiroshi KURODA ,  Kazuhiko Hiranuma

IPC分类号： H01L23/34 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

摘要： The present invention provides a multi chip module which realizes high functions or high performances thereof. A multi chip module is constituted by stacking a first semiconductor chip on which a digital signal processing circuit is mounted, a second semiconductor chip which constitutes a dynamic random access memory, a third semiconductor chip which constitutes a non-volatile memory, and a mounting substrate thus forming the stacked structure. The first semiconductor chip is arranged on an uppermost layer with a spacer interposed on a back surface side thereof. The second semiconductor chip is arranged on the mounting substrate.

摘要翻译： 本发明提供实现高功能或高性能的多芯片模块。 多芯片模块通过堆叠安装有数字信号处理电路的第一半导体芯片，构成动态随机存取存储器的第二半导体芯片，构成非易失性存储器的第三半导体芯片和安装基板 从而形成堆叠结构。 第一半导体芯片布置在最上层，隔离件插入其背面侧。 第二半导体芯片布置在安装基板上。

公开(公告)号：US07138950B2

公开(公告)日：2006-11-21

申请号：US10689845

申请日：2003-10-22

申请人： Susumu Fukushima ,  Hideki Nanba ,  Hiroshi Kuroda

发明人： Susumu Fukushima ,  Hideki Nanba ,  Hiroshi Kuroda

IPC分类号： H01Q1/24

CPC分类号： H01Q21/24 ,  H01Q1/24 ,  H01Q5/364 ,  H01Q9/0407 ,  H01Q21/065

摘要： The objective of the present invention is to realize, in an antenna and an electronic equipment using the same, miniaturization of that antenna. To achieve said objective, an antenna electrode (19) is provided on the surface of the main body (18), a grounding electrode (20) is provided on the back face, and a signal electrode (21) is provided on the circumferential face, the antenna electrode (19) being different in length at the X axis from the Y axis. This enables to construct a broad-band antenna with a single piece of antenna, contributing to miniaturization of the antenna.

摘要翻译： 本发明的目的是在天线和使用该天线的电子设备中实现该天线的小型化。 为了实现所述目的，在主体（18）的表面上设置有天线电极（19），在背面设置有接地电极（20），在周面上设置有信号电极 ，所述天线电极（19）的X轴与Y轴的长度不同。 这使得能够构造具有单片天线的宽带天线，有助于天线的小型化。

公开(公告)号：US20060220673A1

公开(公告)日：2006-10-05

申请号：US11392730

申请日：2006-03-30

申请人： Kazuhiko Hiranuma ,  Hiroshi Kuroda ,  Yoshiyuki Abe

发明人： Kazuhiko Hiranuma ,  Hiroshi Kuroda ,  Yoshiyuki Abe

IPC分类号： H03K17/16

CPC分类号： H01L27/14618 ,  H01L23/498 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L27/14634 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： SI in a semiconductor device in which a plurality of semiconductor chips differing in withstand voltage or in noise immunity, such as a multi-chip module, is to be improved. The semiconductor device comprises a first semiconductor chip and a second semiconductor chip mounted over a package substrate which has a plurality of bonding pads arranged along the edges. The first semiconductor chip has a plurality of bonding pads for analog signals, and the second semiconductor chip has a plurality of bonding pads for high-voltage signals. The edges along which the bonding pads for analog signals are arranged and the edges along which the bonding pads for high-voltage signals are arranged are disposed along mutually different edges of the package substrate. Adjoining of electrodes or wirings for high voltage signals and those for analog signals over the package substrate can be easily avoided, and SI deterioration can be thereby restrained.

摘要翻译： 要提高其中诸如多芯片模块之类的耐电压或抗噪声能力不同的多个半导体芯片的半导体器件中的SI。 半导体器件包括安装在封装衬底上的第一半导体芯片和第二半导体芯片，该封装衬底具有沿着边缘布置的多个焊盘。 第一半导体芯片具有用于模拟信号的多个接合焊盘，第二半导体芯片具有用于高电压信号的多个焊盘。 布置用于模拟信号的接合焊盘的边缘以及布置有用于高电压信号的接合焊盘的边缘沿着封装衬底的相互不同的边缘设置。 可以容易地避免用于高电压信号的电极或布线与封装基板上的模拟信号的连接，从而可以抑制SI劣化。

公开(公告)号：US20060113677A1

公开(公告)日：2006-06-01

申请号：US11290470

申请日：2005-12-01

申请人： Hiroshi Kuroda ,  Makoto Tetsuka

发明人： Hiroshi Kuroda ,  Makoto Tetsuka

IPC分类号： H01L23/52

CPC分类号： H01L23/18 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module is provided which allows memory space extension to improve function and performance. A first semiconductor chip is mounted on a mounting substrate, and a first semiconductor memory chip is mounted over the first semiconductor chip. A second semiconductor memory chip having the same circuitry and the same memory capacity as the first semiconductor memory chip is mounted on a spacer formed on the first memory chip in the same direction as the first semiconductor memory chip. An electrode is independently formed corresponding to a bonding pad to which a selective signal of the first semiconductor memory chip and the second semiconductor memory chip is supplied. A plurality of electrodes are formed in common corresponding to a plurality of bonding pads to which the same signal is respectively supplied except for the selective signal.

摘要翻译： 提供了多芯片模块，其允许存储器空间扩展以改善功能和性能。 第一半导体芯片安装在安装基板上，第一半导体存储芯片安装在第一半导体芯片上。 具有与第一半导体存储器芯片相同的电路和相同存储器容量的第二半导体存储器芯片以与第一半导体存储器芯片相同的方向安装在形成在第一存储器芯片上的间隔件上。 对应于第一半导体存储器芯片和第二半导体存储器芯片的选择信号的焊盘对应地独立地形成电极。 多个电极形成为共同对应于除了选择信号之外分别提供相同信号的多个接合焊盘。

公开(公告)号：US07023376B1

公开(公告)日：2006-04-04

申请号：US10257256

申请日：2000-08-30

申请人： Hiroshi Kuroda ,  Kazuaki Takano ,  Mitsuru Nakamura

发明人： Hiroshi Kuroda ,  Kazuaki Takano ,  Mitsuru Nakamura

IPC分类号： G01S13/93

CPC分类号： G01S13/347 ,  G01S7/352 ,  G01S13/345 ,  G01S13/348 ,  G01S13/536 ,  G01S13/584 ,  G01S13/931 ,  G01S2007/356 ,  G01S2013/9321 ,  G01S2013/9325 ,  G01S2013/9346 ,  G01S2013/935 ,  G01S2013/9353 ,  G01S2013/9357 ,  G01S2013/9375

摘要： The invention provides a radar that transmits a radio wave and receives an echo of the radio wave, which is characterized by possessing (1) a reception means that detects a beat signal of the echo and the radio wave, (2) a first frequency analysis means that analyzes the beat signal into frequency components, and detects a peak signal of frequency spectra obtained thereby, and (3) a second frequency analysis means that analyzes the beat signal into frequency components with a frequency resolution different from that of the first frequency analysis means, and detects a peak signal of frequency spectra obtained thereby.

摘要翻译： 本发明提供了一种发射无线电波并接收无线电波回波的雷达，其特征在于具有（1）检测回波和无线电波的搏动信号的接收装置，（2）第一频率分析 意味着将差拍信号分析成频率分量，并检测由此获得的频谱的峰值信号，以及（3）第二频率分析装置，其将拍频信号分析为具有与第一频率分析不同的频率分辨率的频率分量 表示并检测由此获得的频谱的峰值信号。

公开(公告)号：US20050260430A1

公开(公告)日：2005-11-24

申请号：US10343944

申请日：2001-04-27

申请人： Hiroshi Kuroda ,  Nobuyuki Okinaga

发明人： Hiroshi Kuroda ,  Nobuyuki Okinaga

IPC分类号： H01R4/00 ,  H01R4/02 ,  H01R4/04 ,  H01R13/03 ,  H05K3/32 ,  H05K3/34 ,  B32B15/02

CPC分类号： H01R4/00 ,  H01R4/02 ,  H01R4/04 ,  H01R13/035 ,  H05K3/321 ,  H05K3/3436 ,  H05K3/3473 ,  H05K3/3484 ,  H05K2201/0212 ,  H05K2201/0221 ,  H05K2201/068 ,  H05K2203/0425 ,  Y02P70/613 ,  Y10T428/12181 ,  Y10T428/2991

摘要： This invention provides a conductive fine particle having an ability of relaxing the force applied to a circuit of a substrate or the like. A conductive fine particle, comprising a core fine particle made of resin with its surface covered with at least one metal layer, wherein the resin has a coefficient of linear expansion of from 3×10−5 to 7×10−5 (1/K).

摘要翻译： 本发明提供一种具有放松施加到基板的电路等的力的能力的导电细粒。 一种导电细颗粒，其包含由其表面覆盖有至少一个金属层的树脂制成的芯细颗粒，其中所述树脂的线性膨胀系数为3×10 -5至7×10 -6， -5（1 / K）。