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公开(公告)号：US5767544A
公开(公告)日：1998-06-16
申请号：US470459
申请日：1995-06-06
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792 , G11C7/00
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546 , G11C29/789
摘要： A nonvolatile storage element of single-layer gate structure constructed by arranging a floating gate formed of a conductive layer to partly overlap with a control gate formed of a diffused layer is provided with a barrier layer covering a part or the whole of the surface of the floating gate. Such nonvolatile storage elements are used for redundancy control of defects or change of functions.
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公开(公告)号：US4805143A
公开(公告)日：1989-02-14
申请号：US2291
申请日：1987-01-12
申请人： Youichi Matsumoto , Ryuuji Shibata , Isamu Kobayashi , Satoshi Meguro , Kouichi Nagasawa , Hideo Meguro , Hisahiro Moriuchi , Masahiro Ogata , Kikuo Sakai , Toshifumi Takeda
发明人： Youichi Matsumoto , Ryuuji Shibata , Isamu Kobayashi , Satoshi Meguro , Kouichi Nagasawa , Hideo Meguro , Hisahiro Moriuchi , Masahiro Ogata , Kikuo Sakai , Toshifumi Takeda
IPC分类号： G11C17/12 , H01L27/112 , G11C17/00
CPC分类号： H01L27/112 , G11C17/126
摘要： A mask-programmed ROM includes depletion type load MOSFETs provided between data lines in a memory array and a power supply voltage, the MOSFETs having a ground potential of the circuit applied to their gates. Reading of data is carried out by an amplifying MOSFET which supplies a current to a selected data line through a depletion type MOSFET which is supplied at its gate with the circuit ground potential. Thus, bias voltages which are respectively applied to the data lines and a sense amplifier which receives a signal read out from a selected data line are made equal to each other, thereby achieving a high-speed read operation.
摘要翻译： 掩模编程的ROM包括在存储器阵列中的数据线和电源电压之间提供的耗尽型负载MOSFET，MOSFET具有施加到其栅极的电路的接地电位。 数据的读取由放大MOSFET进行，该放大MOSFET通过在其栅极处提供电路接地电位的耗尽型MOSFET向所选择的数据线提供电流。 因此，分别施加到数据线的偏置电压和接收从所选择的数据线读出的信号的读出放大器彼此相等，从而实现高速读取操作。
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公开(公告)号：US20070171692A1
公开(公告)日：2007-07-26
申请号：US11727693
申请日：2007-03-28
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： G11C17/00
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , G11C29/789 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546
摘要： A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
摘要翻译： 单层栅型结构的非易失性存储元件被布置成使得浮置栅极由与扩散层形成的控制栅极部分重叠的导电层形成，并且设置有覆盖部分的阻挡层 或浮动门的整个表面。 其特征在于的非易失性存储元件用于缺陷的冗余控制或功能的改变。
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公开(公告)号：US07002830B2
公开(公告)日：2006-02-21
申请号：US10694085
申请日：2003-10-28
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： G11C7/00
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , G11C29/789 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546
摘要： A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
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公开(公告)号：US20060018172A1
公开(公告)日：2006-01-26
申请号：US11228311
申请日：2005-09-19
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： G11C7/02
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , G11C29/789 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546
摘要： A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
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公开(公告)号：US6064606A
公开(公告)日：2000-05-16
申请号：US1514
申请日：1997-12-31
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792 , G11C7/00
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546 , G11C29/789
摘要： A nonvolatile storage element of single-layer gate structure constructed by arranging a floating gate formed of a conductive layer to partly overlap with a control gate formed of a diffused layer is provided with a barrier layer covering a part or the whole of the surface of the floating gate. Such nonvolatile storage elements are used for redundancy control of defects or change of functions.
摘要翻译： 通过布置由导电层形成的浮动栅极与由扩散层形成的控制栅极部分重叠而构成的单层栅极结构的非易失性存储元件设置有覆盖部分或全部表面的阻挡层 浮动门。 这种非易失性存储元件用于缺陷的冗余控制或功能的改变。
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公开(公告)号：US5457335A
公开(公告)日：1995-10-10
申请号：US727409
申请日：1991-07-09
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546 , G11C29/789
摘要： A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
摘要翻译： 单层栅型结构的非易失性存储元件被布置成使得浮置栅极由与扩散层形成的控制栅极部分重叠的导电层形成，并且设置有覆盖部分的阻挡层 或浮动门的整个表面。 其特征在于的非易失性存储元件用于缺陷的冗余控制或功能的改变。
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公开(公告)号：US5383162A
公开(公告)日：1995-01-17
申请号：US935176
申请日：1992-08-26
IPC分类号： G11C29/00 , H01L27/112 , H01L27/115 , H01L27/10 , G11C11/40
CPC分类号： G11C29/789 , H01L27/112 , H01L27/115
摘要： A non-volatile memory element comprising a control gate formed by a diffusion layer, a floating gate comprising a conductive layer, the floating gate being partly overlapping with the control gate through a thin insulating layer, and a barrier layer formed to cover a part or the entire part of the floating gate is used as a defect remedy circuit for the memory circuit having read-only memory elements arranged in the form of a matrix for storing defective addresses corresponding to the word lines and bit lines and storing data corresponding thereto respectively.
摘要翻译： 一种非易失性存储元件，包括由扩散层形成的控制栅极，包括导电层的浮动栅极，所述浮置栅极通过薄绝缘层与控制栅极部分重叠，以及形成为覆盖部分或 浮动栅极的整个部分被用作具有以矩阵形式布置的只读存储器元件的存储器电路的缺陷补救电路，用于存储与字线和位线相对应的不良地址并分别存储与其对应的数据。
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公开(公告)号：US4912674A
公开(公告)日：1990-03-27
申请号：US310353
申请日：1989-02-14
申请人： Youichi Matsumoto , Ryuuji Shibata , Isamu Kobayashi , Satoshi Meguro , Kouichi Nagasawa , Hideo Meguro , Hisahiro Moriuchi , Masahiro Ogata , Kikuo Sakai , Toshifumi Takeda
发明人： Youichi Matsumoto , Ryuuji Shibata , Isamu Kobayashi , Satoshi Meguro , Kouichi Nagasawa , Hideo Meguro , Hisahiro Moriuchi , Masahiro Ogata , Kikuo Sakai , Toshifumi Takeda
IPC分类号： G11C17/12 , H01L27/112
CPC分类号： H01L27/112 , G11C17/126
摘要： A mask-programmed ROM includes depletion type load MOSFETs provided between data lines in a memory array and a power supply voltage, the MOSFETs having a ground potential of the circuit applied to their gates. Reading of data is carried out by an amplifying MOSFET which supplies a current to a selected data line through a depletion type MOSFET which is supplied at its gate with the circuit ground potential. Thus, bias voltages which are respectively applied to the data lines and a sense amplifier which receives a signal read out from a selected data line are made equal to each other, thereby achieving a high-speed read operation.
摘要翻译： 掩模编程的ROM包括在存储器阵列中的数据线和电源电压之间提供的耗尽型负载MOSFET，MOSFET具有施加到其栅极的电路的接地电位。 数据的读取由放大MOSFET进行，该放大MOSFET通过在其栅极处提供电路接地电位的耗尽型MOSFET向所选择的数据线提供电流。 因此，分别施加到数据线的偏置电压和接收从所选择的数据线读出的信号的读出放大器彼此相等，从而实现高速读取操作。
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公开(公告)号：US07212425B2
公开(公告)日：2007-05-01
申请号：US11228311
申请日：2005-09-19
申请人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
发明人： Kenichi Kuroda , Toshifumi Takeda , Hisahiro Moriuchi , Masaki Shirai , Jiroh Sakaguchi , Akinori Matsuo , Shoji Yoshida
IPC分类号： G11C17/00
CPC分类号： H01L27/11526 , G11C16/0408 , G11C16/10 , G11C29/789 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11519 , H01L27/11546
摘要： A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
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