公开(公告)号：US20200142781A1

公开(公告)日：2020-05-07

申请号：US16613414

申请日：2018-08-09

Applicant: Ho Jun LEE

Inventor： Ho Jun LEE

IPC: G06F11/14

Abstract: A real time file alteration sensing-based automatic backup device includes: a backup target selection unit selecting one or more backup targets that are accessible over a network and are subjected to backup; a content alteration sensing unit sensing in real time whether contents of the one or more backup targets are altered or scanning all the backup targets for sensing at particular-time intervals; a backup data generation unit generating, when the alteration of the content of the backup target is sensed, backup data containing information required for recovery of the sensed backup target; and a backup data storage unit storing the generated backup data.

公开(公告)号：US20150357418A1

公开(公告)日：2015-12-10

申请号：US14760989

申请日：2014-01-03

Applicant: Kye-Jin LEE ,  Ho-Jun LEE ,  Young-Jae CHOI ,  Jung-Hyun EUM ,  Chung-Hyun LEE ,  LG SILTRON INC.

Inventor： Kye-Jin LEE ,  Ho-Jun LEE ,  Young-Jae CHOI ,  Jung-Hyun EUM ,  Chung-Hyun LEE

IPC: H01L29/205 ,  H01L29/20

CPC classification number: H01L29/36 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/205

Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.

Abstract translation: 本发明提供一种半导体衬底，其包括设置在衬底上的种子层，设置在籽晶层上的缓冲层，设置在缓冲层上的多个氮化物半导体层以及多个氮化物半导体层之间的至少一个应力控制层。 缓冲层包括多个步骤区域和至少一个异质区域。 多个台阶区域包括相同的氮化物半导体材料。 异质区域包括与步骤区域不同的氮化物半导体材料。

公开(公告)号：US08903148B2

公开(公告)日：2014-12-02

申请号：US13541820

申请日：2012-07-05

Applicant: Ho Jun Lee ,  Jin Ki Kim

Inventor： Ho Jun Lee ,  Jin Ki Kim

IPC: G06K9/00 ,  G06T5/00

CPC classification number: G06T5/002 ,  G06T2207/10116 ,  G06T2207/30004 ,  Y10S128/922

Abstract: An X-ray imaging apparatus and a method of updating a pixel map correct a bad pixel of an X-ray transmission image. An X-ray transmission image is generated by detecting an X-ray penetrating an object, and it is determined whether a difference between a value of each one of the pixels forming the X-ray transmission image and a value of a nearby pixel adjacent to the each one of the pixels is equal to or greater than a reference value. A pixel having a value representing a difference equal to or greater than the reference value is determined as a candidate for a bad pixel. A message is displayed which requests a selection of whether to determine if the candidate is a bad pixel. The pixel map is updated by reflecting the determined bad pixel on the pixel map.

Abstract translation: X射线成像装置和更新像素图的方法校正X射线透射图像的不良像素。 通过检测穿透物体的X射线来生成X射线透射图像，并且确定形成X射线透射图像的每个像素的值和与其相邻的附近像素的值之间的差异 像素中的每一个等于或大于参考值。 具有表示等于或大于参考值的差的值的像素被确定为坏像素的候选。 显示一个消息，其请求选择是否确定候选者是否是不良像素。 通过在像素图上反映确定的不良像素来更新像素图。

公开(公告)号：US08711310B2

公开(公告)日：2014-04-29

申请号：US13150715

申请日：2011-06-01

Applicant: Ho-Jun Lee ,  Sang Wook Lee ,  Sung-Jun Kim

Inventor： Ho-Jun Lee ,  Sang Wook Lee ,  Sung-Jun Kim

IPC: G02F1/1343

CPC classification number: G02F1/1341 ,  G02F1/1343 ,  G02F2202/16

Abstract: A liquid crystal display includes a first substrate and a second substrate which face each other and each include a display area and a peripheral area, a liquid crystal layer in the display areas and between the first substrate and the second substrate, and a conductive sealant combining the first substrate and the second substrate. The first substrate includes a common electrode in the display and peripheral areas of the first substrate. The second substrate includes a first and signal lines in the peripheral area of the second substrate, a first insulating layer on the first signal line and the second signal line, and a conductor on the first insulating layer in the peripheral area and connected to the first signal line through a contact hole. The common electrode includes a cutout corresponding to the conductor, and the cutout is at a corner of the display areas.

Abstract translation: 液晶显示器包括第一基板和第二基板，所述第一基板和第二基板彼此面对并且各自包括显示区域和周边区域，显示区域中的液晶层以及第一基板和第二基板之间的导电密封剂组合 第一基板和第二基板。 第一基板包括显示器中的公共电极和第一基板的外围区域。 第二基板包括在第二基板的外围区域中的第一和第二信号线，第一信号线和第二信号线上的第一绝缘层，以及周边区域中的第一绝缘层上的导体，并连接到第一基板 信号线通过接触孔。 公共电极包括对应于导体的切口，并且切口位于显示区域的拐角处。

公开(公告)号：US20130178050A1

公开(公告)日：2013-07-11

申请号：US13714240

申请日：2012-12-13

Applicant: Yong-Jin Kim ,  Dong-Kun Lee ,  Doo-Soo Kim ,  Ho-Jun Lee ,  Kye-Jin Lee

Inventor： Yong-Jin Kim ,  Dong-Kun Lee ,  Doo-Soo Kim ,  Ho-Jun Lee ,  Kye-Jin Lee

IPC: H01L21/02

CPC classification number: H01L21/302 ,  C30B25/186 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02658 ,  H01L21/02664

Abstract: A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer.

Abstract translation: 提供了一种制造氮化镓（GaN）晶片的方法。 在根据实施例的制造GaN晶片的方法中，在衬底上形成蚀刻停止层，并且在蚀刻停止层上形成第一GaN层。 用硅烷气蚀刻第一GaN层的一部分，在蚀刻的第一GaN层上形成第二GaN层。 在第二GaN层上形成第三GaN层。

公开(公告)号：US08470413B2

公开(公告)日：2013-06-25

申请号：US12087739

申请日：2007-01-11

Applicant: Hee-Jung Kim ,  Dong-Ryul Kim ,  Ho-Jun Lee ,  Sang-Uk Ryu ,  Hyo-Sun Lee ,  Boong-Goon Jeong ,  Dae-Woo Nam ,  Ju-Eun Cha

Inventor： Hee-Jung Kim ,  Dong-Ryul Kim ,  Ho-Jun Lee ,  Sang-Uk Ryu ,  Hyo-Sun Lee ,  Boong-Goon Jeong ,  Dae-Woo Nam ,  Ju-Eun Cha

IPC: C09K19/00

CPC classification number: G02F1/1333 ,  G02B1/04 ,  G02B5/3083 ,  G02F1/133634 ,  Y10T428/10 ,  Y10T428/1036 ,  Y10T428/105 ,  Y10T428/31786 ,  C08L81/00

Abstract: Disclosed is a negative C-type retardation compensator for a liquid crystal display. The negative C-type retardation compensator for the liquid crystal display includes polyarylate having a thio group or a sulfur oxide group in a polymer main chain thereof. Accordingly, the retardation compensator has an absolute value of negative retardation that is larger in a thickness direction than a retardation compensator which includes polyarylate having no thio group or sulfur oxide group in a polymer main chain thereof even though the retardation compensator having the thio group or sulfur oxide group and the retardation compensator having no thio group or sulfur oxide group are the same as each other in thickness. Thereby, the negative C-type retardation compensator for liquid crystal displays is capable of being desirably applied to the liquid crystal displays.

Abstract translation: 公开了用于液晶显示器的负C型延迟补偿器。 用于液晶显示器的负C型延迟补偿器包括其聚合物主链中具有硫基或硫氧化物基团的多芳基化合物。 因此，延迟补偿器具有在包含聚合物主链中不含硫基或硫氧化物基团的多芳基化物的延迟补偿器的厚度方向上的负相位差绝对值即使具有硫基的相位差补偿器或 硫氧化物基团和没有硫基或硫氧化物基团的延迟补偿器的厚度彼此相同。 由此，液晶显示器的负C型延迟补偿器能够适用于液晶显示器。

公开(公告)号：US20130095790A1

公开(公告)日：2013-04-18

申请号：US13588407

申请日：2012-08-17

Applicant: Yong-gook Park ,  Tae-young Kang ,  Jung-ho Kim ,  Joo-yoon Bae ,  Ho-jun Lee ,  Hee-chul Jeon ,  Sang-ok Cha ,  Won-young Choi

Inventor： Yong-gook Park ,  Tae-young Kang ,  Jung-ho Kim ,  Joo-yoon Bae ,  Ho-jun Lee ,  Hee-chul Jeon ,  Sang-ok Cha ,  Won-young Choi

IPC: H04W12/06

CPC classification number: H04W4/02 ,  H04L9/32 ,  H04M1/7253 ,  H04M2250/04 ,  H04M2250/10 ,  H04M2250/12 ,  H04W4/80 ,  H04W12/06 ,  H04W12/12 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/164 ,  Y02D70/166

Abstract: A method and an apparatus for controlling a device are provided. Information regarding a second external device, which was received by a first external device, is received from the first external device. The second external device is authenticated based on the information regarding the second external device. Position information regarding the second external device is detected. Control information regarding the first external device is transmitted to the first external device. The control information is based on the position information.

Abstract translation: 提供了一种用于控制设备的方法和装置。 从第一外部设备接收关于由第一外部设备接收的第二外部设备的信息。 基于关于第二外部设备的信息来认证第二外部设备。 检测关于第二外部设备的位置信息。 关于第一外部设备的控制信息被发送到第一外部设备。 控制信息基于位置信息。

公开(公告)号：US08354289B2

公开(公告)日：2013-01-15

申请号：US13019146

申请日：2011-02-01

Applicant: Yong-Jin Kim ,  Dong-Kun Lee ,  Doo-Soo Kim ,  Ho-Jun Lee ,  Kye-Jin Lee

Inventor： Yong-Jin Kim ,  Dong-Kun Lee ,  Doo-Soo Kim ,  Ho-Jun Lee ,  Kye-Jin Lee

IPC: H01L33/20 ,  H01L33/22

CPC classification number: H01L21/302 ,  C30B25/186 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02658 ,  H01L21/02664

Abstract: A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer.

公开(公告)号：US08198649B2

公开(公告)日：2012-06-12

申请号：US11982716

申请日：2007-11-02

Applicant: Yong-Jin Kim ,  Doo-Soo Kim ,  Ho-Jun Lee ,  Dong-Kun Lee

Inventor： Yong-Jin Kim ,  Doo-Soo Kim ,  Ho-Jun Lee ,  Dong-Kun Lee

IPC: H01L33/20

CPC classification number: H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02647 ,  H01L33/20 ,  H01L33/38

Abstract: The present invention relates to a compound semiconductor substrate and a method for manufacturing the same. The present invention provides the manufacturing method which coats spherical balls on a substrate, forms a metal layer between the spherical balls, removes the spherical balls to form openings, and grows a compound semiconductor layer from the openings. According to the present invention, the manufacturing method can be simplified and grow a high quality compound semiconductor layer rapidly, simply and inexpensively, as compared with a conventional ELO (Epitaxial Lateral Overgrowth) method or a method for forming a compound semiconductor layer on a metal layer. And, the metal layer serves as one electrode of a light emitting device and a light reflecting film to provide a light emitting device having reduced power consumption and high light emitting efficiency.

Abstract translation: 化合物半导体基板及其制造方法技术领域本发明涉及化合物半导体基板及其制造方法。 本发明提供一种制造方法，其在基板上涂布球形球，在球形球之间形成金属层，去除球形球以形成开口，并从开口生长化合物半导体层。 根据本发明，与传统的ELO（外延横向生长）方法或在金属上形成化合物半导体层的方法相比，可以简化和简单且廉价地生产高质量的化合物半导体层 层。 并且，金属层用作发光器件和光反射膜的一个电极，以提供具有降低的功率消耗和高发光效率的发光器件。

公开(公告)号：US08158496B2

公开(公告)日：2012-04-17

申请号：US12878225

申请日：2010-09-09

Applicant: Ho-Jun Lee ,  Yong-Jin Kim ,  Dong-Kun Lee ,  Doo-Soo Kim ,  Ji-Hoon Kim

Inventor： Ho-Jun Lee ,  Yong-Jin Kim ,  Dong-Kun Lee ,  Doo-Soo Kim ,  Ji-Hoon Kim

IPC: H01L21/28

CPC classification number: H01L21/0254 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02664

Abstract: Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process.

Abstract translation: 提供了一种制备化合物半导体衬底的方法。 该方法包括在基板上涂覆多个球形球，在涂覆有球形球的基材上生长化合物半导体外延层，同时允许在球形球下方形成空隙，并且冷却其上化合物半导体外延层为 生长，使得衬底和化合物半导体外延层沿着空隙自我分离。 球形球处理可以减少错位几代。 此外，由于基板和化合物半导体外延层通过自分离分离，因此不需要激光剥离处理。