公开(公告)号：US07768104B2

公开(公告)日：2010-08-03

申请号：US12050592

申请日：2008-03-18

Applicant: Ta-Te Chou ,  Hui-Ying Ding ,  Yun Zhang ,  Hong-Yun He ,  Li-Zhu Hao

Inventor： Ta-Te Chou ,  Hui-Ying Ding ,  Yun Zhang ,  Hong-Yun He ,  Li-Zhu Hao

IPC: H01L23/495

CPC classification number: H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/4007 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12043 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions. Alternatively, it can be by adding an electrically isolating coating on the non-active area of the P-side of a semiconductor device to allow it to be mounted P side down on an electrically conductive substrate or mounting location without modification to the substrate or lead frame.

Abstract translation: 一种半导体器件封装的装置和方法，其中半导体器件以电串联连接。 第一装置P侧向下安装在导电基板上。 P侧的非有源区域与导电基板隔离。 第二装置P侧朝上安装在衬底上的间隔开的位置。 每个的相对侧电连接到引线以完成两个装置的串联连接。 制造这种封装的方法包括提供导电引线框架，将一个装置P侧向上安装并翻转另一个装置，并将其P侧向下安装在引线框架上，P侧的非有效区域与 引线框架，并将每个设备的另一侧连接到分离的引线。 隔离器件的P侧的非有源区域可以是通过槽或凸起部分修改衬底或引线框架表面。 或者，可以通过在半导体器件的P侧的非有源区域上添加电隔离涂层，以允许其将P侧安装在导电基板或安装位置，而不改变基板或引线 帧。

公开(公告)号：US20090236705A1

公开(公告)日：2009-09-24

申请号：US12050592

申请日：2008-03-18

Applicant: TA-TE CHOU ,  HUI-YING DING ,  YUN ZHANG ,  HONG-YUN HE ,  LI-ZHU HAO

Inventor： TA-TE CHOU ,  HUI-YING DING ,  YUN ZHANG ,  HONG-YUN HE ,  LI-ZHU HAO

IPC: H01L21/50 ,  H01L23/495

CPC classification number: H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/4007 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12043 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions. Alternatively, it can be by adding an electrically isolating coating on the non-active area of the P-side of a semiconductor device to allow it to be mounted P side down on an electrically conductive substrate or mounting location without modification to the substrate or lead frame.

Abstract translation: 一种半导体器件封装的装置和方法，其中半导体器件以电串联连接。 第一装置P侧朝下安装在导电基板上。 P侧的非有源区域与导电基板隔离。 第二装置P侧朝上安装在衬底上的间隔开的位置。 每个的相对侧电连接到引线以完成两个装置的串联连接。 制造这种封装的方法包括提供导电引线框架，将一个装置P侧向上安装并翻转另一个装置，并将其P侧向下安装在引线框架上，P侧的非有效区域与 引线框架，并将每个设备的另一侧连接到分离的引线。 隔离器件的P侧的非有源区域可以是通过槽或凸起部分修改衬底或引线框架表面。 或者，可以通过在半导体器件的P侧的非有源区域上添加电隔离涂层，以允许其将P侧安装在导电基板或安装位置，而不改变基板或引线 帧。