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    THREE-TERMINAL SYNAPSE DEVICE AND METHOD OF OPERATING THE SAME
    1.
    发明申请
    THREE-TERMINAL SYNAPSE DEVICE AND METHOD OF OPERATING THE SAME 有权
    三端触发装置及其操作方法

    公开(公告)号：US20150117090A1

    公开(公告)日：2015-04-30

    申请号：US14328300

    申请日：2014-07-10

    申请人： Young-bae KIM ,  Hyun-sang HWANG

    发明人： Young-bae KIM ,  Hyun-sang HWANG

    IPC分类号： H01L45/00 ,  G11C13/00

    CPC分类号： H01L45/1206 ,  G11C13/0011 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2013/0083 ,  G11C2213/32 ,  G11C2213/52 ,  G11C2213/53 ,  H01L27/249 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147

    摘要： A three-terminal synapse device may include a drain layer formed on a substrate, a gate layer formed on the drain layer, a source layer vertically stacked on the substrate and facing the drain layer and the gate layer. First and second vertical insulating layers may be formed between the source layer and a stack including the drain layer and the gate layer. The first and second vertical insulating layers have different ion mobilities from each other. The first and second vertical insulating layers may cover side surfaces of the drain layer and the gate layer. The ion mobility of the second vertical insulating layer may be greater than that of the first vertical insulating layer.

    摘要翻译： 三端突触装置可以包括形成在衬底上的漏极层，形成在漏极层上的栅极层，垂直堆叠在衬底上并面向漏极层和栅极层的源极层。 第一和第二垂直绝缘层可以形成在源极层和包括漏极层和栅极层的堆叠之间。 第一和第二垂直绝缘层具有彼此不同的离子迁移率。 第一和第二垂直绝缘层可以覆盖漏极层和栅极层的侧表面。 第二垂直绝缘层的离子迁移率可以大于第一垂直绝缘层的离子迁移率。

    High Pressure Hydrogen Annealing for Mosfet
    3.
    发明申请
    High Pressure Hydrogen Annealing for Mosfet 审中-公开
    高压氢退火用于Mosfet

    公开(公告)号：US20080166890A1

    公开(公告)日：2008-07-10

    申请号：US11885834

    申请日：2006-03-08

    申请人： Hyun-Sang Hwang

    发明人： Hyun-Sang Hwang

    IPC分类号： H01L21/02

    CPC分类号： H01L29/517 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/3003 ,  H01L29/4966

    摘要： The present invention relates to a high pressure hydrogen annealing method for MOSFET semiconductor device, and more particularly, to effectively remove a supersaturated hydrogen on a high-k insulating layer treated by a high pressure hydrogen annealing so that the reliability of a device is improved. In other words, in order to decrease an interfacial charge, it is required to perform a high density and a high pressure hydrogen annealing. In this case, a hydrogen is included at an interface and a bulk of a high-k insulating layer, resulting in improving the initial operational characteristics of a device by passivating interfacial charge existing at an interface, but deteriorating the reliability of a device due to the hydrogen remaining in the insulating bulk. Therefore, in the present invention, a high pressure hydrogen annealing is performed and the subsequent annealing is performed under an inert gas atmosphere for a long time to effectively remove hydrogen molecules remaining at the bulk.

    摘要翻译： 本发明涉及一种用于MOSFET半导体器件的高压氢退火方法，更具体地说，涉及通过高压氢退火处理的高k绝缘层上的过饱和氢的有效去除，从而提高器件的可靠性。 换句话说，为了降低界面电荷，需要进行高密度和高压氢退火。 在这种情况下，氢被包含在高k绝缘层的界面和体积上，从而通过钝化界面处存在的界面电荷来改善器件的初始操作特性，但是由于 残留在绝缘体中的氢。 因此，在本发明中，进行高压氢退火，并且在惰性气体气氛下长时间进行随后的退火以有效地除去在本体上残留的氢分子。

    Memory devices including barrier layers and methods of manufacturing the same
    4.
    发明申请
    Memory devices including barrier layers and methods of manufacturing the same 有权
    存储器件包括阻挡层及其制造方法

    公开(公告)号：US20060077743A1

    公开(公告)日：2006-04-13

    申请号：US11245426

    申请日：2005-10-07

    申请人： Sang-hun Jeon ,  Chung-woo Kim ,  Hyun-sang Hwang

    发明人： Sang-hun Jeon ,  Chung-woo Kim ,  Hyun-sang Hwang

    IPC分类号： G11C7/00

    CPC分类号： H01L21/28273 ,  H01L29/513 ,  H01L29/7881

    摘要： Memory devices and methods of manufacturing the same are provided. Memory devices may include a substrate, a source region and a drain region and a gate structure. The gate structure may be in contact with the source and drain regions, and may include a barrier layer. The barrier layer may be formed of at least two layers. The at least two layers may have different bandgap energies.

    摘要翻译： 提供了存储器件及其制造方法。 存储器件可以包括衬底，源极区域和漏极区域以及栅极结构。 栅极结构可以与源极和漏极区域接触，并且可以包括阻挡层。 阻挡层可以由至少两层形成。 至少两层可能具有不同的带隙能量。

    Method of manufacturing high-k gate dielectric by use of annealing in high-pressure hydrogen atmosphere
    5.
    发明授权
    Method of manufacturing high-k gate dielectric by use of annealing in high-pressure hydrogen atmosphere 失效
    通过在高压氢气氛中退火制造高k栅极电介质的方法

    公开(公告)号：US06913961B2

    公开(公告)日：2005-07-05

    申请号：US10850473

    申请日：2004-05-19

    申请人： Hyun Sang Hwang

    发明人： Hyun Sang Hwang

    IPC分类号： H01L21/31 ,  H01L21/28 ,  H01L21/30 ,  H01L21/314 ,  H01L29/51 ,  H01L21/8238

    CPC分类号： H01L21/28176 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/3141 ,  H01L29/51 ,  H01L29/517

    摘要： Disclosed is a method of manufacturing a high-k gate dielectric, characterized in that an annealing process in a forming gas atmosphere, corresponding to a final step of a manufacturing process of a semiconductor device based on MOSFET fabrication techniques, is applied for a high-k gate dielectric-containing semiconductor device, under high pressure, instead of conventional atmospheric pressure, whereby passivation effects of interface charges and fixed charges of the semiconductor device can be maximized even at relatively low temperatures.

    摘要翻译： 公开了一种制造高k栅极电介质的方法，其特征在于，对应于基于MOSFET制造技术的半导体器件的制造工艺的最后步骤，形成气体气氛中的退火工艺被应用于高k栅极电介质， k栅极电介质的半导体器件，而不是常规的大气压，由此即使在相对低的温度下也可以使半导体器件的界面电荷和固定电荷的钝化效果最大化。

    Resistance-variable memory device including carbide-based solid electrolyte membrane and manufacturing method thereof
    6.
    发明授权
    Resistance-variable memory device including carbide-based solid electrolyte membrane and manufacturing method thereof 有权
    包括碳化物类固体电解质膜的电阻变化记忆装置及其制造方法

    公开(公告)号：US09231198B2

    公开(公告)日：2016-01-05

    申请号：US13120547

    申请日：2009-09-22

    申请人： Hyun-Sang Hwang ,  Myeong-Bum Pyun

    发明人： Hyun-Sang Hwang ,  Myeong-Bum Pyun

    IPC分类号： H01L45/00

    CPC分类号： H01L45/085 ,  G11C2213/35 ,  H01L45/1233 ,  H01L45/149 ,  H01L45/1625 ,  H01L45/1683

    摘要： Disclosed are a resistance-variable memory device including a carbide-based solid electrolyte membrane that has stable memory at a high temperature and a manufacturing method thereof. The resistance-variable memory device includes: a lower electrode, the carbide-based solid electrolyte membrane arranged on the lower electrode, and an upper electrode arranged on the solid electrolyte membrane. In addition, the method for manufacturing the resistance-variable memory device comprises: a step for forming the lower electrode on a substrate, a step for forming the carbide-based solid electrolyte membrane on the lower electrode, and a step for forming the upper electrode on the solid electrolyte membrane.

    摘要翻译： 公开了一种包括在高温下具有稳定记忆的碳化物基固体电解质膜的电阻可变存储器件及其制造方法。 电阻可变存储装置包括：下电极，布置在下电极上的碳化物系固体电解质膜和布置在固体电解质膜上的上电极。 另外，电阻可变存储器件的制造方法包括：在基板上形成下部电极的步骤，在下部电极上形成碳化物系固体电解质膜的工序和形成上部电极的工序 在固体电解质膜上。

    Method of fabricating flash memory
    8.
    发明授权
    Method of fabricating flash memory 失效
    制造闪存的方法

    公开(公告)号：US07528039B2

    公开(公告)日：2009-05-05

    申请号：US12021181

    申请日：2008-01-28

    申请人： Hyun-Sang Hwang ,  Ho-Kyung Park ,  Man Jang ,  Min-Seok Jo

    发明人： Hyun-Sang Hwang ,  Ho-Kyung Park ,  Man Jang ,  Min-Seok Jo

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28282

    摘要： A method of fabricating a flash memory is provided. The method includes forming a tunneling insulating film, a charge storage film, and a blocking insulating film on a semiconductor substrate; performing High Temperature (HT) anneal for the resultant semiconductor substrate; and performing Low Temperature (LT) wet vapor anneal for the resultant semiconductor substrate.

    摘要翻译： 提供一种制造闪速存储器的方法。 该方法包括在半导体衬底上形成隧道绝缘膜，电荷存储膜和阻挡绝缘膜; 对所得半导体衬底进行高温（HT）退火; 并对所得的半导体衬底进行低温（LT）湿蒸气退火。

    Memory devices including barrier layers and methods of manufacturing the same
    9.
    发明授权
    Memory devices including barrier layers and methods of manufacturing the same 有权
    存储器件包括阻挡层及其制造方法

    公开(公告)号：US07358137B2

    公开(公告)日：2008-04-15

    申请号：US11245426

    申请日：2005-10-07

    申请人： Sang-hun Jeon ,  Chung-woo Kim ,  Hyun-sang Hwang

    发明人： Sang-hun Jeon ,  Chung-woo Kim ,  Hyun-sang Hwang

    IPC分类号： H01L21/336 ,  H01L29/788

    CPC分类号： H01L21/28273 ,  H01L29/513 ,  H01L29/7881

    摘要： Memory devices and methods of manufacturing the same are provided. Memory devices may include a substrate, a source region and a drain region and a gate structure. The gate structure may be in contact with the source and drain regions, and may include a barrier layer. The barrier layer may be formed of at least two layers. The at least two layers may have different bandgap energies.

    摘要翻译： 提供了存储器件及其制造方法。 存储器件可以包括衬底，源极区域和漏极区域以及栅极结构。 栅极结构可以与源极和漏极区域接触，并且可以包括阻挡层。 阻挡层可以由至少两层形成。 至少两层可能具有不同的带隙能量。