公开(公告)号：US08387563B2

公开(公告)日：2013-03-05

申请号：US13372729

申请日：2012-02-14

Applicant: Rick Endo ,  Jeremy Cheng ,  Indranil De ,  James Tsung ,  Kurt Weiner ,  Maosheng Zhao

Inventor： Rick Endo ,  Jeremy Cheng ,  Indranil De ,  James Tsung ,  Kurt Weiner ,  Maosheng Zhao

IPC: H01L21/31 ,  C23C16/458 ,  C23C16/50 ,  B65H1/00

CPC classification number: H01L21/32051 ,  B01J19/0046 ,  B01J2219/0043 ,  B01J2219/00536 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00745 ,  B01J2219/00756 ,  C23C14/042 ,  C23C14/50 ,  C23C14/548 ,  C23C16/45544 ,  H01L21/67005 ,  H01L21/6719

Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.

公开(公告)号：US20110014359A1

公开(公告)日：2011-01-20

申请号：US12921776

申请日：2009-04-17

Applicant: Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

Inventor： Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: B05D5/12

CPC classification number: H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）具有高介电常数和低泄漏特性的方法，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层 反应。

公开(公告)号：US20090061087A1

公开(公告)日：2009-03-05

申请号：US12028643

申请日：2008-02-08

Applicant: Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

Inventor： Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

IPC: C23C16/00

CPC classification number: H01L21/32051 ,  B01J19/0046 ,  B01J2219/0043 ,  B01J2219/00536 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00745 ,  B01J2219/00756 ,  C23C14/042 ,  C23C14/50 ,  C23C14/548 ,  C23C16/45544 ,  H01L21/67005 ,  H01L21/6719

Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.

公开(公告)号：US07280945B1

公开(公告)日：2007-10-09

申请号：US10187567

申请日：2002-07-01

Applicant: Kurt H. Weiner ,  Gaurav Verma ,  Indranil De

Inventor： Kurt H. Weiner ,  Gaurav Verma ,  Indranil De

IPC: G06F17/10 ,  G06F17/50

CPC classification number: G01R31/318364

Abstract: Disclosed are mechanisms are provided for determining whether a particular integrated circuit (IC) pattern is susceptible to systematic failure, e.g., due to process fluctuations. In one embodiment, final resist patterns for such IC pattern are simulated using a sparse type simulator under various process settings. The sparse type simulator uses a model (e.g., a variable threshold resist model) for a particular photolithography process in which the IC pattern is to be fabricated. The model is generated from measurements taken from a plurality of simulated structures output from a rigorous type simulator. The simulated final resist patterns may then be analyzed to determine whether the corresponding IC pattern is susceptible to systematic failure. After an IC pattern which is susceptible to systematic failure has been found, a test structure may be fabricated from a plurality of IC patterns or cells. The cells of the test structure are arranged to have a particular pattern of voltage potential or brightness levels during a voltage contrast inspection. Mechanisms for quickly inspecting such test structures to thereby predict systematic yield of a product device containing patterns similar to the test structure cells are also disclosed.

Abstract translation: 公开了提供用于确定特定集成电路（IC）模式是否易于系统故障（例如由于过程波动）的机制。 在一个实施例中，使用在各种处理设置下的稀疏型模拟器来模拟这种IC图案的最终抗蚀剂图案。 稀疏型模拟器对于要制造IC图案的特定光刻工艺使用模型（例如，可变阈值抗蚀剂模型）。 该模型是从从严格型模拟器输出的多个模拟结构中获得的测量产生的。 然后可以分析模拟的最终抗蚀剂图案，以确定相应的IC图案是否易于发生系统故障。 在已经发现容易发生系统故障的IC图案之后，可以从多个IC图案或单元制造测试结构。 测试结构的单元被布置成在电压对比度检查期间具有电压电位或亮度水平的特定图案。 还公开了用于快速检查这种测试结构从而预测包含类似于测试结构单元的图案的产品设备的系统产量的机制。

公开(公告)号：US08932995B2

公开(公告)日：2015-01-13

申请号：US13333007

申请日：2011-12-21

Applicant: Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

Inventor： Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

IPC: H01L21/265 ,  H01L21/28 ,  C23C16/455 ,  B01J19/00 ,  C23C14/04 ,  C23C14/50 ,  C23C14/54 ,  H01L21/67

CPC classification number: H01L21/32051 ,  B01J19/0046 ,  B01J2219/0043 ,  B01J2219/00536 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00745 ,  B01J2219/00756 ,  C23C14/042 ,  C23C14/50 ,  C23C14/548 ,  C23C16/45544 ,  H01L21/67005 ,  H01L21/6719

Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.

Abstract translation: 提供组合处理室。 组合处理室被配置为隔离可旋转的衬底支撑件的径向部分，该可旋转衬底支撑件又被配置为支撑衬底。 在一个实施例中，腔室包括多个聚集过程头。 在一个实施例中，具有设置在基板支撑件和工艺头之间的基板的插入件限定了用于沉积工艺的约束区域。 基板具有能够将沉积材料接近基板的开口。 通过基板的旋转和开口的移动，基板的多个区域是可访问的，以在单个基板上执行组合处理。

公开(公告)号：US08758581B2

公开(公告)日：2014-06-24

申请号：US12205544

申请日：2008-09-05

Applicant: Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

Inventor： Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

IPC: C23C14/00 ,  C25B11/00 ,  C23C16/50 ,  H01L21/306

CPC classification number: H01L21/32051 ,  B01J19/0046 ,  B01J2219/0043 ,  B01J2219/00536 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00745 ,  B01J2219/00756 ,  C23C14/042 ,  C23C14/50 ,  C23C14/548 ,  C23C16/45544 ,  H01L21/67005 ,  H01L21/6719

Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.

公开(公告)号：US08449681B2

公开(公告)日：2013-05-28

申请号：US12970421

申请日：2010-12-16

Applicant: Anh Duong ,  Indranil De

Inventor： Anh Duong ,  Indranil De

IPC: C11D7/50 ,  C11D11/00

CPC classification number: G03F7/327 ,  C11D7/3209 ,  C11D7/5009 ,  C11D7/5013 ,  C11D7/5022 ,  C11D11/0047 ,  G03F7/425 ,  H01L21/02052

Abstract: A composition for removing photoresist and bottom anti-reflective coating from a semiconductor substrate is disclosed. The composition may comprise a nontoxic solvent, the nontoxic solvent having a flash point above 80 degrees Celsius and being capable of dissolving acrylic polymer and phenolic polymer. The composition may further comprise Tetramethylammonium Hydroxide (TMAH) mixed with the nontoxic solvent.

公开(公告)号：US08349143B2

公开(公告)日：2013-01-08

申请号：US12345708

申请日：2008-12-30

Applicant: Indranil De ,  Kurt Weiner

Inventor： Indranil De ,  Kurt Weiner

IPC: C23C14/04 ,  C23C14/34

CPC classification number: H01L21/02266 ,  B05C21/00 ,  B05C21/005 ,  C23C14/04 ,  C23C14/042 ,  H01L22/10

Abstract: A shadow mask for patterning a substrate during a semiconductor process. In one implementation, a method for performing a Physical vapor deposition (PVD) on a substrate is provided. The method includes placing a substrate on a susceptor disposed below one or more PVD guns and below a plasma shield assembly having an aperture piece comprising a bellows and a shadow mask coupled to a bottom side of the bellows, the aperture piece detachably coupled to the plasma shield assembly, wherein a region defined between sides of the bellows is smaller than a width of the substrate. The method includes lowering the bellows toward the substrate to place the shadow mask in contact with the substrate and depositing a material on an isolated region on the substrate through the shadow mask.

Abstract translation: 一种用于在半导体工艺期间图案化衬底的荫罩。 在一个实施方式中，提供了一种用于在衬底上进行物理气相沉积（PVD）的方法。 该方法包括将基板放置在设置在一个或多个PVD枪下方的基座上并且在等离子体屏蔽组件的下方，该等离子体屏蔽组件具有孔径片，其包括波纹管和耦合到波纹管的底侧的荫罩，所述孔片可拆卸地耦合到等离子体 屏蔽组件，其中限定在所述波纹管的侧面之间的区域小于所述基板的宽度。 该方法包括将波纹管朝向基板降低以使荫罩与基板接触，并通过荫罩将材料沉积在基板上的隔离区域上。

公开(公告)号：US20120149180A1

公开(公告)日：2012-06-14

申请号：US13333007

申请日：2011-12-21

Applicant: Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

Inventor： Rick Endo ,  Kurt Weiner ,  Indranil De ,  James Tsung ,  Maosheng Zhao ,  Jeremy Cheng

IPC: H01L21/265 ,  H01L21/28

CPC classification number: H01L21/32051 ,  B01J19/0046 ,  B01J2219/0043 ,  B01J2219/00536 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00745 ,  B01J2219/00756 ,  C23C14/042 ,  C23C14/50 ,  C23C14/548 ,  C23C16/45544 ,  H01L21/67005 ,  H01L21/6719

Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.

Abstract translation: 提供组合处理室。 组合处理室被配置为隔离可旋转的衬底支撑件的径向部分，该可旋转衬底支撑件又被配置为支撑衬底。 在一个实施例中，腔室包括多个聚集过程头。 在一个实施例中，具有设置在基板支撑件和工艺头之间的基板的插入件限定了用于沉积工艺的约束区域。 基板具有能够将沉积材料接近基板的开口。 通过基板的旋转和开口的移动，基板的多个区域是可访问的，以在单个基板上执行组合处理。

公开(公告)号：US20120061799A1

公开(公告)日：2012-03-15

申请号：US12901239

申请日：2010-10-08

Applicant: Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

Inventor： Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: H01L29/92

CPC classification number: H01L28/40 ,  C23C14/083 ,  C23C14/3464 ,  C23C16/405 ,  C23C16/45531 ,  H01L21/02186 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/02266 ,  H01L21/0228

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，氧化物层可以通过PVD工艺或者通过使用特定前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺作为反应过程的结果来生产 反应。