LIGHT EMITTING DEVICE DRIVER CHIP
    1.
    发明申请
    LIGHT EMITTING DEVICE DRIVER CHIP 有权
    发光装置驱动芯片

    公开(公告)号:US20160100463A1

    公开(公告)日:2016-04-07

    申请号:US14595743

    申请日:2015-01-13

    IPC分类号: H05B33/08

    CPC分类号: H05B33/083 H05B33/0812

    摘要: The present invention discloses a light emitting device driver chip for driving light emitting devices in series. The chip includes: plural pins electrically connected to corresponding light emitting devices, respectively, wherein an internal voltage is provided through a predetermined one of the pins; a voltage regulation circuit for providing an operation voltage according to the internal voltage; a switch circuit including plural switch groups electrically connected to corresponding pins, respectively; a current source circuit for providing a current to the light emitting devices; and a switch control circuit for controlling the switch groups to determine which light emitting device is turned ON. The light emitting device driver chip does not directly receive the rectified input voltage.

    摘要翻译: 本发明公开了一种串联驱动发光装置的发光装置驱动芯片。 芯片包括:分别电连接到对应的发光器件的多个引脚,其中通过预定的一个引脚提供内部电压; 电压调节电路,用于根据内部电压提供工作电压; 开关电路,包括分别电连接到相应引脚的多个开关组; 用于向发光器件提供电流的电流源电路; 以及用于控制开关组以确定哪个发光器件导通的开关控制电路。 发光装置驱动芯片不直接接收整流输入电压。

    LIGHT EMITTING DEVICE DRIVER CIRCUIT
    2.
    发明申请
    LIGHT EMITTING DEVICE DRIVER CIRCUIT 有权
    发光装置驱动电路

    公开(公告)号:US20160073461A1

    公开(公告)日:2016-03-10

    申请号:US14595910

    申请日:2015-01-13

    IPC分类号: H05B33/08

    CPC分类号: H05B33/083

    摘要: The present invention discloses a light emitting device driver circuit. The light emitting device driver circuit drives a light emitting device circuit. The light emitting device circuit includes plural light emitting devices connected in series and a diode circuit, wherein the plural light emitting devices are divided to plural groups. The light emitting device driver circuit includes: a first switch circuit, a second switch circuit, a current source circuit, and a control circuit. The first switch circuit includes plural first switches connected in parallel to the corresponding groups respectively. The second switch circuit includes plural second switches coupled to a forward end and a reverse end of the diode circuit respectively, wherein the second switch circuit determines whether to conduct the forward end or the reverse end to the current source circuit according to the voltages of the forward end and the reverse end.

    摘要翻译: 本发明公开了一种发光器件驱动电路。 发光器件驱动电路驱动发光器件电路。 发光器件电路包括串联连接的多个发光器件和二极管电路,其中多个发光器件被分成多个组。 发光器件驱动电路包括:第一开关电路,第二开关电路,电流源电路和控制电路。 第一开关电路包括分别与相应组并联连接的多个第一开关。 第二开关电路包括分别耦合到二极管电路的前端和反向端的多个第二开关,其中第二开关电路根据第二开关电路的电压来确定是否将前端或反向端导向电流源电路 前端和后端。

    POWER SUPPLY SYSTEM AND SHORT CIRCUIT AND/OR BAD CONNECTION DETECTION METHOD THEREOF, AND POWER CONVERTER THEREOF
    3.
    发明申请
    POWER SUPPLY SYSTEM AND SHORT CIRCUIT AND/OR BAD CONNECTION DETECTION METHOD THEREOF, AND POWER CONVERTER THEREOF 有权
    电源系统及短路和/或负载连接检测方法及其电源转换器

    公开(公告)号:US20150372601A1

    公开(公告)日:2015-12-24

    申请号:US14735187

    申请日:2015-06-10

    IPC分类号: H02M3/335

    摘要: The present invention discloses a short circuit and/or bad connection detection method for use in a power supply system. The power supply system includes a power converter which converts an input voltage to an output voltage and supplies an output current to an electronic device. In the short circuit detection method, the conversion from the input voltage to the output voltage is disabled in a disable time period, and whether a short circuit occurs is determined according to the decreasing speed of the output voltage. In the bad connection detection method, an actual voltage and an actual current received by the electronic device are compared with the output voltage and the output current, to determine whether a bad connection occurs.

    摘要翻译: 本发明公开了一种在电源系统中使用的短路和/或不良连接检测方法。 电源系统包括电源转换器,其将输入电压转换为输出电压,并向电子设备提供输出电流。 在短路检测方法中,在禁止时间段内禁止从输入电压向输出电压的转换,并根据输出电压的降低速度来判定短路是否发生。 在不良连接检测方法中,将电子设备接收的实际电压和实际电流与输出电压和输出电流进行比较,以确定是否发生不良连接。

    SINGLE-WIRE TRANSMISSION INTERFACE AND SINGLE-WIRE TRANSMISSION METHOD AND POWER SUPPLY SYSTEM ADOPTING SINGLE-WIRE TRANSMISSION METHOD
    4.
    发明申请
    SINGLE-WIRE TRANSMISSION INTERFACE AND SINGLE-WIRE TRANSMISSION METHOD AND POWER SUPPLY SYSTEM ADOPTING SINGLE-WIRE TRANSMISSION METHOD 有权
    单线传输接口和单线传输方法和采用单线传输方式的电源系统

    公开(公告)号:US20150312025A1

    公开(公告)日:2015-10-29

    申请号:US14690383

    申请日:2015-04-18

    申请人: Isaac Y. Chen

    发明人: Isaac Y. Chen

    IPC分类号: H04L7/04 H04B3/54 H04L25/49

    摘要: The present invention discloses a single-wire transmission method, which includes: providing a transmission signal including alternating high and low levels through a single-wire, wherein a period of one of the high and low levels defining a reference time and a period of the other of the high and low levels defining a content time; determining a relative relationship between the reference time and the content time; when the content time is smaller than a proportion of the reference time, defining the content time to express a first meaning; and when the content time is larger than the proportion of the reference time, defining the content time to express a second meaning.

    摘要翻译: 本发明公开了一种单线传输方法,其包括:通过单线提供包括交替的高电平和低电平的发送信号,其中高电平和低电平之一的周期定义参考时间和周期 其他高低层定义内容时间; 确定参考时间和内容时间之间的相对关系; 当内容时间小于参考时间的比例时,定义表达第一含义的内容时间; 并且当内容时间大于参考时间的比例时,定义内容时间以表达第二含义。

    Power factor correction circuit, control circuit therefor and method for driving load circuit through power factor correction
    5.
    发明授权
    Power factor correction circuit, control circuit therefor and method for driving load circuit through power factor correction 有权
    功率因数校正电路及其控制电路及通过功率因数校正驱动负载电路的方法

    公开(公告)号:US08907648B2

    公开(公告)日:2014-12-09

    申请号:US13478015

    申请日:2012-05-22

    IPC分类号: G05F1/00 H05B33/08

    CPC分类号: H05B33/0818

    摘要: The present invention discloses a power factor correction circuit, a control circuit therefor and a method for driving a power factor correction circuit. The power factor correction circuit receives rectified power obtained by rectifying AC power, and corrects the power factor thereof. The power factor correction circuit includes an inductor, and it generates a reference signal as a limit for the inductor current. The reference signal is proportional to Comp/Vin, wherein Comp is a signal relating to a feedback signal, and Vin is a voltage signal relating to the AC power or the rectified power.

    摘要翻译: 本发明公开了一种功率因数校正电路及其控制电路及驱动功率因数校正电路的方法。 功率因数校正电路接收通过整流交流电源而得到的整流功率,校正其功率因数。 功率因数校正电路包括电感器,并产生参考信号作为电感电流的限制。 参考信号与Comp / Vin成比例,其中Comp是与反馈信号相关的信号,Vin是与AC电力或整流功率有关的电压信号。

    Apparatus and method for output voltage calibration of a primary feedback flyback power module
    6.
    发明授权
    Apparatus and method for output voltage calibration of a primary feedback flyback power module 有权
    主反馈反激式功率模块的输出电压校准装置和方法

    公开(公告)号:US08724349B2

    公开(公告)日:2014-05-13

    申请号:US13173417

    申请日:2011-06-30

    IPC分类号: H02M3/335

    CPC分类号: H02M3/33515

    摘要: An apparatus and method for output voltage calibration of a primary feedback flyback power module extract the difference between the output voltage of the power module and a target value, and according thereto, calibrate a reference voltage which is used in regulation of the output voltage, to thereby calibrate the output voltage to be the target value.

    摘要翻译: 用于主反馈反激功率模块的输出电压校准的装置和方法提取功率模块的输出电压与目标值之间的差异,并且根据该装置和方法校准用于调节输出电压的参考电压, 从而将输出电压校准为目标值。

    Single-wire asynchronous serial interface
    8.
    发明授权
    Single-wire asynchronous serial interface 有权
    单线异步串行接口

    公开(公告)号:US08369443B2

    公开(公告)日:2013-02-05

    申请号:US13175906

    申请日:2011-07-04

    申请人: Isaac Y. Chen

    发明人: Isaac Y. Chen

    IPC分类号: H04L25/49

    摘要: The present invention discloses a single-wire asynchronous serial interface, and a method for transmitting commands and data through one transmission wire, wherein the transmission wire is capable of transmitting signals of three level states. The disclosed interface comprises a signal level extraction circuit receiving signals transmitted through the wire and outputting logic or functional bits according to the received signals; a clock extraction circuit generating clock signals according to the functional bits, and a memory circuit controlled by the clock signals and storing the logic bits. The disclosed method comprises: using two of the level states to represent logic 0 and logic 1, and the third of the states as a functional bit; and determining whether a group of signals is a command or data by the existence of a functional bit within the group.

    摘要翻译: 本发明公开了一种单线异步串行接口,以及一种通过一条传输线传输命令和数据的方法,其中传输线能传输三电平状态信号。 所公开的接口包括:信号电平提取电路,接收通过线路传输的信号,并根据接收到的信号输出逻辑或功能位; 根据功能位产生时钟信号的时钟提取电路和由时钟信号控制并存储逻辑比特的存储器电路。 所公开的方法包括:使用两个电平状态来表示逻辑0和逻辑1,并且将第三个状态用作功能位; 以及通过所述组内的功能位的存在来确定一组信号是否是命令或数据。

    Multi-chip module with master-slave analog signal transmission function
    9.
    发明授权
    Multi-chip module with master-slave analog signal transmission function 失效
    多芯片模块具有主从模拟信号传输功能

    公开(公告)号:US08320149B2

    公开(公告)日:2012-11-27

    申请号:US12700146

    申请日:2010-02-04

    IPC分类号: G11C5/06

    CPC分类号: H03K3/289

    摘要: The present invention discloses a multi-chip module with master-slave analog signal transmission function. The multi-chip module comprises: a master chip having a first setting input pin for receiving an analog setting signal to generate an analog setting in the master chip, and the master chip duplicating the analog setting to output a first analog output; and a first slave chip for receiving the first analog output from the master chip to generate an internal setting of the first slave chip.

    摘要翻译: 本发明公开了一种具有主从模拟信号传输功能的多芯片模块。 多芯片模块包括:主芯片,具有第一设置输入引脚,用于接收模拟设置信号以在主芯片中产生模拟设置,主芯片复制模拟设置以输出第一模拟输出; 以及第一从芯片,用于从主芯片接收第一模拟输出以产生第一从芯片的内部设置。

    Mix mode wide range divider and method thereof
    10.
    发明授权
    Mix mode wide range divider and method thereof 有权
    混合模式宽范围分频器及其方法

    公开(公告)号:US08203379B2

    公开(公告)日:2012-06-19

    申请号:US12985563

    申请日:2011-01-06

    IPC分类号: G05F3/02

    CPC分类号: G05F1/575

    摘要: A mix mode wide range divider is provided for dividing a first signal by a second signal to generate an output signal. A third signal is generated depending on the resistance of a first adjustable resistor, and a fourth signal is generated according to the third signal and a target value determined by the second signal, to adjust the resistance of the first adjustable resistor and the resistance of a second adjustable resistor. The resistance of the first adjustable resistor is so adjusted to make the third signal equal to the target value, and the resistance of the second adjustable resistor is so adjusted to maintain a ratio of the resistance of the second adjustable resistor to the resistance of the first adjustable resistor. The output signal is generated depending on the first signal and the resistance of the second adjustable resistor.

    摘要翻译: 提供混合模式宽范围分频器,用于将第一信号除以第二信号以产生输出信号。 根据第一可调电阻器的电阻产生第三信号,并且根据第三信号和由第二信号确定的目标值产生第四信号,以调整第一可调电阻器的电阻和第一可调电阻器的电阻 第二可调电阻 第一可调电阻器的电阻被调整以使第三信号等于目标值,并且调整第二可调电阻器的电阻以保持第二可调电阻器的电阻与第一可调电阻器的电阻的比率 可调电阻 输出信号根据第一可变电阻器的第一信号和电阻产生。