公开(公告)号：US08662811B2

公开(公告)日：2014-03-04

申请号：US12917638

申请日：2010-11-02

申请人： Junya Minamida ,  Issei Ueda

发明人： Junya Minamida ,  Issei Ueda

IPC分类号： H01L21/677

CPC分类号： H01L21/67196 ,  H01L21/67778

摘要： Manufacturing cost or energy consumption of a substrate processing apparatus can be reduced. The substrate processing apparatus includes a substrate loading/unloading unit (a substrate transit chamber 12) that transfers a substrate 2 accommodated in a carrier 3; a substrate transfer chamber 14 (25) communicating with the substrate loading/unloading unit via a substrate loading/unloading port 37 (39); a plurality of substrate processing chambers 15 to 24 (26 to 35) arranged along the substrate transfer chamber 14 (25); a substrate transfer device 36 (38) provided in the substrate transfer chamber 14 (25) and configured to transfer the substrate 2 between the substrate loading/unloading unit and the substrate processing chambers 15 to 24 (26 to 35); and a clean air flowing unit 41 (42) that allows clean air to flow along the substrate transfer chamber 14 (25).

摘要翻译： 可以减少基板处理装置的制造成本或能量消耗。 基板处理装置包括：传送容纳在载体3中的基板2的基板装卸单元（基板运送室12） 经由基板装载/卸载端口37（39）与基板装载/卸载单元连通的基板传送室14（25）; 沿着基板传送室14（25）布置的多个基板处理室15至24（26至35）; 设置在基板传送室14（25）中并且被配置为在基板装载/卸载单元和基板处理室15至24（26至35）之间传送基板2的基板传送装置36（38）; 以及允许清洁空气沿着基板传送室14（25）流动的清洁空气流动单元41（42）。

公开(公告)号：US20110311340A1

公开(公告)日：2011-12-22

申请号：US13159519

申请日：2011-06-14

申请人： Akira Murata ,  Issei Ueda ,  Osamu Kuroda ,  Kouji Kimoto ,  Masahiro Yoshida

发明人： Akira Murata ,  Issei Ueda ,  Osamu Kuroda ,  Kouji Kimoto ,  Masahiro Yoshida

IPC分类号： H01L21/677

CPC分类号： H01L21/67742 ,  H01L21/67178 ,  H01L21/67754

摘要： A substrate processing apparatus includes a substrate transit table configured to mount thereon a plurality of substrates; a substrate processing chamber configured to process the substrate one by one; a substrate transfer device capable of loading the substrate into the substrate processing chamber from the substrate transit table and unloading the substrate from the substrate processing chamber to the substrate transit table; and N number of (N is an integer equal to or larger than 3) substrate holding devices provided at the substrate transfer device and configured to hold the substrates one by one. Here, a multiplicity of (2 to N−1 number of) substrates are concurrently held by 2 to N−1 number of substrate holding devices among the N number of substrate holding devices and one substrate is loaded into the substrate processing chamber.

摘要翻译： 基板处理装置包括：基板转移台，其被配置为在其上安装多个基板; 衬底处理室，被配置为逐个处理衬底; 基板转印装置，其能够从基板运送台将基板加载到基板处理室中，并将基板从基板处理室卸载到基板运送台; 和N个（N是等于或大于3的整数）的基板保持装置，其设置在基板输送装置上并且被配置为逐个保持基板。 这里，在N个基板保持装置中，通过2〜N-1个基板保持装置同时保持多个（2〜N-1个）基板，一个基板被装入基板处理室。

公开(公告)号：US20100326353A1

公开(公告)日：2010-12-30

申请号：US12855524

申请日：2010-08-12

申请人： Masami AKIMOTO ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami AKIMOTO ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B05C9/12

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67745

摘要： Provided is a coating and developing apparatus composed of an assembly of plural unit blocks. A first unit-block stack and a second unit-block stack are arranged at different positions with respect to front-and-rear direction. Unit blocks for development, each of which comprises plural processing units including a developing unit that performs developing process after exposure and a transfer device that transfers a substrate among the processing units, are arranged at the lowermost level. Unit blocks for application, or coating, each of which comprises plural processing units including a coating unit that performs application process before exposure and a transfer device that transfers a substrate among the processing units, are arranged above the unit blocks for development. Unit blocks for application are arranged in both the first and second unit-block stacks. Unit blocks for application which a wafer goes through are determined depending on the layering positional relationship between an antireflective film and a resist film. An exposed wafer goes only through the unit block for development without going through any one of the unit blocks for application.

公开(公告)号：US07793609B2

公开(公告)日：2010-09-14

申请号：US11342616

申请日：2006-01-31

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B05C5/02

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67745

摘要： Provided is a coating and developing apparatus composed of an assembly of plural unit blocks. A first unit-block stack and a second unit-block stack are arranged at different positions with respect to front-and-rear direction. Unit blocks for development, each of which comprises plural processing units including a developing unit that performs developing process after exposure and a transfer device that transfers a substrate among the processing units, are arranged at the lowermost level. Unit blocks for application, or coating, each of which comprises plural processing units including a coating unit that performs application process before exposure and a transfer device that transfers a substrate among the processing units, are arranged above the unit blocks for development. Unit blocks for application are arranged in both the first and second unit-block stacks. Unit blocks for application which a wafer goes through are determined depending on the layering positional relationship between an antireflective film and a resist film. An exposed wafer goes only through the unit block for development without going through any one of the unit blocks for application.

摘要翻译： 提供一种由多个单元块组成的涂层显影装置。 第一单位块堆叠和第二单位块堆叠被布置在相对于前后方向的不同位置。 用于显影的单元块，每个包括多个处理单元，包括执行曝光之后的显影处理的显影单元和在处理单元之间传送基板的转印装置布置在最下层。 用于应用或涂布的单元块包括多个处理单元，其包括在曝光之前进行施加处理的涂布单元和在处理单元之间传送基板的转印装置，布置在用于显影的单位块上方。 用于应用的单元块被布置在第一和第二单元块堆叠中。 根据防反射膜和抗蚀剂膜之间的层叠位置关系确定晶片通过的应用单元块。 暴露的晶片仅通过单元块进行开发，而不经过用于应用的单元块中的任何一个。

公开(公告)号：US20090003825A1

公开(公告)日：2009-01-01

申请号：US12137076

申请日：2008-06-11

申请人： Issei Ueda ,  Yasushi Hayashida ,  Akira Miyata ,  Kensei Yamamoto ,  Yuichi Yamamoto ,  Michiaki Matsushita

发明人： Issei Ueda ,  Yasushi Hayashida ,  Akira Miyata ,  Kensei Yamamoto ,  Yuichi Yamamoto ,  Michiaki Matsushita

IPC分类号： G03D3/08

CPC分类号： H01L21/67769 ,  Y10S414/139

摘要： A cassette waiting block is connected to a transfer in/out block of a coating and developing treatment system, and in the cassette waiting block, a cassette transfer in/out unit, a cassette waiting unit, a cassette delivery unit, and a substrate processing unit are provided. In the cassette waiting block, a cassette transfer unit for transferring the cassette between the cassette transfer in/out unit, the cassette waiting unit, and the cassette deliver unit, and a transfer unit for transferring the substrate between the cassette in the cassette waiting unit and the substrate processing unit are provided. Each cassette waiting unit has an opening mechanism for opening a port of the cassette.

摘要翻译： 盒式等待块连接到涂覆和显影处理系统的转移输入/输出块，并且在盒式等待块中，盒式磁带传送入/出单元，盒式磁带等待单元，盒传送单元和基板处理 提供单位。 在盒式磁带等待块中，用于在磁带盒输入/输出单元，磁带盒等待单元和磁带盒传送单元之间传送磁带的盒式磁带传送单元，以及用于在盒式磁带等待单元中的盒之间传送基板的传送单元 并提供基板处理单元。 每个盒式待机单元具有用于打开盒的端口的打开机构。

公开(公告)号：US07281869B2

公开(公告)日：2007-10-16

申请号：US11335635

申请日：2006-01-20

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： G03B5/00

CPC分类号： H01L21/67184 ,  H01L21/00 ,  H01L21/6715 ,  H01L21/67178 ,  H01L21/6719

摘要： A coating and developing system includes a resist film forming unit block and antireflection film forming unit blocks stacked up in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system can cope with a case where antireflection films are formed and a case where any antireflection film is not formed. Film forming unit blocks, namely, a TCT layer, a COT layer and a BCT layer, and developing unit blocks, namely, DEV layers, are stacked up in layers in a processing block. The TCT layer, the COT layer and the BCT layer are used selectively in the case where antireflection films are formed and where no antireflection film is formed. The coating and developing system is controlled by a simple carrying program.

摘要翻译： 涂覆显影系统包括：抗蚀剂膜形成单元块和层叠的抗反射膜形成单元块，以形成抗蚀剂膜和抗反射膜下面的抗反射膜以及在小空间中覆盖抗蚀剂膜的抗反射膜。 涂覆和显影系统可以应对形成防反射膜的情况以及没有形成任何抗反射膜的情况。 成膜单位块，即TCT层，COT层和BCT层，以及显影单元块，即DEV层，在处理块中层叠。 在形成防反射膜并且不形成抗反射膜的情况下，TCT层，COT层和BCT层被选择性地使用。 涂层和显影系统由简单的携带程序控制。

公开(公告)号：US20060164613A1

公开(公告)日：2006-07-27

申请号：US11117566

申请日：2005-04-29

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： G03B27/32

CPC分类号： H01L21/67184 ,  H01L21/6715 ,  H01L21/67178 ,  H01L21/6719

摘要： A coating and developing system includes a resist film forming unit block and antireflection film forming unit blocks stacked up in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system is capable of coping with either of a case where antireflection films are formed and a case where any antireflection film is not formed and needs simple software. Film forming unit blocks, namely, a TCT layer B3, a COT layer B4 and a BCT layer B5, and developing unit blocks, namely, DEV layers B1 and B2, are stacked up in layers in a processing block S2. The TCT layer B3, the COT layer B4 and the BCT layer B5 are used selectively in the case where antireflection films are formed and the case where any antireflection film is not formed. The coating and developing system is controlled by a simple carrying program and simple software.

公开(公告)号：US20060162646A1

公开(公告)日：2006-07-27

申请号：US11117552

申请日：2005-04-29

申请人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

发明人： Masami Akimoto ,  Shinichi Hayashi ,  Yasushi Hayashida ,  Nobuaki Matsuoka ,  Yoshio Kimura ,  Issei Ueda ,  Hikaru Ito

IPC分类号： B05D5/06 ,  B05C11/02 ,  B05C13/02

CPC分类号： H01L21/67184 ,  H01L21/67173 ,  H01L21/67178

摘要： A coating and developing system includes a resist film forming unit block and antireflection film forming unit blocks stacked up in layers to form a resist film and an antireflection film underlying the resist film and an antireflection film overlying the resist film in a small space. The coating and developing system is capable of coping with either of a case where antireflection films are formed and a case where any antireflection film is not formed and needs simple software. Film forming unit blocks, namely, a TCT layer B3, a COT layer B4 and a BCT layer B5, and developing unit blocks, namely, DEV layers B1 and B2, are stacked up in layers in a processing block S2. The TCT layer B3, the COT layer B4 and the BCT layer B5 are used selectively in the case where antireflection films are formed and the case where any antireflection film is not formed. The coating and developing system is controlled by a simple carrying program and simple software.

摘要翻译： 涂覆显影系统包括：抗蚀剂膜形成单元块和层叠的抗反射膜形成单元块，以形成抗蚀剂膜和抗反射膜下面的抗反射膜以及在小空间中覆盖抗蚀剂膜的抗反射膜。 涂层显影系统能够应对形成防反射膜的情况和没有形成任何抗反射膜的情况，并且需要简单的软件。 成膜单元块，即TCT层B 3，COT层B 4和BCT层B 5以及显影单元块，即DEV层B 1和B 2，层叠在处理块S 2。 在形成防反射膜的情况下，选择性地使用TCT层B 3，COT层B 4和BCT层B 5以及未形成任何抗反射膜的情况。 涂层和显影系统由简单的携带程序和简单的软件控制。

公开(公告)号：US06726771B2

公开(公告)日：2004-04-27

申请号：US09951754

申请日：2001-09-14

申请人： Issei Ueda

发明人： Issei Ueda

IPC分类号： H01L2131

CPC分类号： H01L21/6715 ,  Y10T137/0396 ,  Y10T137/2931

摘要： The present invention is a treatment solution supply method for supplying a treatment solution on a substrate by a pump through a supply path, which connects a treatment solution supply source and a discharge nozzle, wherein a storage portion for storing the treatment solution temporarily is disposed in the supply path between the treatment solution supply source and the pump. In the present invention another pump is further disposed in the supply path between the storage portion and the treatment solution supply source for supplying the treatment solution to the storage portion. The present invention comprises the step of maintaining the level height of the treatment solution in the storage portion at a predetermined height by supplying the treatment solution to the storage portion by the said another pump. According to the present invention, the pressure of a primary side of the pump is constantly maintained the same. As a result, a force feed pressure of a secondary side of the pump is also kept steady, thereby keeping the discharge pressure of the treatment solution from the discharge nozzle steady. Therefore, the treatment solution with a predetermined discharge pressure is discharged on the substrate, and a substrate processing is performed in a preferable way.

摘要翻译： 本发明是一种处理溶液供给方法，其通过泵将处理液供给到基板上，该供给路连接处理液供给源和排出喷嘴，其中，临时存储处理液的收纳部配置在 处理液供应源和泵之间的供应路径。 在本发明中，另一个泵还设置在存储部分和处理溶液供应源之间的供应路径中，用于将处理溶液供应到存储部分。 本发明包括通过将所述处理溶液通过所述另一个泵供给到所述储存部分而将所述储存部分中的处理溶液的液面高度保持在预定高度的步骤。根据本发明，一次侧的压力 的泵不断保持一致。 结果，泵的次级侧的供给压力也保持稳定，从而保持处理液的排出压力不受喷嘴的影响。 因此，将预定的排出压力的处理液排出到基板上，以优选的方式进行基板处理。

公开(公告)号：US06471422B2

公开(公告)日：2002-10-29

申请号：US10122333

申请日：2002-04-16

申请人： Issei Ueda ,  Shinichi Hayashi ,  Naruaki Iida ,  Yuji Matsuyama ,  Yoichi Deguchi

发明人： Issei Ueda ,  Shinichi Hayashi ,  Naruaki Iida ,  Yuji Matsuyama ,  Yoichi Deguchi

IPC分类号： G03D500

CPC分类号： H01L21/67161 ,  G07C9/00103 ,  G07C9/00111 ,  G08G3/00 ,  H01L21/67017 ,  H01L21/6715 ,  H01L21/67178 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/67748 ,  H01L21/67754 ,  Y10S134/902 ,  Y10S414/14

摘要： Thermal processing unit sections each with ten tiers and coating processing unit sections each with five tiers are disposed around a first main wafer transfer section and a second main wafer transfer section, and in the thermal processing unit section, the influence of the time required for substrate temperature regulation processing on a drop in throughput can be reduced greatly by transferring the wafer W while the temperature of the wafer W is being regulated by a temperature regulation and transfer device.