公开(公告)号：US20080096355A1

公开(公告)日：2008-04-24

申请号：US11962100

申请日：2007-12-21

申请人： Se Aug Jang ,  Yong Soo Kim ,  Jae Geun Oh ,  Jae Roh ,  Hyun Chul Sohn

发明人： Se Aug Jang ,  Yong Soo Kim ,  Jae Geun Oh ,  Jae Roh ,  Hyun Chul Sohn

IPC分类号： H01L21/336

CPC分类号： H01L27/10876 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10873 ,  H01L27/10879 ,  H01L29/66621 ,  H01L29/66795 ,  H01L29/7851

摘要： A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.

摘要翻译： 存储器件包括从半导体衬底突出的有源区。 在活动区域​​中形成凹部。 在半导体衬底上形成场氧化物层。 栅极电极延伸穿过有源区域同时与凹部重叠。 栅极绝缘层介于栅电极和有源区之间。 源极和漏极区域形成在有源区域中。 如果上述晶体管结构沿着源极 - 漏极线分段而限定了凹陷的晶体管结构，并且如果沿着栅极线分段则限定了Fin晶体管结构。 晶体管结构确保足够的数据保持时间，并且在降低阈值电压的反偏压依赖性的同时提高电流驱动能力。

公开(公告)号：US20070120234A1

公开(公告)日：2007-05-31

申请号：US11603839

申请日：2006-11-24

申请人： Chang Kim ,  Yoon Han ,  Young Song ,  Byung Kim ,  Jae Roh ,  Seong Hong

发明人： Chang Kim ,  Yoon Han ,  Young Song ,  Byung Kim ,  Jae Roh ,  Seong Hong

IPC分类号： H01L23/495

CPC分类号： H01L33/62 ,  G02B6/0073 ,  H01L33/483 ,  H01L33/54 ,  H01L33/60 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2224/4554

摘要： A side view LED package for a backlight unit includes a package body having a cavity with an inclined inner sidewall, first and second lead frames arranged in the package body, the cavity of the package body exposing a portion of at least one of the first and second lead frames placed in a bottom of the cavity to outside, a light emitting diode chip mounted on the bottom of the cavity to be electrically connected to the first and second lead frames, and a transparent encapsulant arranged in the cavity surrounding the light emitting diode chip. The cavity has a depth larger than a mounting height of the light emitting diode chip and not exceeding six times of the mounting height. The height of the sidewall is shortened to improve beam angle characteristics of emission light, increase light quantity, and prevent a molding defect of the sidewall.

摘要翻译： 一种用于背光单元的侧视图LED封装包括具有一倾斜内侧壁的空腔的封装主体，布置在封装主体中的第一和第二引线框架，该封装体的空腔暴露了第一和第二引线框架中的至少一个的一部分， 第二引线框架放置在腔的底部到外部，安装在腔的底部上以电连接到第一引线框架和第二引线框架的发光二极管芯片，以及布置在围绕发光二极管的空腔中的透明密封剂 芯片。 空腔的深度大于发光二极管芯片的安装高度，不超过安装高度的六倍。 侧壁的高度被缩短以改善发射光的束角特性，增加光量，并防止侧壁的模制缺陷。

公开(公告)号：US20070171673A1

公开(公告)日：2007-07-26

申请号：US11487966

申请日：2006-07-18

申请人： Young Song ,  Jae Roh ,  Seong Hong ,  Jong Baek ,  Chang Kim

发明人： Young Song ,  Jae Roh ,  Seong Hong ,  Jong Baek ,  Chang Kim

IPC分类号： F21V7/04

CPC分类号： G02F1/133615 ,  G02B6/0028 ,  G02B6/0031 ,  G02B6/0043 ,  G02B6/0055 ,  G02B6/0073 ,  G02F1/133603 ,  H01L33/486 ,  H01L33/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a side-emission type LED package capable of minimizing light loss to achieve high luminance and to a backlight unit using the same. The LED package includes a lead frame with an electrode formed thereon and a light emitting diode chip disposed on the lead frame. The LED package further includes a body made of molded material surrounding the light emitting diode chip disposed on the lead frame, the body having an asymmetrical shape; and a reflecting part extended from a side of the body to downwardly reflect light emitted from the light emitting diode chip. The reflecting part is extended from the upper edge of the body housing the LED chip to effectively block light from leaking outside, thereby achieving high-luminance emission.

摘要翻译： 本发明涉及能够使光损耗最小化以实现高亮度的侧发射型LED封装以及使用其的背光单元。 LED封装包括其上形成有电极的引线框架和设置在引线框架上的发光二极管芯片。 所述LED封装还包括由围绕设置在所述引线框架上的所述发光二极管芯片的模制材料制成的主体，所述主体具有不对称形状; 以及从主体的一侧延伸的反射部，向下反射从发光二极管芯片发出的光。 反射部从容纳LED芯片的主体的上边缘延伸，以有效地阻挡外界泄漏的光，从而实现高亮度发射。

公开(公告)号：US20070008739A1

公开(公告)日：2007-01-11

申请号：US11476594

申请日：2006-06-29

申请人： Chang Kim ,  Jae Roh ,  Seong Hong ,  Young Song ,  Byuna Kim

发明人： Chang Kim ,  Jae Roh ,  Seong Hong ,  Young Song ,  Byuna Kim

IPC分类号： F21V7/04

CPC分类号： G02B6/0021 ,  G02B6/0055

摘要： The present invention relates to a light source-guide structure having an LED as a light source and a backlight apparatus having the same. The light source-guide structure includes a light guide plate with grooves formed in a peripheral side thereof and a light source having a transparent package fitted into the groove of the light guide plate with an LED chip inside the transparent package. The structure also includes a wiring substrate for seating the LED chip and reflecting the light from the LED chip to the light guide plate and a reflection layer attached on upper surfaces of the light source and the light guide plate. With the light source inserted into the light guide plate, the loss of light is minimized while the horizontal beam angle of light from the LED is increased, minimizing the peripheral area.

摘要翻译： 本发明涉及具有LED作为光源的光源引导结构和具有该光源的引导结构。 光源引导结构包括在其周边形成有沟槽的导光板和在透明封装内部具有LED芯片的导光板的槽中装有透明封装的光源。 该结构还包括用于放置LED芯片并将来自LED芯片的光反射到导光板的布线基板和安装在光源和导光板的上表面上的反射层。 当光源插入导光板中时，光的损​​失最小化，而来自LED的水平光束角度增加，使周边区域最小化。

公开(公告)号：US20060290552A1

公开(公告)日：2006-12-28

申请号：US11279141

申请日：2006-04-10

申请人： Jae Roh ,  Jung-hyun Nam

发明人： Jae Roh ,  Jung-hyun Nam

IPC分类号： H03M1/12

CPC分类号： H03M1/181 ,  H03M1/56 ,  H04N5/3651 ,  H04N5/378

摘要： A CMOS image capture device includes an array of pixel elements configured to convert an image received as light at a surface thereof into analog output signals. An image processing circuit is also provided. The image processing circuit is configured to generate digital output signals from which the image can be recreated in response to the analog output signals. The image processing circuit has self-adjustable gain characteristics. The image processing circuit includes a ramp signal generator having an integration circuit therein with an adjustable RC time constant. The integration circuit includes an operational amplifier and a resistor array and/or a capacitor array electrically coupled to the operational amplifier. This resistor array and/or capacitor array enables the adjustable RC time constant.

摘要翻译： CMOS图像捕获装置包括被配置为将在其表面处接收为光的图像转换为模拟输出信号的像素元件的阵列。 还提供了图像处理电路。 图像处理电路被配置为产生数字输出信号，响应于模拟输出信号，可以从其重新创建图像。 图像处理电路具有自调节增益特性。 图像处理电路包括其中具有可调节RC时间常数的积分电路的斜坡信号发生器。 积分电路包括运算放大器和电耦合到运算放大器的电阻器阵列和/或电容器阵列。 该电阻器阵列和/或电容器阵列使得可调RC时间常数。

公开(公告)号：US20070018191A1

公开(公告)日：2007-01-25

申请号：US11490233

申请日：2006-07-21

申请人： Jae Roh ,  Seong Hong ,  Chang Kim ,  Young Song ,  Yoon Han

发明人： Jae Roh ,  Seong Hong ,  Chang Kim ,  Young Song ,  Yoon Han

IPC分类号： H01L33/00

CPC分类号： H01L25/167 ,  G02B6/0073 ,  H01L33/62 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2924/181 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A side view LED includes an insulating substrate, and first and second metal layers each having first and second areas spaced apart from each other at a predetermined gap and disposed on top and underside surfaces of the insulating substrate, respectively. First and second electrical connectors are formed in a thickness direction of the insulating substrate, connecting the first area of the first metal layer to that of the second metal layer, and the second area of the first metal layer to that of the second metal layer. An LED chip is mounted on the first metal layer and electrically connected to the first and second areas. Also, a wall part is attached to the first metal layer to form an opened area around the LED chip. A protective device is mounted on an underside surface of the second metal layer and electrically connected to the first and second areas.

摘要翻译： 侧视图LED包括绝缘基板，以及第一和第二金属层，每个第一和第二金属层分别具有以预定间隙彼此间隔开的第一和第二区域，并且分别设置在绝缘基板的顶表面和下表面上。 第一和第二电连接器形成在绝缘基板的厚度方向上，将第一金属层的第一区域与第二金属层的第一区域连接，将第一金属层的第二区域连接到第二金属层的第二区域。 LED芯片安装在第一金属层上并电连接到第一和第二区域。 此外，壁部附接到第一金属层以在LED芯片周围形成开放区域。 保护装置安装在第二金属层的下表面上并电连接到第一和第二区域。

公开(公告)号：US20060244055A1

公开(公告)日：2006-11-02

申请号：US11201951

申请日：2005-08-10

申请人： Se Jang ,  Yong Kim ,  Jae Oh ,  Jae Roh ,  Hyun Sohn

发明人： Se Jang ,  Yong Kim ,  Jae Oh ,  Jae Roh ,  Hyun Sohn

IPC分类号： H01L29/94

CPC分类号： H01L27/10876 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10873 ,  H01L27/10879 ,  H01L29/66621 ,  H01L29/66795 ,  H01L29/7851

摘要： A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.

公开(公告)号：US20060270177A1

公开(公告)日：2006-11-30

申请号：US11173089

申请日：2005-07-01

申请人： Ki Park ,  Jae Roh ,  Hyun Sohn

发明人： Ki Park ,  Jae Roh ,  Hyun Sohn

IPC分类号： H01L21/20

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/65

摘要： Disclosed is a method for forming a capacitor of a semiconductor device. In such a method, a mold insulating layer is formed on an insulating interlayer provided with a storage node plug, and the mold insulating layer is etched to form a hole through which the storage node plug is exposed. Next, a metal storage electrode with an interposed WN layer is formed on a hole surface including the exposed storage node plug and the mold insulating layer is removed. Finally, a dielectric layer and a plate electrode are formed in order on the metal storage electrode.