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    Embedded transient scanning system apparatus and methodology
    1.
    发明授权
    Embedded transient scanning system apparatus and methodology 有权
    嵌入式瞬态扫描系统装置和方法

    公开(公告)号：US09297852B2

    公开(公告)日：2016-03-29

    申请号：US13664563

    申请日：2012-10-31

    Applicant: Jeffrey C. Dunnihoo

    Inventor： Jeffrey C. Dunnihoo

    IPC: G01R31/26 ,  G06F17/40 ,  G06F19/00 ,  G01R31/28 ,  G01R31/00 ,  G01R31/3181

    CPC classification number: G01R31/2879 ,  G01R31/002 ,  G01R31/26 ,  G01R31/2884 ,  G01R31/31816 ,  G06F17/40 ,  G06F19/00

    Abstract: Systems and methods for scanning and characterizing an integrated circuit for transient events. Embedded apparatus can detect transient events that may be incident on the integrated circuit, and moreover, identify particular nodes of the integrated circuit that are affected by the transient event. Additionally, the integrated circuit can be characterized by applying known transient pulses of varying severity to selected nodes of the integrated circuit, detecting the severity levels at which the selected nodes can fail, and storing indications pertaining to pulse severity at which selected nodes can fail. Moreover, based on the characterization, targeted protection mechanisms can be provided for nodes that are characterized as being susceptible.

    Abstract translation: 用于扫描和表征瞬态事件的集成电路的系统和方法。 嵌入式设备可以检测可能入射到集成电路上的瞬态事件，此外，识别受瞬态事件影响的集成电路的特定节点。 此外，集成电路的特征可以在于，对集成电路的选定节点应用不同严重程度的已知瞬态脉冲，检测所选节点可能发生故障的严重性级别，以及存储所选节点可能失败的脉冲严重性的指示。 此外，基于表征，可以为表征为易感的节点提供目标保护机制。

    Monolithic multi-channel ESD protection device
    2.
    发明授权
    Monolithic multi-channel ESD protection device 有权
    单片多通道ESD保护器件

    公开(公告)号：US08199447B2

    公开(公告)日：2012-06-12

    申请号：US12651902

    申请日：2010-01-04

    Applicant: Harry Gee ,  Wenjiang Zeng ,  Jeffrey C. Dunnihoo

    Inventor： Harry Gee ,  Wenjiang Zeng ,  Jeffrey C. Dunnihoo

    IPC: H02H9/00

    CPC classification number: H02H9/046 ,  H01L23/60 ,  H01L27/0255 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: A semiconductor device is described that includes one or more electrostatic discharge (ESD) protection circuits. Each circuit comprises reverse-biased steering diodes connected in series between power rail and signal ground, a bypass Zener diode and a substrate Zener diode. The Zener diodes provide ESD protection and the steering diode cooperate with the substrate Zener diode to provide a bypass function that is substantially symmetric about the signal ground. Noise in the circuit can be shunted using internal and/or external capacitances that can be implemented as Zener diodes.

    Abstract translation: 描述了包括一个或多个静电放电（ESD）保护电路的半导体器件。 每个电路包括串联在电源轨和信号地之间的反向偏置导向二极管，旁路齐纳二极管和衬底齐纳二极管。 齐纳二极管提供ESD保护，并且转向二极管与衬底齐纳二极管配合以提供基本对称于信号地的旁路功能。 可以使用可实现为齐纳二极管的内部和/或外部电容来分流电路中的噪声。

    MONOLITHIC MULTI-CHANNEL ESD PROTECTION DEVICE
    3.
    发明申请
    MONOLITHIC MULTI-CHANNEL ESD PROTECTION DEVICE 有权
    单声道多通道ESD保护装置

    公开(公告)号：US20110163352A1

    公开(公告)日：2011-07-07

    申请号：US12651902

    申请日：2010-01-04

    Applicant: Harry Gee ,  Wenjiang Zeng ,  Jeffrey C. Dunnihoo

    Inventor： Harry Gee ,  Wenjiang Zeng ,  Jeffrey C. Dunnihoo

    IPC: H01L23/60 ,  H01L21/768 ,  H02H9/00

    CPC classification number: H02H9/046 ,  H01L23/60 ,  H01L27/0255 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: A semiconductor device is described that includes one or more electrostatic discharge (ESD) protection circuits. Each circuit comprises reverse-biased steering diodes connected in series between power rail and signal ground, a bypass Zener diode and a substrate Zener diode. The Zener diodes provide ESD protection and the steering diode cooperate with the substrate Zener diode to provide a bypass function that is substantially symmetric about the signal ground. Noise in the circuit can be shunted using internal and/or external capacitances that can be implemented as Zener diodes.

    Abstract translation: 描述了包括一个或多个静电放电（ESD）保护电路的半导体器件。 每个电路包括串联在电源轨和信号地之间的反向偏置导向二极管，旁路齐纳二极管和衬底齐纳二极管。 齐纳二极管提供ESD保护，并且转向二极管与衬底齐纳二极管配合以提供基本对称于信号地的旁路功能。 可以使用可实现为齐纳二极管的内部和/或外部电容来分流电路中的噪声。

    Shared bios ROM warm boot
    6.
    发明授权
    Shared bios ROM warm boot 失效
    共享bios ROM热启动

    公开(公告)号：US5892943A

    公开(公告)日：1999-04-06

    申请号：US774626

    申请日：1996-12-30

    Applicant: J. Glen Rockford ,  Jeffrey C. Dunnihoo ,  Richard E. Wahler

    Inventor： J. Glen Rockford ,  Jeffrey C. Dunnihoo ,  Richard E. Wahler

    IPC: G06F3/023 ,  G06F9/445 ,  G06F9/06

    CPC classification number: G06F9/4403 ,  G06F3/023

    Abstract: An interface that allows the host CPU and the keyboard controller in a PC to share a common BIOS ROM includes a logic circuit that receives a set of input signals and produces a set of signals that emulates a jump instruction op-code that causes the host CPU to vector to a specified address location in the system memory map normally reserved for the system ROM BIOS code, whenever both the host CPU and keyboard controller are contending for access to the BIOS ROM.

    Abstract translation: 允许PC中的主机CPU和键盘控制器共享公共BIOS ROM的接口包括接收一组输入信号并产生一组信号的逻辑电路，该组信号模拟跳转指令操作码，其使主机CPU 无论主机CPU和键盘控制器是否正在争取访问BIOS ROM，都要向系统ROM BIOS代码保留的系统存储器映射中指定的地址位置。

    Programmable timer & methods for scheduling time slices executed by a controller circuit
    10.
    发明授权
    Programmable timer & methods for scheduling time slices executed by a controller circuit 失效
    用于调度由控制器电路执行的时间片的可编程定时器和方法

    公开(公告)号：US06434708B1

    公开(公告)日：2002-08-13

    申请号：US09289275

    申请日：1999-04-09

    Applicant: Jeffrey C. Dunnihoo ,  Minghua Lin

    Inventor： Jeffrey C. Dunnihoo ,  Minghua Lin

    IPC: G06F104

    CPC classification number: G06F9/4825

    Abstract: A programmable timer is disclosed for use in conjunction with a microcontroller circuit. The timer is used as part of a time slice arbiter in a real time operating system, which arbiter manages device routines by allocating them to distinct code time slices executable by such microcontroller. The set up of time slices, including their number, sequence, duration, etc., can be configured and optimized to achieve a desired system performance level based on characteristics of an associated system bus, devices on the bus, etc. The timer operates as a hardware controller to direct the interrupt handler to various entry points in the corresponding routines associated with interrupt based devices on a system bus.

    Abstract translation: 公开了一种与微控制器电路结合使用的可编程定时器。 定时器用作实时操作系统中的时间片仲裁器的一部分，仲裁器通过将定时器分配给由这样的微控制器执行的不同代码时间片来管理设备例程。 可以配置和优化时间片的设置，包括其数量，序列，持续时间等，以根据相关系统总线，总线上的设备等的特性实现所需的系统性能等级。定时器以 硬件控制器将中断处理程序引导到与系统总线上基于中断的设备相关联的相应例程中的各个入口点。

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