公开(公告)号：US08283237B2

公开(公告)日：2012-10-09

申请号：US12978129

申请日：2010-12-23

申请人： Nagarajan Rajagopalan ,  Ji Ae Park ,  Ryan Yamase ,  Shamik Patel ,  Thomas Nowak ,  Li-Qun Xia ,  Bok Hoen Kim ,  Ran Ding ,  Jim Baldino ,  Mehul Naik ,  Sesh Ramaswami

发明人： Nagarajan Rajagopalan ,  Ji Ae Park ,  Ryan Yamase ,  Shamik Patel ,  Thomas Nowak ,  Li-Qun Xia ,  Bok Hoen Kim ,  Ran Ding ,  Jim Baldino ,  Mehul Naik ,  Sesh Ramaswami

IPC分类号： H01L21/30 ,  H01L21/4763 ,  H01L21/44 ,  H01L21/31

CPC分类号： H01L24/13 ,  H01L21/02074 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/6719 ,  H01L21/6835 ,  H01L21/68792 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76898 ,  H01L24/11 ,  H01L24/742 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/11002 ,  H01L2224/11452 ,  H01L2224/1182 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13687 ,  H01L2224/742 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/05042 ,  H01L2924/00

摘要： A through-silicon via fabrication method comprises forming a substrate by bonding the front surface of a silicon plate to a carrier using an adhesive layer therebetween to expose the back surface of the silicon plate. A silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate. A plurality of through holes are etched in the silicon plate, the through holes comprising sidewalls and bottom walls. A metallic conductor is deposited in the through holes to form a plurality of through-silicon vias.

摘要翻译： 通过硅通孔的制造方法包括通过使用其间的粘合剂层将硅板的前表面粘合到载体上来形成基板，以暴露硅板的背面。 氮化硅钝化层沉积在衬底的硅板的暴露的背面上。 在硅板中蚀刻多个通孔，通孔包括侧壁和底壁。 金属导体沉积在通孔中以形成多个通硅通孔。

公开(公告)号：US20110136327A1

公开(公告)日：2011-06-09

申请号：US12824032

申请日：2010-06-25

申请人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

发明人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

IPC分类号： H01L21/329 ,  H01L21/203

CPC分类号： H01L21/0262 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/66136 ,  H01L29/868

摘要： Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.

摘要翻译： 描述了在衬底上形成高电流密度垂直p-i-n二极管的方法。 这些方法包括以下步骤：以含有IV族元素的前体和依次暴露于n型掺杂剂前体和p型掺杂剂前体的任一顺序同时组合。 通过在流过含IV族元素的前体的同时减少或消除掺杂剂前体的流动，在n型和p型层之间沉积本征层。 在沉积n型层，本征层和p型层期间，衬底可以驻留在相同的处理室中，并且衬底在相邻层的沉积之间不暴露于大气中。

公开(公告)号：US08563095B2

公开(公告)日：2013-10-22

申请号：US12724396

申请日：2010-03-15

申请人： Nagarajan Rajagopalan ,  Xinhai Han ,  Ryan Yamase ,  Ji Ae Park ,  Shamik Patel ,  Thomas Nowak ,  Zhengjiang “David” Cui ,  Mehul Naik ,  Heung Lak Park ,  Ran Ding ,  Bok Hoen Kim

发明人： Nagarajan Rajagopalan ,  Xinhai Han ,  Ryan Yamase ,  Ji Ae Park ,  Shamik Patel ,  Thomas Nowak ,  Zhengjiang “David” Cui ,  Mehul Naik ,  Heung Lak Park ,  Ran Ding ,  Bok Hoen Kim

IPC分类号： H05H1/24 ,  C23C16/34

CPC分类号： H01L21/02068 ,  C23C16/345 ,  C23C16/45523 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/56 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/291 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/13 ,  H01L24/742 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/1358 ,  H01L2224/13583 ,  H01L2224/13687 ,  H01L2224/742 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/05042 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.

摘要翻译： 描述了在衬底的特征上形成包括氮化硅的钝化层的方法。 在沉积方法的第一阶段中，将包含含硅气体和含氮气体的介电沉积气体引入工艺区域并通电以沉积氮化硅层。 在第二阶段中，将具有不同于介电沉积气体的组成不同的处理气体引入处理区并通电以处理氮化硅层。 第一和第二阶段可以执行多次。

公开(公告)号：US08329575B2

公开(公告)日：2012-12-11

申请号：US12977060

申请日：2010-12-22

申请人： Nagarajan Rajagopalan ,  Ji Ae Park ,  Ryan Yamase ,  Shamik Patel ,  Thomas Nowak ,  Li-Qun Xia ,  Bok Hoen Kim ,  Ran Ding ,  Jim Baldino ,  Mehul Naik ,  Sesh Ramaswami

发明人： Nagarajan Rajagopalan ,  Ji Ae Park ,  Ryan Yamase ,  Shamik Patel ,  Thomas Nowak ,  Li-Qun Xia ,  Bok Hoen Kim ,  Ran Ding ,  Jim Baldino ,  Mehul Naik ,  Sesh Ramaswami

IPC分类号： H01L21/4763 ,  H01L21/44 ,  H01L21/31

CPC分类号： H01L24/13 ,  H01L21/02074 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/6719 ,  H01L21/6835 ,  H01L21/68792 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76898 ,  H01L24/11 ,  H01L24/742 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/11002 ,  H01L2224/11452 ,  H01L2224/1182 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13687 ,  H01L2224/742 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/05042 ,  H01L2924/00

摘要： A through-silicon via fabrication method includes etching a plurality of through holes in a silicon plate. An oxide liner is deposited on the surface of the silicon plate and on the sidewalls and bottom wall of the through holes. A metallic conductor is then deposited in the through holes. In another version, which may be used concurrently with the oxide liner, a silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate.

摘要翻译： 一种硅通孔制造方法包括蚀刻硅板中的多个通孔。 在硅板的表面和通孔的侧壁和底壁上沉积氧化物衬垫。 然后将金属导体沉积在通孔中。 在可与氧化物衬垫同时使用的另一种方案中，氮化硅钝化层沉积在衬底的硅板的暴露后表面上。

公开(公告)号：US20120164827A1

公开(公告)日：2012-06-28

申请号：US12978129

申请日：2010-12-23

申请人： Nagarajan RAJAGOPALAN ,  Ji Ae PARK ,  Ryan YAMASE ,  Shamik PATEL ,  Thomas NOWAK ,  Li-Qun XIA ,  Bok Hoen KIM ,  Ran DING ,  Jim BALDINO ,  Mehul NAIK ,  Sesh RAMASWAMI

发明人： Nagarajan RAJAGOPALAN ,  Ji Ae PARK ,  Ryan YAMASE ,  Shamik PATEL ,  Thomas NOWAK ,  Li-Qun XIA ,  Bok Hoen KIM ,  Ran DING ,  Jim BALDINO ,  Mehul NAIK ,  Sesh RAMASWAMI

IPC分类号： H01L21/762

CPC分类号： H01L24/13 ,  H01L21/02074 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/6719 ,  H01L21/6835 ,  H01L21/68792 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76898 ,  H01L24/11 ,  H01L24/742 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/11002 ,  H01L2224/11452 ,  H01L2224/1182 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13687 ,  H01L2224/742 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/05042 ,  H01L2924/00

摘要： A through-silicon via fabrication method comprises forming a substrate by bonding the front surface of a silicon plate to a carrier using an adhesive layer therebetween to expose the back surface of the silicon plate. A silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate. A plurality of through holes are etched in the silicon plate, the through holes comprising sidewalls and bottom walls. A metallic conductor is deposited in the through holes to form a plurality of through-silicon vias.

摘要翻译： 通过硅通孔的制造方法包括通过使用其间的粘合剂层将硅板的前表面粘合到载体上来形成基板，以暴露硅板的背面。 氮化硅钝化层沉积在衬底的硅板的暴露的背面上。 在硅板中蚀刻多个通孔，通孔包括侧壁和底壁。 金属导体沉积在通孔中以形成多个通硅通孔。

公开(公告)号：US20130195937A1

公开(公告)日：2013-08-01

申请号：US13809617

申请日：2011-07-14

申请人： Yoonhwa Jeong ,  Hyun Jung Lee ,  Do Yeon Lee ,  Yoo Hun Noh ,  Do Hee Kim ,  Ok Hyeon Kim ,  Ji Ae Park ,  Jiwon Lee

发明人： Yoonhwa Jeong ,  Hyun Jung Lee ,  Do Yeon Lee ,  Yoo Hun Noh ,  Do Hee Kim ,  Ok Hyeon Kim ,  Ji Ae Park ,  Jiwon Lee

IPC分类号： A61K33/44 ,  A61K31/166 ,  A61K31/235 ,  A61K9/00 ,  A61K31/192

CPC分类号： A61K33/44 ,  A61B5/04001 ,  A61B5/04002 ,  A61B5/4082 ,  A61B5/4848 ,  A61K9/0092 ,  A61K31/166 ,  A61K31/192 ,  A61K31/235

摘要： A method for preventing or treating a brain nervous disease includes administering to a subject in need thereof a therapeutically effective amount of a carbon nanotube, wherein the nervous disease is a brain disease or a traumatic central nervous system injury. The composition of the present invention enables patients to recover from physical damage to the brain, exhibits superior efficacy for inhibiting the onset of Parkinson's disease and strokes in animal models for Parkinson's disease and strokes, and the cytotoxic effects of beta amyloid in beta amyloid toxicity tests. Therefore, the composition of the present invention can be effectively used in the preparation of medicine for protecting cranial nerves, therapeutic agents for preventing or treating brain disease, or therapeutic agents for treating traumatic injuries to the central nervous system.

摘要翻译： 用于预防或治疗脑神经疾病的方法包括向有需要的受试者施用治疗有效量的碳纳米管，其中所述神经疾病是脑疾病或创伤性中枢神经系统损伤。 本发明的组合物使得患者能够从对脑的物理损伤中恢复，在帕金森病和中风的动物模型中显示出优异的抑制帕金森病发作和中风的功效，以及β淀粉样蛋白在β淀粉样蛋白毒性试验中的细胞毒性作用 。 因此，本发明的组合物可以有效地用于制备用于保护颅神经的药物，用于预防或治疗脑部疾病的治疗剂，或用于治疗对中枢神经系统的创伤性损伤的治疗剂。

公开(公告)号：US08298887B2

公开(公告)日：2012-10-30

申请号：US12824032

申请日：2010-06-25

申请人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

发明人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

IPC分类号： H01L21/8234

CPC分类号： H01L21/0262 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/66136 ,  H01L29/868

摘要： Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.

摘要翻译： 描述了在衬底上形成高电流密度垂直p-i-n二极管的方法。 这些方法包括以下步骤：以含有IV族元素的前体和依次暴露于n型掺杂剂前体和p型掺杂剂前体的任一顺序同时组合。 通过在流过含IV族元素的前体的同时减少或消除掺杂剂前体的流动，在n型和p型层之间沉积本征层。 在沉积n型层，本征层和p型层期间，衬底可以驻留在相同的处理室中，并且衬底在相邻层的沉积之间不暴露于大气中。

公开(公告)号：US20120164829A1

公开(公告)日：2012-06-28

申请号：US12977060

申请日：2010-12-22

申请人： Nagarajan Rajagopalan ,  Ji Ae Park ,  Ryan Yamase ,  Shamik Patel ,  Thomas Nowak ,  Li-Qun Xia ,  Bok Hoen Kim ,  Ran Ding ,  Jim Baldino ,  Mehul Naik ,  Sesh Ramaswami

发明人： Nagarajan Rajagopalan ,  Ji Ae Park ,  Ryan Yamase ,  Shamik Patel ,  Thomas Nowak ,  Li-Qun Xia ,  Bok Hoen Kim ,  Ran Ding ,  Jim Baldino ,  Mehul Naik ,  Sesh Ramaswami

IPC分类号： H01L21/28

CPC分类号： H01L24/13 ,  H01L21/02074 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/6719 ,  H01L21/6835 ,  H01L21/68792 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76898 ,  H01L24/11 ,  H01L24/742 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/11002 ,  H01L2224/11452 ,  H01L2224/1182 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13687 ,  H01L2224/742 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/05042 ,  H01L2924/00

摘要： A through-silicon via fabrication method includes etching a plurality of through holes in a silicon plate. An oxide liner is deposited on the surface of the silicon plate and on the sidewalls and bottom wall of the through holes. A metallic conductor is then deposited in the through holes. In another version, which may be used concurrently with the oxide liner, a silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate.

摘要翻译： 一种硅通孔制造方法包括蚀刻硅板中的多个通孔。 在硅板的表面和通孔的侧壁和底壁上沉积氧化物衬垫。 然后将金属导体沉积在通孔中。 在可与氧化物衬垫同时使用的另一种方案中，氮化硅钝化层沉积在衬底的硅板的暴露后表面上。

公开(公告)号：US20110223765A1

公开(公告)日：2011-09-15

申请号：US12724396

申请日：2010-03-15

申请人： Nagarajan RAJAGOPALAN ,  Xinhai HAN ,  Ryan YAMASE ,  Ji Ae PARK ,  Shamik PATEL ,  Thomas NOWAK ,  Zhengjiang "David" CUI ,  Mehul NAIK ,  Heung Lak PARK ,  Ran DING ,  Bok Hoen KIM

发明人： Nagarajan RAJAGOPALAN ,  Xinhai HAN ,  Ryan YAMASE ,  Ji Ae PARK ,  Shamik PATEL ,  Thomas NOWAK ,  Zhengjiang "David" CUI ,  Mehul NAIK ,  Heung Lak PARK ,  Ran DING ,  Bok Hoen KIM

IPC分类号： H01L21/311 ,  H01L21/318

CPC分类号： H01L21/02068 ,  C23C16/345 ,  C23C16/45523 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/56 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/291 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/13 ,  H01L24/742 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/1358 ,  H01L2224/13583 ,  H01L2224/13687 ,  H01L2224/742 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/05042 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.

摘要翻译： 描述了在衬底的特征上形成包含氮化硅的钝化层的方法。 在沉积方法的第一阶段中，将包含含硅气体和含氮气体的介电沉积气体引入工艺区域并通电以沉积氮化硅层。 在第二阶段中，将具有不同于介电沉积气体的组成不同的处理气体引入处理区并通电以处理氮化硅层。 第一和第二阶段可以执行多次。

公开(公告)号：US20120128583A1

公开(公告)日：2012-05-24

申请号：US13388591

申请日：2009-12-13

申请人： Tae Jung Kim ,  Yong Min Jang ,  Ji Ae Park

发明人： Tae Jung Kim ,  Yong Min Jang ,  Ji Ae Park

IPC分类号： A61K49/04 ,  C07F5/00 ,  C07F13/00 ,  A61K51/04 ,  B05D5/00 ,  B05D7/00 ,  C07C323/58 ,  A61K49/18 ,  B82Y5/00 ,  B82Y40/00

CPC分类号： A61K49/103 ,  A61K49/0428 ,  A61K49/105 ,  A61K49/1881 ,  B05D1/18 ,  C07K5/022 ,  C07K5/06026

摘要： The present invention relates to DTPA derivatives capable of forming complexes by combining with metals and the like, metal complexes formed by combining with the DTPA derivatives, MR and CT contrast agents including gold (Au) nano-particles of which surfaces are coated with the metal complexes, and a method for manufacturing the same. The MR and CT contrast agents according to the present invention have a high magnetic relaxation rate, thereby providing an excellent contrast enforcement effect and a long image acquisition time. Furthermore, the MR and CT contrast agents are not toxic to the human body, and are image contrast agents of dual molecules capable of being applied to both MR and CT.

摘要翻译： 本发明涉及能与金属等结合形成络合物的DTPA衍生物，通过与DTPA衍生物结合形成的金属络合物，MR和CT造影剂，其包括金（Au）纳米颗粒，其表面涂覆有金属 络合物及其制造方法。 根据本发明的MR和CT造影剂具有高的磁弛豫率，从而提供优异的对比度执行效果和长的图像获取时间。 此外，MR和CT造影剂对人体无毒性，并且是能够应用于MR和CT的双分子的图像造影剂。