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    SEMICONDUCTOR DEVICE HAVING METAL PLUG AND METHOD OF FORMING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE HAVING METAL PLUG AND METHOD OF FORMING THE SAME 有权
    具有金属插件的半导体器件及其形成方法

    公开(公告)号：US20120299072A1

    公开(公告)日：2012-11-29

    申请号：US13425906

    申请日：2012-03-21

    申请人： WAN-DON KIM ,  Seung-Hwan Lee ,  Beom-Seok Kim ,  Kyu-Ho Cho ,  Oh-Seong Kwon ,  Geun-Kyu Choi ,  Ji-Eun Lim ,  Yong-Suk Tak

    发明人： WAN-DON KIM ,  Seung-Hwan Lee ,  Beom-Seok Kim ,  Kyu-Ho Cho ,  Oh-Seong Kwon ,  Geun-Kyu Choi ,  Ji-Eun Lim ,  Yong-Suk Tak

    IPC分类号： H01L27/06

    CPC分类号： H01L21/823475 ,  H01L21/823456

    摘要： Provided is a semiconductor device including first, second and third source/drain regions. A first conductive plug in contact with the first source/drain regions, having a first width and a first height, and including a first material is provided. An interlayer insulating layer covering the first conductive plug and the substrate is disposed. A second conductive plug vertically penetrating the interlayer insulating layer to be in contact with the second source/drain regions, having a second width and a second height, and including a second material is provided. A third conductive plug vertically penetrating the interlayer insulating layer to be in contact with the third source/drain regions, having a third width and a third height, and including a third material is disposed. The second material includes a noble metal, a noble metal oxide or a perovskite-based conductive oxide.

    摘要翻译： 提供了包括第一，第二和第三源极/漏极区域的半导体器件。 提供了与第一源/漏区接触的第一导电插塞，具有第一宽度和第一高度，并且包括第一材料。 设置覆盖第一导电插塞和基板的层间绝缘层。 提供垂直穿过层间绝缘层以与具有第二宽度和第二高度并且包括第二材料的第二源/漏区接触的第二导电插塞。 设置垂直贯穿层间绝缘层与第三源极/漏极区域接触的第三导电插塞，具有第三宽度和第三高度，并且包括第三材料。 第二种材料包括贵金属，贵金属氧化物或钙钛矿型导电氧化物。

    Semiconductor device having metal plug and method of forming the same
    2.
    发明授权
    Semiconductor device having metal plug and method of forming the same 有权
    具有金属塞的半导体装置及其形成方法

    公开(公告)号：US09153499B2

    公开(公告)日：2015-10-06

    申请号：US13425906

    申请日：2012-03-21

    申请人： Wan-Don Kim ,  Seung-Hwan Lee ,  Beom-Seok Kim ,  Kyu-Ho Cho ,  Oh-Seong Kwon ,  Geun-Kyu Choi ,  Ji-Eun Lim ,  Yong-Suk Tak

    发明人： Wan-Don Kim ,  Seung-Hwan Lee ,  Beom-Seok Kim ,  Kyu-Ho Cho ,  Oh-Seong Kwon ,  Geun-Kyu Choi ,  Ji-Eun Lim ,  Yong-Suk Tak

    IPC分类号： H01L27/06 ,  H01L21/8234

    CPC分类号： H01L21/823475 ,  H01L21/823456

    摘要： Provided is a semiconductor device including first, second and third source/drain regions. A first conductive plug in contact with the first source/drain regions, having a first width and a first height, and including a first material is provided. An interlayer insulating layer covering the first conductive plug and the substrate is disposed. A second conductive plug vertically penetrating the interlayer insulating layer to be in contact with the second source/drain regions, having a second width and a second height, and including a second material is provided. A third conductive plug vertically penetrating the interlayer insulating layer to be in contact with the third source/drain regions, having a third width and a third height, and including a third material is disposed. The second material includes a noble metal, a noble metal oxide or a perovskite-based conductive oxide.

    摘要翻译： 提供了包括第一，第二和第三源极/漏极区域的半导体器件。 提供了与第一源/漏区接触的第一导电插塞，具有第一宽度和第一高度，并且包括第一材料。 设置覆盖第一导电插塞和基板的层间绝缘层。 提供垂直穿过层间绝缘层以与具有第二宽度和第二高度并且包括第二材料的第二源/漏区接触的第二导电插塞。 设置垂直贯穿层间绝缘层与第三源极/漏极区域接触的第三导电插塞，具有第三宽度和第三高度，并且包括第三材料。 第二种材料包括贵金属，贵金属氧化物或钙钛矿型导电氧化物。

    Deposition apparatus and related methods including a pulse fluid supplier having a buffer
    8.
    发明申请
    Deposition apparatus and related methods including a pulse fluid supplier having a buffer 审中-公开
    沉积装置及相关方法，包括具有缓冲器的脉冲流体供应器

    公开(公告)号：US20050155551A1

    公开(公告)日：2005-07-21

    申请号：US10952323

    申请日：2004-09-28

    申请人： Byoung-Jae Bae ,  Young-Bae Choi ,  Ji-Eun Lim

    发明人： Byoung-Jae Bae ,  Young-Bae Choi ,  Ji-Eun Lim

    IPC分类号： C23C16/455 ,  C23C16/448 ,  C23C16/00

    CPC分类号： C23C16/4481

    摘要： A deposition apparatus for depositing a predetermined material on a semiconductor substrate includes a chamber configured to perform a deposition process and a source gas supplier having a pulse fluid supplier configured to cyclically supply a source of a source gas to the chamber. The pulse fluid supplier includes a buffer configured to provide a space in which a fluid is received and a body including a first supply port connected to a source supplier, a second supply port connected to a carrier gas supply pipe, and a discharge port connected to a fluid supply pipe. The fluid supply pipe is configured such that fluid in the buffer flows through the fluid supply pipe to the chamber. The pulse fluid supplier includes a controller configured to selectively allow or prevent a source fluid supplied by the first supply port and a carrier gas supplied by the second supply port to flow to/from the buffer, and to allow or prevent a fluid in the buffer to flow to/from the fluid supply pipe.

    摘要翻译： 用于在半导体衬底上沉积预定材料的沉积装置包括构造成执行沉积工艺的腔室和具有脉冲流体供应器的源气体供应器，所述脉冲流体供应器构造成将源气体源循环地供应到腔室。 脉冲流体供给器包括缓冲器，该缓冲器被构造成提供容纳流体的空间和包括连接到源供应器的第一供应端口的主体，连接到载气供应管的第二供应端口和连接到 流体供应管。 流体供给管构造成使得缓冲液中的流体流过流体供应管至腔室。 脉冲流体供应器包括：控制器，其被配置为选择性地允许或防止由第一供应口供应的源流体和由第二供应口提供的载气流向缓冲器或从缓冲器流出，并允许或防止缓冲器中的流体 流向/从流体供应管流出。

    METHOD OF FORMING A PHASE-CHANGEABLE LAYER AND METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY DEVICE USING THE SAME
    10.
    发明申请
    METHOD OF FORMING A PHASE-CHANGEABLE LAYER AND METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY DEVICE USING THE SAME 审中-公开
    形成相变层的方法及使用其制造半导体存储器件的方法

    公开(公告)号：US20080096386A1

    公开(公告)日：2008-04-24

    申请号：US11876631

    申请日：2007-10-22

    申请人： Young-Lim PARK ,  Sung-Lae CHO ,  Byoung-Jae BAE ,  Jin-Il LEE ,  Hye-Young PARK ,  Ji-Eun LIM

    发明人： Young-Lim PARK ,  Sung-Lae CHO ,  Byoung-Jae BAE ,  Jin-Il LEE ,  Hye-Young PARK ,  Ji-Eun LIM

    IPC分类号： H01L21/02

    CPC分类号： H01L27/2436 ,  C23C16/305 ,  C23C16/45525 ,  C23C16/45538 ,  C23C16/45553 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1675

    摘要： A phase-changeable layer and a method of forming the same are disclosed. In the method, a first hydrogen gas is introduced into a reaction chamber into which a substrate is loaded at a first flow rate to form first plasma. A primary cyclic CVD process is carried out using precursors in the reaction chamber to form a lower phase-changeable layer having a first grain size on the substrate. A second hydrogen gas is introduced into the reaction chamber at a second flow rate less than the first flow rate to form second plasma. A secondary cyclic CVD process is carried out using the precursors in the reaction chamber to form an upper phase-changeable layer having a second grain size smaller than the first grain size on the substrate, thereby forming a phase-changeable layer. Thus, the phase-changeable layer may have strong adhesion strength with respect to a lower layer and good electrical characteristics.

    摘要翻译： 公开了一种相变层及其形成方法。 在该方法中，将第一氢气引入反应室中，以第一流速将载体加载到反应室中以形成第一等离子体。 使用反应室中的前体进行初级循环CVD工艺，以在衬底上形成具有第一晶粒尺寸的下相变层。 将第二氢气以小于第一流量的第二流量引入反应室中以形成第二等离子体。 使用反应室中的前体进行二次循环CVD工艺，以形成具有比基板上的第一晶粒尺寸小的第二晶粒尺寸的上相变层，从而形成相变层。 因此，相变层可以具有相对于较低层的强粘合强度和良好的电特性。