公开(公告)号：US08576600B2

公开(公告)日：2013-11-05

申请号：US13420038

申请日：2012-03-14

申请人： Jung Hwan Lee ,  Seong Je Park ,  Ji Hwan Kim ,  Myung Cho ,  Beom Seok Hah

发明人： Jung Hwan Lee ,  Seong Je Park ,  Ji Hwan Kim ,  Myung Cho ,  Beom Seok Hah

IPC分类号： G11C15/00

CPC分类号： G11C15/046 ,  G11C16/10

摘要： A semiconductor memory device includes a memory array configured to include memory cells for storing input data and Code Address Memory (CAM) cells for storing setting data used to set an operation condition; an operation circuit configured to perform a CAM read operation by supplying a read voltage to the CAM cells, perform a test operation for detecting unstable CAM cells in each of which a difference between a threshold voltage and the read voltage is smaller than a permitted limit, from among the CAM cells, and perform an erase operation or a program operation for the unstable CAM cells; and a controller configured to control the operation circuit so that the program operation for storing the setting data in the unstable CAM cells is performed if the number of unstable CAM cells detected in the test operation is greater than a permitted value.

摘要翻译： 半导体存储器件包括：存储器阵列，被配置为包括用于存储输入数据的存储器单元和用于存储用于设置操作条件的设置数据的代码地址存储器（CAM）单元; 配置为通过向CAM单元提供读取电压来执行CAM读取操作的操作电路，执行用于检测阈值电压和读取电压之间的差小于允许极限的不稳定的CAM单元的测试操作， 从CAM单元中进行擦除操作或对不稳定的CAM单元的编程动作; 以及控制器，其被配置为如果在测试操作中检测到​​的不稳定的CAM单元的数量大于允许值，则执行用于将设置数据存储在不稳定的CAM单元中的程序操作。

公开(公告)号：US08456907B2

公开(公告)日：2013-06-04

申请号：US13337196

申请日：2011-12-26

申请人： Ji Hwan Kim ,  Seong Je Park ,  Jung Hwan Lee ,  Myung Cho ,  Beom Seok Hah

发明人： Ji Hwan Kim ,  Seong Je Park ,  Jung Hwan Lee ,  Myung Cho ,  Beom Seok Hah

IPC分类号： G11C11/34

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3459 ,  G11C2211/5621 ,  G11C2211/565

摘要： A method of operating a semiconductor memory device includes performing a first program loop including a first program operation and a first verification operation in order to store a lower bit data of n-bit data in memory cells coupled to a page, performing a subprogram loop for memory cells of an erase state, having threshold voltages lower than a target voltage of a negative potential, so that the threshold voltages of the memory cells of the erase state become higher than the target voltage, and performing a second program loop including a second program operation and a second verification operation in order to store an upper bit data of the n-bit data in the memory cells.

摘要翻译： 一种操作半导体存储器件的方法包括执行包括第一程序操作和第一验证操作的第一程序循环，以便将n位数据的低位数据存储在耦合到页面的存储单元中，执行子程序循环 具有低于负电位的目标电压的阈值电压的擦除状态的存储单元，使得擦除状态的存储单元的阈值电压变得高于目标电压，并且执行包括第二程序的第二程序循环 操作和第二验证操作，以便将n位数据的高位数据存储在存储单元中。

公开(公告)号：US20120269010A1

公开(公告)日：2012-10-25

申请号：US13238435

申请日：2011-09-21

申请人： Myung CHO ,  Seong-Je Park ,  Jung-Hwan Lee ,  Ji-Hwan Kim ,  Beom-Seok Hah

发明人： Myung CHO ,  Seong-Je Park ,  Jung-Hwan Lee ,  Ji-Hwan Kim ,  Beom-Seok Hah

IPC分类号： G11C7/06

CPC分类号： G11C11/5642 ,  G11C16/0483 ,  G11C2211/5646

摘要： A memory includes at least one first flag cell configured to store first flag data, at least one second flag cell configured to store second flag data, at least one first sensing node having a voltage level determined by the first flag data of the first flag cell, at least one second sensing having a voltage level determined by the second flag data of the second flag cell, a selection circuit configured to select the first sensing node or the second sensing node in response to a flag address; and a determination circuit having an internal node through which current corresponding to a voltage level of a selected sensing node flows and configured to determine a logic value of flag data corresponding to the selected sensing node among the first and second flag data by using an amount of current flowing through the internal node.

摘要翻译： 存储器包括被配置为存储第一标志数据的至少一个第一标志单元，被配置为存储第二标志数据的至少一个第二标志单元，具有由第一标志单元的第一标志数据确定的电压电平的至少一个第一感测节点 至少一个第二感测具有由第二标志单元的第二标志数据确定的电压电平，选择电路被配置为响应于标志地址选择第一感测节点或第二感测节点; 以及确定电路，其具有内部节点，通过所述内部节点流过与所选择的感测节点的电压电平相对应的电流，并且被配置为通过使用一定数量的第一和第二标志数据来确定与所选择的感测节点对应的标志数据的逻辑值 电流流过内部节点。

公开(公告)号：US20120170366A1

公开(公告)日：2012-07-05

申请号：US13337196

申请日：2011-12-26

申请人： Ji Hwan KIM ,  Seong Je PARK ,  Jung Hwan LEE ,  Myung CHO ,  Beom Seok HAH

发明人： Ji Hwan KIM ,  Seong Je PARK ,  Jung Hwan LEE ,  Myung CHO ,  Beom Seok HAH

IPC分类号： G11C16/10 ,  G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3459 ,  G11C2211/5621 ,  G11C2211/565

摘要： A method of operating a semiconductor memory device includes performing a first program loop including a first program operation and a first verification operation in order to store a lower bit data of n-bit data in memory cells coupled to a page, performing a subprogram loop for memory cells of an erase state, having threshold voltages lower than a target voltage of a negative potential, so that the threshold voltages of the memory cells of the erase state become higher than the target voltage, and performing a second program loop including a second program operation and a second verification operation in order to store an upper bit data of the n-bit data in the memory cells.

摘要翻译： 一种操作半导体存储器件的方法包括执行包括第一程序操作和第一验证操作的第一程序循环，以便将n位数据的低位数据存储在耦合到页面的存储单元中，执行子程序循环 具有低于负电位的目标电压的阈值电压的擦除状态的存储单元，使得擦除状态的存储单元的阈值电压变得高于目标电压，并且执行包括第二程序的第二程序循环 操作和第二验证操作，以便将n位数据的高位数据存储在存储单元中。

公开(公告)号：US20090146284A1

公开(公告)日：2009-06-11

申请号：US12328541

申请日：2008-12-04

申请人： Ji-hwan Kim ,  Seung-yong Choi

发明人： Ji-hwan Kim ,  Seung-yong Choi

IPC分类号： H01L23/02

CPC分类号： H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48095 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/206

摘要： Molded leadless packages having improved stacked structures are disclosed. An exemplary molded leadless package includes a die attaching pad, a plurality of leads spaced apart from the die attaching pad at a periphery region of the die attaching pad, a semiconductor chip on the die attaching pad, a plurality of bonding wires electrically connecting the leads to the semiconductor chip, and a sealing member fixedly enclosing the semiconductor chip and the bonding wires while partly exposing an outer surface of each of the leads. The sealing member fills gaps between the die attaching pad and the leads and includes at least one protrusion protruding downward from the die attaching pad and the leads.

摘要翻译： 公开了具有改进的堆叠结构的成型无引线封装。 示例性的模制无引线封装包括管芯安装焊盘，在管芯安装焊盘的外围区域与管芯安装焊盘间隔开的多个引线，管芯安装焊盘上的半导体芯片，多个电连接引线 半导体芯片，以及固定地包围半导体芯片和接合线的密封构件，同时部分地暴露每个引线的外表面。 密封构件填充管芯附接垫和引线之间的间隙，并且包括从管芯安装垫和引线向下突出的至少一个突起。

公开(公告)号：US09451395B2

公开(公告)日：2016-09-20

申请号：US14344275

申请日：2011-12-14

申请人： Jeong Ho Kwak ,  Byoung Hoon Kim ,  Jeonghoon Mo ,  Ji Hwan Kim ,  Jae Won Lim ,  Song Chong

发明人： Jeong Ho Kwak ,  Byoung Hoon Kim ,  Jeonghoon Mo ,  Ji Hwan Kim ,  Jae Won Lim ,  Song Chong

IPC分类号： H04W4/02 ,  G01S5/02 ,  H04W64/00

CPC分类号： H04W4/02 ,  G01S5/02 ,  G01S5/0205 ,  H04W64/003

摘要： The present invention relates to a method in which a first station receives position information using a second station positioned in the vicinity of the first station. The method includes the steps of: receiving a station identifier (STID) and at least one fake identifier (ID) from a base station; obtaining a fake ID of the second station; requesting position information on the second station from the base station using the fake ID of the obtained second station; and receiving the position information on the second station of the base station, wherein the fake ID is an identifier used for position measurement and is mapped to the STID.

摘要翻译： 本发明涉及使用位于第一站附近的第二站接收位置信息的方法。 该方法包括以下步骤：从基站接收站标识符（STID）和至少一个假标识符（ID）; 获得第二站的假ID; 使用所获得的第二站的假ID从基站请求位于第二站的位置信息; 以及在所述基站的所述第二站上接收所述位置信息，其中所述假ID是用于位置测量的标识符，并被映射到所述STID。

公开(公告)号：US08582367B2

公开(公告)日：2013-11-12

申请号：US13177764

申请日：2011-07-07

申请人： Myung Cho ,  Hwang Huh ,  Jung Hwan Lee ,  Ji Hwan Kim

发明人： Myung Cho ,  Hwang Huh ,  Jung Hwan Lee ,  Ji Hwan Kim

IPC分类号： G11C16/06 ,  G11C16/04 ,  G11C7/10 ,  G11C7/22 ,  G11C29/00

CPC分类号： G11C16/26 ,  G11C16/10 ,  G11C29/1201 ,  G11C29/50 ,  G11C2029/5006 ,  G11C2216/14

摘要： A semiconductor memory device includes a memory cell array comprising a plurality of cell strings and a page buffer group comprising a plurality of page buffers coupled to the respective cell string through bit lines. Each of the page buffers includes a latch unit for storing data to be programmed into memory cells included in the cell string or for storing data read from the memory cells. Each of the page buffers is coupled to a pad for the test operation of the memory cells according to data stored in the latch unit in the test operation.

摘要翻译： 半导体存储器件包括包括多个单元串的存储单元阵列和包括通过位线耦合到各个单元串的多个页缓冲器的页缓冲器组。 每个页面缓冲器包括用于存储要被编程到包括在单元串中的存储器单元中的数据或用于存储从存储器单元读取的数据的锁存单元。 根据在测试操作中存储在锁存单元中的数据，每个页缓冲器被耦合到用于存储器单元的测试操作的焊盘。

公开(公告)号：US07953304B2

公开(公告)日：2011-05-31

申请号：US12500417

申请日：2009-07-09

申请人： Hyun-Man Jang ,  Do-Woon Kim ,  Ji-Hwan Kim

发明人： Hyun-Man Jang ,  Do-Woon Kim ,  Ji-Hwan Kim

IPC分类号： G02B6/00 ,  G02B6/26

CPC分类号： H01B12/02 ,  H01B7/32 ,  H02H1/0007 ,  H02H7/001 ,  Y02E40/641 ,  Y02E40/68

摘要： Disclosed is a superconducting power cable capable of quench detection, and a quench detection system using the superconducting power cable. The superconducting power cable capable of quench detection includes a former; a superconducting conductor layer composed of a superconducting wire and surrounding the former; a conductor layer quench detection coil interposed between the former and the superconducting conductor layer and surrounding the former; an insulating layer surrounding the superconducting conductor layer; and a shielding layer surrounding the insulating layer. This superconducting power cable may detect quench generated during its operation in real time.

公开(公告)号：US20110121205A1

公开(公告)日：2011-05-26

申请号：US12946715

申请日：2010-11-15

申请人： Ji-Hwan KIM

发明人： Ji-Hwan KIM

IPC分类号： G21G5/00

CPC分类号： H01L21/268 ,  B23K26/0626 ,  B23K26/0643 ,  B23K26/0676 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/02691 ,  H01S3/005 ,  H01S3/0085

摘要： Provided are a laser irradiation apparatus, an irradiation method using the same, and a method of crystallizing an amorphous silicon film using the same. Particularly, a laser irradiation apparatus which can reduce a deviation of an intensity of a laser beam, an irradiation method using the same, and a method of crystallizing an amorphous silicon film using the same, which can improve uniformity in crystallization into a polycrystalline silicon thin film, are provided.The laser irradiation apparatus includes a laser oscillator configured to oscillate a laser beam, and an optical system disposed in front of the laser oscillator, and configured to modify the laser beam and irradiate the modified beam to a subject. The optical system includes a beam splitter configured to split the laser beam and a luminous flux adjuster configured to adjust a flux of the laser beam split by the beam splitter.

摘要翻译： 提供了一种激光照射装置，使用该激光照射装置的照射方法和使用其的使非晶硅膜结晶的方法。 特别地，可以减少激光束的强度偏差的激光照射装置，使用该激光束的照射方法以及使用该激光照射装置的非晶硅膜的结晶方法，其可以提高结晶化为多晶硅薄片的均匀性 电影。 激光照射装置包括：激光振荡器，其被配置为振荡激光束;以及光学系统，设置在激光振荡器的前面，并且被配置为修改激光束并将修改的光束照射到被摄体。 该光学系统包括分配激光束的分束器和被配置为调节由分束器分裂的激光束的通量的光束调节器。

公开(公告)号：US20070242691A1

公开(公告)日：2007-10-18

申请号：US11651203

申请日：2007-01-09

申请人： June Koo Rhee ,  Jung Yul Choi ,  Ji Hwan Kim ,  Min Ho Kang

发明人： June Koo Rhee ,  Jung Yul Choi ,  Ji Hwan Kim ,  Min Ho Kang

IPC分类号： H04J3/22

CPC分类号： H04Q11/0005 ,  H04Q11/0066 ,  H04Q2011/0016 ,  H04Q2011/0039 ,  H04Q2011/005 ,  H04Q2011/0064

摘要： An apparatus and method for transferring optical data in an optical switching system are provided. When optical data input to a node are in contention, the optical data are converted from optical signals to electrical signals and temporarily stored. When an output resource is available, the stored optical data are converted to the available output resource and transmitted to a desired destination node. This overcomes the buffering depth limit that is observed when a conventional optical fiber delay line is used. Accordingly, an optical data loss rate can be reduced such that optical data can be efficiently transferred. Further, non-contending optical data are directly delivered to output resource by the switching unit, thereby reducing the cost of optical/electrical conversion and wavelength conversion and enabling the apparatus to be implemented at low cost.

摘要翻译： 提供了一种用于在光交换系统中传送光数据的装置和方法。 当输入到节点的光数据处于竞争状态时，光数据从光信号转换为电信号并暂时存储。 当输出资源可用时，存储的光学数据被转换为可用的输出资源并被发送到期望的目的地节点。 这克服了当使用常规光纤延迟线时观察到的缓冲深度限制。 因此，可以减少光学数据丢失率，从而可以有效地传送光学数据。 此外，非竞争光学数据由切换单元直接传送到输出资源，从而降低了光/电转换和波长转换的成本，并使得该装置能够以低成本实现。