摘要:
Lens alignment apparatuses, methods and optical devices are disclosed. In accordance with various embodiments, a lens alignment apparatus may include at least one lens element positioned in a lens body. A lens alignment interface coupled to the lens element may be configured to permit the lens element to be angularly deflected relative to an axis of symmetry of the lens body. In other embodiments, a method of improving the resolution of an optical device may include translating a lens along an optical axis to maximize resolution at a first location, and determining a resolution in a second location in the imaging plane. The resolution in the second location may be improved by angularly deflecting the lens, and the position of the lens may then be fixed.
摘要:
A wafer-level camera sensor package includes a semiconductor substrate with an optical sensor on a front surface. Through-silicon-vias (TSV) extend through the substrate and provide I/O contact with the sensor from the back side of the substrate. A glass cover is positioned over the front surface, and the cover and substrate are embedded in a molding compound layer (MCL), the front surface of the MCL lying coplanar with the front of the cover, and the back surface lying coplanar with the back of the substrate. Surface-mount devices, electromagnetic shielding, and through-wafer-connectors can be embedded in the MCL. A redistribution layer on the back surface of the MCL includes bottom contact pads for mounting the package, and conductive traces interconnecting the contact pads, TSVs, surface-mount devices, shielding, and through-wafer-connectors. Anisotropic conductive adhesive is positioned on the front of the MCL for physically and electrically attaching a lens array.
摘要:
A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test.
摘要:
An optical sensor package has a transparent substrate with a redistribution layer formed on a face thereof, which includes a window and a plurality of electrically conductive traces. A semiconductor substrate, including an optical sensor and a plurality of contact terminals on a face thereof, is positioned on the transparent substrate in a face-to-face arrangement, with the optical sensor directly opposite the window, and with each of the contact terminals electrically coupled to a respective one of the electrically conductive terminals. The transparent substrate has larger overall dimensions than the semiconductor substrate, so that one or more edges of the transparent substrate extend beyond the corresponding edges of the semiconductor substrate. A plurality of solder balls are positioned on the face of the transparent substrate, each in electrical contact with a respective one of the electrically conductive terminals. The solder balls and the semiconductor substrate are at least partially encapsulated in an encapsulating layer formed on the face of the transparent substrate, which has been planarized to expose upper portions of the solder balls, as contact pads of the optical sensor package.
摘要:
A semiconductor package includes a substrate board and a semiconductor die attached to a top surface of that substrate board. A heat spreader is provided over the semiconductor die. A stiffening ring is positioned surrounding the semiconductor die, the stiffening ring being attached to the top surface of the substrate board and attached to a bottom surface of the plate portion of the heat spreader. Space is left on the board outside of the stiffening ring to support the installation of passive components to the substrate board. An external ring may be included, with that external ring being interconnected to the stiffening ring by a set of tie bars. Alternatively, the heat spreader includes an integrally formed peripheral sidewall portion.
摘要:
The present disclosure provides a very thin semiconductor package including a leadframe with a die-attach pad and a plurality of lead terminals, a die attached to the die-attach pad and electrically connected to the lead terminals via bonding wires, a position member disposed upon the die and/or die-attach pad, and a molding material encapsulating the leadframe, the die, and the position member together to form the semiconductor package. The method for manufacturing a very thin semiconductor package includes disposing a first position member on one side of the die-attach pad of a leadframe, attaching a die onto the opposite side of the die-attach pad, optionally disposing a second position member on top of the die, electrically connecting the die to the lead terminals of the leadframe, and encapsulating the leadframe, the die, and the position member(s) together to form the very thin semiconductor package.
摘要:
On a circuit substrate on which an adhesive is used to couple electronic or structural components to the substrate, an adhesive dam is positioned to prevent the adhesive from interfering with the operation of the circuit. A contact pad can be provided at a selected location and with a selected shape, and solder deposited on the pad, then reflowed to form the dam. The dam can be a structure soldered to a contact pad, or the dam can be supported at its ends by another structure of the device, so that, at the location where it functions to contain the adhesive, it is not attached to the substrate.
摘要:
A chip package includes a substrate, an integrated circuit proximate a top surface of the substrate, and a cap comprising encapsulant that encapsulates the integrated circuit on at least a portion of the top surface of the substrate. The chip package further includes at least one extension feature positioned on at least a portion of the top surface of the substrate. The at least one extension feature also comprises the encapsulant and extends from the cap to a perimeter of the substrate.
摘要:
A wafer-level camera sensor package includes a semiconductor substrate with an optical sensor on a front surface. Through-silicon-vias (TSV) extend through the substrate and provide I/O contact with the sensor from the back side of the substrate. A glass cover is positioned over the front surface, and the cover and substrate are embedded in a molding compound layer (MCL), the front surface of the MCL lying coplanar with the front of the cover, and the back surface lying coplanar with the back of the substrate. Surface-mount devices, electromagnetic shielding, and through-wafer-connectors can be embedded in the MCL. A redistribution layer on the back surface of the MCL includes bottom contact pads for mounting the package, and conductive traces interconnecting the contact pads, TSVs, surface-mount devices, shielding, and through-wafer-connectors. Anisotropic conductive adhesive is positioned on the front of the MCL for physically and electrically attaching a lens array.
摘要:
A process of forming optical sensors includes sealing an imaging portion of each of a plurality of optical sensors on a sensor wafer with a transparent material. The operation of sealing leaves a bonding portion of each of the optical sensors exposed. The process further includes cutting the wafer into a plurality of image sensor dies after sealing the optical sensors such that each image sensor die includes one of the optical sensors sealed with a corresponding portion of the transparent material.