Method and apparatus for controlling multi-channel bitstreams
    1.
    发明授权
    Method and apparatus for controlling multi-channel bitstreams 失效
    用于控制多通道位流的方法和装置

    公开(公告)号:US06728824B1

    公开(公告)日:2004-04-27

    申请号:US09398509

    申请日:1999-09-17

    申请人: Joey Y. Chen

    发明人: Joey Y. Chen

    IPC分类号: G06F1300

    CPC分类号: G11C8/00

    摘要: A memory controller for an incoming multi-channel bitstream including a computer memory having an address range, a plurality of memory controllers, and a selector coupling the memory controllers to the computer memory. Each memory controller is capable of providing an address within the address range of the computer memory. In use, the selector selects a memory controller based on a received data type in an incoming bitstream. The selector then provides an address received from the selected memory controller to the computer memory.

    摘要翻译: 一种用于输入多通道比特流的存储器控​​制器,包括具有地址范围的计算机存储器,多个存储器控制器和将存储器控制器耦合到计算机存储器的选择器。 每个存储器控制器能够在计算机存储器的地址范围内提供地址。 在使用中,选择器基于输入比特流中接收到的数据类型选择存储器控制器。 然后,选择器将从所选择的存储器控​​制器接收的地址提供给计算机存储器。

    Efficient memory allocation scheme for data collection
    2.
    发明授权
    Efficient memory allocation scheme for data collection 有权
    用于数据收集的高效内存分配方案

    公开(公告)号:US07165193B2

    公开(公告)日:2007-01-16

    申请号:US10972622

    申请日:2004-10-25

    IPC分类号: G06F11/34

    CPC分类号: G06F11/3485 G06F11/348

    摘要: A system and method that provides an integrated circuit which includes a small on-chip buffer to store collected data, thereby shifting the burden of storing the majority of the collected data to external system memory, which is typically comprised of commodity memory chips. Since this external system memory is already in use by other system functions, utilizing such unused regions of this external memory increases overall hardware efficiency, while achieving lower ASIC manufacturing cost.

    摘要翻译: 一种提供集成电路的系统和方法,该集成电路包括小的片上缓冲器以存储收集的数据,由此将收集的大部分数据的存储负担转移到通常由商品存储器芯片组成的外部系统存储器。 由于该外部系统存储器已经被其他系统功能使用,所以利用该外部存储器的这种未使用的区域可以提高总体硬件效率,同时实现更低的ASIC制造成本。

    Efficient memory allocation scheme for data collection
    3.
    发明授权
    Efficient memory allocation scheme for data collection 有权
    用于数据收集的高效内存分配方案

    公开(公告)号:US06836861B2

    公开(公告)日:2004-12-28

    申请号:US09785794

    申请日:2001-02-16

    IPC分类号: G06F1134

    CPC分类号: G06F11/3485 G06F11/348

    摘要: A system and method that provides an integrated circuit which includes a small on-chip buffer to store collected data, thereby shifting the burden of storing the majority of the collected data to external system memory, which is typically comprised of commodity memory chips. Since this external system memory is already in use by other system functions, utilizing such unused regions of this external memory increases overall hardware efficiency, while achieving lower ASIC manufacturing cost.

    摘要翻译: 一种提供集成电路的系统和方法,该集成电路包括小的片上缓冲器以存储收集的数据,由此将收集的大部分数据的存储负担转移到通常由商品存储器芯片组成的外部系统存储器。 由于该外部系统存储器已经被其他系统功能使用,所以利用该外部存储器的这种未使用的区域可以提高总体硬件效率,同时实现更低的ASIC制造成本。