公开(公告)号：US20170301684A1

公开(公告)日：2017-10-19

申请号：US15490154

申请日：2017-04-18

申请人： Jong-kook PARK ,  Hong-soo Kim ,  Tae-keun Cho

发明人： Jong-kook PARK ,  Hong-soo Kim ,  Tae-keun Cho

IPC分类号： H01L27/115

CPC分类号： H01L27/11556 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

摘要： A semiconductor memory device includes: a substrate including a cell region and a connection region; a first word line stack comprising a plurality of first word lines that extend to the connection region and are stacked on the cell region; a second word line stack comprising a plurality of second word lines that extend to the connection region and are stacked on the cell region, the second word line being adjacent to the first word line stack; vertical channels in the cell region of the substrate, the vertical channels being connected to the substrate and coupled with the plurality of first and second word lines; a bridge region that connects the first word lines of the first word line stack with the second word lines of the second word line stack; and a local planarized region under the bridge region.

公开(公告)号：US20150035065A1

公开(公告)日：2015-02-05

申请号：US14295333

申请日：2014-06-04

申请人： Jong-Kook PARK ,  HONGSOO KIM ,  Won-Chul JANG

发明人： Jong-Kook PARK ,  HONGSOO KIM ,  Won-Chul JANG

IPC分类号： H01L23/50 ,  H01L27/06

CPC分类号： H01L27/105 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a substrate with an active region defined by a device isolation layer. A word line extends over the active region in a first direction, and a plurality of interconnections extends over the word line in a second direction perpendicular to the first direction. A contact pad is disposed between and spaced apart from the word line and the plurality of interconnections, extending in the first direction to overlap the plurality of interconnections and the active region when viewed from a plan view. A lower contact plug electrically connects the contact pad to the active region. An upper contact plug electrically connects the contact pad to one of the plurality of interconnections.

摘要翻译： 半导体器件包括具有由器件隔离层限定的有源区的衬底。 字线在第一方向上在有源区域上延伸，并且多个互连在垂直于第一方向的第二方向上在字线上延伸。 接触垫设置在字线和多个互连之间并与之隔开的多个互连，当从平面图观察时，沿第一方向延伸以与多个互连和有源区重叠。 下接触插头将接触垫电连接到有源区域。 上接触插头将接触垫电连接到多个互连中的一个。

公开(公告)号：US20130299942A1

公开(公告)日：2013-11-14

申请号：US13596007

申请日：2012-08-27

申请人： Jong-Kook PARK ,  Yong-Tae Cho

发明人： Jong-Kook PARK ,  Yong-Tae Cho

IPC分类号： H01L21/02 ,  H01L29/92

CPC分类号： H01L28/91 ,  H01L23/5223 ,  H01L27/10805 ,  H01L27/10808 ,  H01L27/10847 ,  H01L27/1085 ,  H01L28/60 ,  H01L28/87 ,  H01L29/66181 ,  H01L29/94 ,  H01L29/945 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a capacitor includes forming a mold structure over a substrate, wherein the mold structure has a plurality of open parts and has a mold layer stacked with a support layer; forming cylinder type lower electrodes in the open parts; forming a first upper electrode over an entire surface of a structure including the cylinder type lower electrodes to fill the cylinder type lower electrodes; defining a through hole that passes through portions of the first upper electrode and the support layer; removing the mold layer through the through hole and exposing the cylinder type lower electrodes; forming a second upper electrode to fill the through hole and spaces between the cylinder type lower electrodes; and forming a third upper electrode to connect the second upper electrode and the first upper electrode with each other.

摘要翻译： 一种电容器的制造方法，其特征在于，在基板上形成模具结构体，其中，所述模具结构体具有多个开口部，并且具有层叠有支承层的模层; 在开口部分形成圆筒型下电极; 在包括所述圆筒型下电极的结构的整个表面上形成第一上电极以填充所述圆筒型下电极; 限定穿过所述第一上电极和所述支撑层的部分的通孔; 通过通孔去除模具层并暴露圆柱形下电极; 形成第二上部电极以填充所述圆筒形下部电极之间的通孔和间隔; 以及形成第三上电极，以将第二上电极和第一上电极彼此连接。

公开(公告)号：US08018451B2

公开(公告)日：2011-09-13

申请号：US11938118

申请日：2007-11-09

申请人： Jong-kook Park

发明人： Jong-kook Park

IPC分类号： G09G5/00

CPC分类号： G09G3/3677 ,  G09G2320/041

摘要： A liquid crystal display (LCD) capable of enhancing display quality includes a voltage generation unit, a clock generation unit, a gate driving unit, and a display unit. The voltage generation unit outputs a gate-on voltage and first and second gate-off voltages that are different from each other. The clock generation unit outputs a first clock signal and a second clock signal whose phase is opposite to the phase of the first clock signal. The first clock signal swings between the gate-on voltage and the first gate-off voltage. The gate driving unit is provided with the first clock signal, the second clock signal, and the second gate-off voltage and outputs a gate signal. The display unit includes a plurality of pixels that are turned on or off in response to the gate signal and that display an image.

摘要翻译： 能够提高显示质量的液晶显示器（LCD）包括电压产生单元，时钟产生单元，门驱动单元和显示单元。 电压产生单元输出彼此不同的栅极导通电压和第一和第二栅极截止电压。 时钟生成单元输出与第一时钟信号的相位相反的第一时钟信号和第二时钟信号。 第一时钟信号在栅极导通电压和第一栅极截止电压之间摆动。 栅极驱动单元设置有第一时钟信号，第二时钟信号和第二栅极截止电压，并输出栅极信号。 显示单元包括响应于门信号而导通或截止并显示图像的多个像素。

公开(公告)号：US07998825B2

公开(公告)日：2011-08-16

申请号：US12344154

申请日：2008-12-24

申请人： Han-Sang Song ,  Jong-Bum Park ,  Jong-Kook Park

发明人： Han-Sang Song ,  Jong-Bum Park ,  Jong-Kook Park

IPC分类号： H01L21/02

CPC分类号： H01L21/76804 ,  H01L27/10852 ,  H01L28/90

摘要： A method for fabricating a semiconductor device includes: forming an etch stop pattern over a conductive layer, the etch stop pattern having a first opening exposing a top surface of the conductive layer; forming an insulation layer over the etch stop pattern; selectively etching the insulation layer to form a second opening exposing the top surface of the conductive layer; and enlarging the second opening until the etch stop pattern is exposed.

摘要翻译： 一种用于制造半导体器件的方法包括：在导电层上形成蚀刻停止图案，所述蚀刻停止图案具有暴露所述导电层顶表面的第一开口; 在所述蚀刻停止图案上形成绝缘层; 选择性地蚀刻绝缘层以形成暴露导电层的顶表面的第二开口; 并扩大第二个开口，直到蚀刻停止图案被曝光。

公开(公告)号：US07768025B2

公开(公告)日：2010-08-03

申请号：US11898368

申请日：2007-09-11

申请人： Jun Ho Jang ,  Jae Wan Choi ,  Duk Kyu Bae ,  Hyun Kyong Cho ,  Jong Kook Park ,  Sun Jung Kim ,  Jeong Soo Lee

发明人： Jun Ho Jang ,  Jae Wan Choi ,  Duk Kyu Bae ,  Hyun Kyong Cho ,  Jong Kook Park ,  Sun Jung Kim ,  Jeong Soo Lee

IPC分类号： H01L33/00

CPC分类号： H01L33/405 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/04 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L33/38 ,  H01L33/40 ,  H01L33/44 ,  H01L2933/0016 ,  H01L2933/0083

摘要： An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.

公开(公告)号：US20080122829A1

公开(公告)日：2008-05-29

申请号：US11938118

申请日：2007-11-09

申请人： Jong-kook PARK

发明人： Jong-kook PARK

IPC分类号： G06F3/038

CPC分类号： G09G3/3677 ,  G09G2320/041

摘要： A liquid crystal display (LCD) capable of enhancing display quality includes a voltage generation unit, a clock generation unit, a gate driving unit, and a display unit. The voltage generation unit outputs a gate-on voltage and first and second gate-off voltages that are different from each other. The clock generation unit outputs a first clock signal and a second clock signal whose phase is opposite to the phase of the first clock signal. The first clock signal swings between the gate-on voltage and the first gate-off voltage. The gate driving unit is provided with the first clock signal, the second clock signal, and the second gate-off voltage and outputs a gate signal. The display unit includes a plurality of pixels that are turned on or off in response to the gate signal and that display an image.

摘要翻译： 能够提高显示质量的液晶显示器（LCD）包括电压产生单元，时钟产生单元，门驱动单元和显示单元。 电压产生单元输出彼此不同的栅极导通电压和第一和第二栅极截止电压。 时钟生成单元输出与第一时钟信号的相位相反的第一时钟信号和第二时钟信号。 第一时钟信号在栅极导通电压和第一栅极截止电压之间摆动。 栅极驱动单元设置有第一时钟信号，第二时钟信号和第二栅极截止电压，并输出栅极信号。 显示单元包括响应于门信号而导通或截止并显示图像的多个像素。

公开(公告)号：US20080100763A1

公开(公告)日：2008-05-01

申请号：US11923182

申请日：2007-10-24

申请人： Jong-kook Park

发明人： Jong-kook Park

IPC分类号： G02F1/136 ,  H05K1/00

CPC分类号： G02F1/13452 ,  G02F2202/22 ,  H01L2924/0002 ,  H05K1/0259 ,  H05K3/321 ,  H05K3/361 ,  H05K2201/09781 ,  H01L2924/00

摘要： A circuit board outputs a plurality of signals through first to n-th connection portions. Each of the connection portions includes a ground pad, signal output pads outputting the signals, and conductive dummy pads insulated from the ground pad and the signal output pads. The plurality of signals include gate driving signals and data driving signals.

摘要翻译： 电路板通过第一至第n连接部输出多个信号。 每个连接部分包括接地焊盘，输出信号的信号输出焊盘以及与接地焊盘和信号输出焊盘绝缘的导电虚拟焊盘。 多个信号包括门驱动信号和数据驱动信号。

公开(公告)号：US20060034951A1

公开(公告)日：2006-02-16

申请号：US10515960

申请日：2003-05-28

申请人： Tae Kwak ,  Myoung Shin ,  Ji Kim ,  Jong-Kook Park

发明人： Tae Kwak ,  Myoung Shin ,  Ji Kim ,  Jong-Kook Park

IPC分类号： A61K36/258 ,  A61K31/715

CPC分类号： A61K36/258 ,  A23L33/105 ,  A61K31/191 ,  A61K31/225 ,  A61K31/7004 ,  A61K31/7012 ,  A61K31/702 ,  A61K2300/00

摘要： Provided is a composition that contains, as an active ingredient, an extract or polysaccharides separated from the leaves and/or stems of plants belonging to Panax genus, for an anticancer drug or its adjuvant, having an effect on the activity of hemotopoiesis enhancement, cancer metastasis inhibition, bone marrow defense, etc . . . , and a process for preparation of the extract from the leaves and/or stems of plants belonging to Panax genus.

摘要翻译： 提供一种组合物，其含有作为活性成分的从属于Panax属植物的叶和/或茎分离的抗癌药或其佐剂的提取物或多糖，其对促血细胞生成的活性具有影响，癌症 转移抑制，骨髓防御等。 。 。 以及从属于Panax属植物的叶和/或茎的提取物的制备方法。

公开(公告)号：US08993396B2

公开(公告)日：2015-03-31

申请号：US13596007

申请日：2012-08-27

申请人： Jong-Kook Park ,  Yong-Tae Cho

发明人： Jong-Kook Park ,  Yong-Tae Cho

IPC分类号： H01L21/77 ,  H01L49/02 ,  H01L29/94 ,  H01L29/66 ,  H01L27/108

CPC分类号： H01L28/91 ,  H01L23/5223 ,  H01L27/10805 ,  H01L27/10808 ,  H01L27/10847 ,  H01L27/1085 ,  H01L28/60 ,  H01L28/87 ,  H01L29/66181 ,  H01L29/94 ,  H01L29/945 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a capacitor includes forming a mold structure over a substrate, wherein the mold structure has a plurality of open parts and has a mold layer stacked with a support layer; forming cylinder type lower electrodes in the open parts; forming a first upper electrode over an entire surface of a structure including the cylinder type lower electrodes to fill the cylinder type lower electrodes; defining a through hole that passes through portions of the first upper electrode and the support layer; removing the mold layer through the through hole and exposing the cylinder type lower electrodes; forming a second upper electrode to fill the through hole and spaces between the cylinder type lower electrodes; and forming a third upper electrode to connect the second upper electrode and the first upper electrode with each other.

摘要翻译： 一种电容器的制造方法，其特征在于，在基板上形成模具结构体，其中，所述模具结构体具有多个开口部，并且具有层叠有支承层的模层; 在开口部分形成圆筒型下电极; 在包括所述圆筒型下电极的结构的整个表面上形成第一上电极以填充所述圆筒型下电极; 限定穿过所述第一上电极和所述支撑层的部分的通孔; 通过通孔去除模具层并暴露圆柱形下电极; 形成第二上部电极以填充所述圆筒形下部电极之间的通孔和间隔; 以及形成第三上电极，以将第二上电极和第一上电极彼此连接。