Connection forwarding
    1.
    发明授权
    Connection forwarding 有权
    连接转发

    公开(公告)号:US08140690B2

    公开(公告)日:2012-03-20

    申请号:US12331257

    申请日:2008-12-09

    IPC分类号: G06F15/16 G06F15/173

    摘要: Two or more network traffic processors connected with the same LAN and WAN are identified as neighbors. Neighboring network traffic processors cooperate to overcome asymmetric routing, thereby ensuring that related sequences of network traffic are processed by the same network proxy. A network proxy can be included in a network traffic processor or as a standalone unit. A network traffic processor that intercepts a new connection initiation by a client assigns a network proxy to handle all messages associated with that connection. The network traffic processor conveys connection information to neighboring network traffic processors. The neighboring network traffic processors use the connection information to redirect network traffic associated with the connection to the assigned network proxy, thereby overcoming the effects of asymmetric routing. The assigned network proxy handles redirected network traffic in much the same way that it would handle network traffic received directly.

    摘要翻译: 与同一LAN和WAN连接的两个或多个网络流量处理器被识别为邻居。 相邻的网络流量处理器合作克服非对称路由,从而确保相同的网络流量的相关序列被相同的网络代理处理。 网络代理可以包含在网络流量处理器中或独立的单元中。 拦截客户端的新连接启动的网络流量处理器分配网络代理来处理与该连接相关联的所有消息。 网络流量处理器将连接信息传递给相邻网络流量处理器。 相邻网络流量处理器使用连接信息将与连接相关联的网络流量重定向到所分配的网络代理,从而克服非对称路由的影响。 分配的网络代理以与处理直接接收的网络流量大致相同的方式处理重定向的网络流量。

    METHOD FOR MANUFACTURING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE MADE THEREOF
    2.
    发明申请
    METHOD FOR MANUFACTURING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE MADE THEREOF 审中-公开
    制造双功能半导体器件的半导体器件及其半导体器件的制造方法

    公开(公告)号:US20100219481A1

    公开(公告)日:2010-09-02

    申请号:US12684803

    申请日:2010-01-08

    IPC分类号: H01L27/092 H01L21/28

    摘要: A method for manufacturing a dual work function device is disclosed. In one aspect, the process includes a first and second region in a substrate. The method includes forming a first transistor in the first region which has a first work function. Subsequently, a second transistor is formed in the second region having a different work function. The process of forming the first transistor includes providing a first gate dielectric stack having a first gate dielectric layer and a first gate dielectric capping layer on the first gate dielectric layer, performing a thermal treatment to modify the first gate dielectric stack, the modified first gate dielectric stack defining the first work function, providing a first metal gate electrode layer on the modified first gate dielectric stack, and patterning the first metal gate electrode layer and the modified first gate dielectric stack.

    摘要翻译: 公开了一种用于制造双功能功能装置的方法。 在一个方面,该方法包括在基底中的第一和第二区域。 该方法包括在具有第一功能的第一区域中形成第一晶体管。 随后,在具有不同功函数的第二区域中形成第二晶体管。 形成第一晶体管的过程包括提供在第一栅极介电层上具有第一栅极介电层和第一栅极介电覆盖层的第一栅极电介质堆叠,执行热处理以修改第一栅极电介质堆叠,修改的第一栅极 限定第一功函数的电介质叠层,在修改的第一栅极电介质堆叠上提供第一金属栅极电极层,以及对第一金属栅极电极层和修改的第一栅极电介质堆叠进行构图。

    High-K dielectric metal gate device structure
    3.
    发明申请
    High-K dielectric metal gate device structure 有权
    高K电介质金属栅极器件结构

    公开(公告)号:US20100044800A1

    公开(公告)日:2010-02-25

    申请号:US12589421

    申请日:2009-10-23

    IPC分类号: H01L27/092

    摘要: A metal gate/high-k dielectric semiconductor device provides an NMOS gate structure and a PMOS gate structure formed on a semiconductor substrate. The NMOS gate structure includes a high-k gate dielectric treated with a dopant impurity such as La and the high-k gate dielectric material of the PMOS gate structure is deficient of this dopant impurity and further includes a work function tuning layer over the high-k gate dielectric.

    摘要翻译: 金属栅极/高k电介质半导体器件提供形成在半导体衬底上的NMOS栅极结构和PMOS栅极结构。 NMOS栅极结构包括用诸如La的掺杂剂杂质处理的高k栅极电介质,并且PMOS栅极结构的高k栅极电介质材料缺乏该掺杂杂质,并且还包括高功率调制层, k栅极电介质。

    High-k dielectric metal gate device structure and method for forming the same
    4.
    发明授权
    High-k dielectric metal gate device structure and method for forming the same 有权
    高k电介质金属栅极器件结构及其形成方法

    公开(公告)号:US07625791B2

    公开(公告)日:2009-12-01

    申请号:US11926830

    申请日:2007-10-29

    IPC分类号: H01L21/8238

    摘要: A metal gate/high-k dielectric semiconductor device provides an NMOS gate structure and a PMOS gate structure formed on a semiconductor substrate. The NMOS gate structure includes a high-k gate dielectric treated with a dopant impurity such as La and the high-k gate dielectric material of the PMOS gate structure is deficient of this dopant impurity and further includes a work function tuning layer over the high-k gate dielectric. A process for simultaneously forming the NMOS and PMOS gate structures includes forming the high-k gate dielectric material, and the work function tuning layer thereover, then selectively removing the work function tuning layer from the NMOS region and carrying out a plasma treatment to selectively dope the high-k gate dielectric material in the NMOS region with a dopant impurity while the high-k gate dielectric in the PMOS region is substantially free of the dopant impurity.

    摘要翻译: 金属栅极/高k电介质半导体器件提供形成在半导体衬底上的NMOS栅极结构和PMOS栅极结构。 NMOS栅极结构包括用诸如La的掺杂剂杂质处理的高k栅极电介质,并且PMOS栅极结构的高k栅极电介质材料缺乏该掺杂杂质,并且还包括高功率调制层, k栅极电介质。 用于同时形成NMOS和PMOS栅极结构的工艺包括在其上形成高k栅极介电材料和功函数调谐层,然后从NMOS区选择性地去除功函数调谐层,并进行等离子体处理以选择性地掺杂 具有掺杂剂杂质的NMOS区域中的高k栅极电介质材料,而PMOS区域中的高k栅极电介质基本上不含掺杂剂杂质。

    Novel method to implement stress free polishing
    5.
    发明申请
    Novel method to implement stress free polishing 有权
    实现无压力抛光的新方法

    公开(公告)号:US20060276030A1

    公开(公告)日:2006-12-07

    申请号:US11142215

    申请日:2005-06-01

    IPC分类号: H01L21/4763

    摘要: A method of forming a metal feature in a low-k dielectric layer is provided. The method includes forming an opening in a low-k dielectric layer, forming a metal layer having a substantially planar surface over the low-k dielectric layer using spin-on method, and stress free polishing the metal layer. Preferably, the metal layer comprises copper or copper alloys. The metal layer preferably includes a first sub layer having a substantially non-planar surface and a second sub layer having a substantially planar surface on the first sub layer.

    摘要翻译: 提供了一种在低k电介质层中形成金属特征的方法。 该方法包括在低k电介质层中形成开口,使用旋转方法在​​低k电介质层上形成具有基本平坦表面的金属层,并且对金属层进行无应力的研磨。 优选地,金属层包括铜或铜合金。 金属层优选地包括具有基本非平面表面的第一子层和在第一子层上具有基本平坦表面的第二子层。

    FIB exposure of alignment marks in MIM technology
    6.
    发明申请
    FIB exposure of alignment marks in MIM technology 审中-公开
    MIM技术中FIB曝光对准标记

    公开(公告)号:US20050186753A1

    公开(公告)日:2005-08-25

    申请号:US10786187

    申请日:2004-02-25

    摘要: A new and improved method for exposing alignment marks on a substrate by locally cutting through a metal or non-metal layer or layers sequentially deposited on the substrate above the alignment marks, using focused ion beam (FIB) technology. In a preferred embodiment, a method for exposing alignment marks on a substrate can be carried out by first providing a substrate that has multiple alignment marks provided thereon and at least one overlying opaque layer, typically but not necessarily metal, deposited on the substrate above the alignment marks. A focused ion beam is then directed against the overlying opaque layer or layers to cut through the layer or layers and expose the alignment marks on the substrate. A noble gas, preferably argon, is typically used as the ion source for the focused ion beam.

    摘要翻译: 一种新的和改进的方法,通过使用聚焦离子束(FIB)技术,通过局部切割穿过对准标记上方的基板上的金属或非金属层或层而在基板上曝光对准标记。 在优选实施例中,用于在衬底上曝光对准标记的方法可以通过首先提供其上设置有多个对准标记的衬底和沉积在衬底上方的至少一个上覆的不透明层(通常但不一定是金属) 对齐标记 然后将聚焦离子束定向到上覆的不透明层或层以切穿该层或者暴露衬底上的对准标记。 惰性气体,优选氩气通常用作聚焦离子束的离子源。

    Connection forwarding
    7.
    发明授权
    Connection forwarding 有权
    连接转发

    公开(公告)号:US08386637B2

    公开(公告)日:2013-02-26

    申请号:US13410032

    申请日:2012-03-01

    IPC分类号: G06F15/173

    摘要: Two or more network traffic processors connected with the same LAN and WAN are identified as neighbors. Neighboring network traffic processors cooperate to overcome asymmetric routing, thereby ensuring that related sequences of network traffic are processed by the same network proxy. A network proxy can be included in a network traffic processor or as a standalone unit. A network traffic processor that intercepts a new connection initiation by a client assigns a network proxy to handle all messages associated with that connection. The network traffic processor conveys connection information to neighboring network traffic processors. The neighboring network traffic processors use the connection information to redirect network traffic associated with the connection to the assigned network proxy, thereby overcoming the effects of asymmetric routing. The assigned network proxy handles redirected network traffic in much the same way that it would handle network traffic received directly.

    摘要翻译: 与同一LAN和WAN连接的两个或多个网络流量处理器被识别为邻居。 相邻的网络流量处理器合作克服非对称路由,从而确保相同的网络流量的相关序列被相同的网络代理处理。 网络代理可以包含在网络流量处理器中或独立的单元中。 拦截客户端的新连接启动的网络流量处理器分配网络代理来处理与该连接相关联的所有消息。 网络流量处理器将连接信息传递给相邻网络流量处理器。 相邻网络流量处理器使用连接信息将与连接相关联的网络流量重定向到所分配的网络代理,从而克服非对称路由的影响。 分配的网络代理以与处理直接接收的网络流量大致相同的方式处理重定向的网络流量。

    HIGH-K DIELECTRIC METAL GATE DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
    9.
    发明申请
    HIGH-K DIELECTRIC METAL GATE DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME 有权
    高K介电金属栅组件结构及其形成方法

    公开(公告)号:US20090108365A1

    公开(公告)日:2009-04-30

    申请号:US11926830

    申请日:2007-10-29

    IPC分类号: H01L27/092 H01L21/3205

    摘要: A metal gate/high-k dielectric semiconductor device provides an NMOS gate structure and a PMOS gate structure formed on a semiconductor substrate. The NMOS gate structure includes a high-k gate dielectric treated with a dopant impurity such as La and the high-k gate dielectric material of the PMOS gate structure is deficient of this dopant impurity and further includes a work function tuning layer over the high-k gate dielectric. A process for simultaneously forming the NMOS and PMOS gate structures includes forming the high-k gate dielectric material, and the work function tuning layer thereover, then selectively removing the work function tuning layer from the NMOS region and carrying out a plasma treatment to selectively dope the high-k gate dielectric material in the NMOS region with a dopant impurity while the high-k gate dielectric in the PMOS region is substantially free of the dopant impurity.

    摘要翻译: 金属栅极/高k电介质半导体器件提供形成在半导体衬底上的NMOS栅极结构和PMOS栅极结构。 NMOS栅极结构包括用诸如La的掺杂剂杂质处理的高k栅极电介质,并且PMOS栅极结构的高k栅极电介质材料缺乏该掺杂杂质,并且还包括高功率调制层, k栅极电介质。 用于同时形成NMOS和PMOS栅极结构的工艺包括在其上形成高k栅极介电材料和功函数调谐层,然后从NMOS区选择性地去除功函数调谐层,并进行等离子体处理以选择性地掺杂 具有掺杂剂杂质的NMOS区域中的高k栅极电介质材料,而PMOS区域中的高k栅极电介质基本上不含掺杂剂杂质。

    Method for forming dual damascenes with supercritical fluid treatments
    10.
    发明授权
    Method for forming dual damascenes with supercritical fluid treatments 有权
    用超临界流体处理形成双重大马士革的方法

    公开(公告)号:US07332449B2

    公开(公告)日:2008-02-19

    申请号:US11240965

    申请日:2005-09-30

    摘要: A method for forming a damascene structure by providing a single process solution for resist ashing while avoiding and repairing plasma etching damage as well as removing absorbed moisture in the dielectric layer, the method including providing a substrate comprising an uppermost photoresist layer and an opening extending through a thickness of an inter-metal dielectric (IMD) layer to expose an underlying metal region; and, carrying out at least one supercritical fluid treatment comprising supercritical CO2, a first co-solvent, and an additive selected from the group consisting of a metal corrosion inhibitor and a metal anti-oxidation agent to remove the uppermost photoresist layer, as well as including an optional dielectric insulating layer bond forming agent.

    摘要翻译: 一种通过提供用于抗蚀剂灰化的单一工艺溶液来形成镶嵌结构的方法,同时避免和修复等离子体蚀刻损伤以及去除介电层中的吸收的水分,所述方法包括提供包括最上面的光致抗蚀剂层和延伸穿过的开口 金属间电介质(IMD)层的厚度以暴露下面的金属区域; 并且进行至少一种超临界流体处理,其包括超临界CO 2,第一共溶剂和选自金属缓蚀剂和金属抗氧化剂的添加剂以除去最上面的光致抗蚀剂层,以及 包括可选的介电绝缘层结合剂。