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    Chemical mechanical polishing in forming semiconductor device
    1.
    发明授权
    Chemical mechanical polishing in forming semiconductor device 有权

    公开(公告)号：US07037802B2

    公开(公告)日：2006-05-02

    申请号：US10939716

    申请日：2004-09-13

    申请人： Ming-Sheng Yang ,  Juan-Yuan Wu ,  Water Lur

    发明人： Ming-Sheng Yang ,  Juan-Yuan Wu ,  Water Lur

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76229

    摘要： A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relatively large active regions and a number of relative small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is formed. A number of shallow trenches are formed between the active regions one or more of which may constitute an alignment mark. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial reverse active mask exposes a portion of the oxide layer over the large active area and over the alignment mark. The oxide layer of each large active region and the alignment mark is removed. The partial reverse active mask is removed. The oxide layer is planarized.

    Chemical mechanical polishing for forming a shallow trench isolation structure
    2.
    发明授权
    Chemical mechanical polishing for forming a shallow trench isolation structure 有权
    用于形成浅沟槽隔离结构的化学机械抛光

    公开(公告)号：US07018906B2

    公开(公告)日：2006-03-28

    申请号：US10984045

    申请日：2004-11-09

    申请人： Coming Chen ,  Juan-Yuan Wu ,  Water Lur

    发明人： Coming Chen ,  Juan-Yuan Wu ,  Water Lur

    IPC分类号： H01L21/76 ,  H01L21/20

    CPC分类号： H01L21/31144 ,  H01L21/31053 ,  H01L21/31056 ,  H01L21/76229 ,  Y10S438/942

    摘要： A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relatively large active regions and a number of relatively small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is first formed. A number of shallow trenches are formed between the active regions. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial reverse active mask has an opening at a central part of each relatively large active region. The opening exposes a portion of the oxide layer. The opening has at least a dummy pattern. The oxide layer on the central part of each large active region is removed to expose the silicon nitride layer. The partial reverse active mask is removed. The oxide layer is planarized to expose the silicon nitride layer.

    摘要翻译： 公开了用于形成浅沟槽隔离的化学机械抛光的方法。 提供具有多个有源区的基板，包括多个相对较大的有源区和多个相对小的有源区。 该方法包括以下步骤。 首先形成衬底上的氮化硅层。 在活性区域之间形成多个浅沟槽。 在衬底上形成氧化物层，使得浅沟槽被氧化物层填充。 在氧化物层上形成部分反向有源掩模。 部分反向有源掩模在每个相对大的有效区域的中心部分具有开口。 开口暴露氧化物层的一部分。 开口至少有一个虚拟图案。 去除每个大的有源区的中心部分的氧化物层，以露出氮化硅层。 去除部分反向主动掩模。 将氧化物层平坦化以暴露氮化硅层。

    Method for forming dielectric layers
    3.
    发明授权
    Method for forming dielectric layers 有权
    电介质层形成方法

    公开(公告)号：US06809022B2

    公开(公告)日：2004-10-26

    申请号：US10397794

    申请日：2003-03-25

    申请人： Chih-Chien Liu ,  Juan-Yuan Wu ,  Water Lur

    发明人： Chih-Chien Liu ,  Juan-Yuan Wu ,  Water Lur

    IPC分类号： H01L214763

    CPC分类号： H01L21/02112 ,  C23C16/50 ,  H01L21/02107 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31612

    摘要： A method for forming dielectric layers is described. Wiring lines are formed on a provided semiconductor substrate. Spacers are formed on the sidewalls of the wiring lines. A liner layer is formed on the wiring lines and on the spacers by a first HDPCVD step, such as unbiased, unclamped HDPCVD. A dielectric layer is formed on the liner layer to cover the wiring lines and to fill gaps between the wiring lines by a second HDPCVD step.

    摘要翻译： 描述形成电介质层的方法。 配线在所提供的半导体衬底上形成。 间隔件形成在布线的侧壁上。 通过第一HDPCVD步骤，例如无偏压，未夹紧的HDPCVD，在布线和间隔物上形成衬垫层。 在衬垫层上形成介电层以覆盖布线，并通过第二HDPCVD步骤填充布线之间的间隙。

    Method for monitoring a semiconductor wafer in a chemical mechanical polishing process
    4.
    发明授权
    Method for monitoring a semiconductor wafer in a chemical mechanical polishing process 有权
    在化学机械抛光工艺中监测半导体晶片的方法

    公开(公告)号：US06580508B1

    公开(公告)日：2003-06-17

    申请号：US09449533

    申请日：1999-11-29

    申请人： Hsueh-Chung Chen ,  Chien-Hung Chen ,  Juan-Yuan Wu

    发明人： Hsueh-Chung Chen ,  Chien-Hung Chen ,  Juan-Yuan Wu

    IPC分类号： G01N2155

    CPC分类号： B24B37/013 ,  B24B49/04 ,  B24B49/12

    摘要： The present invention provides a monitoring method for monitoring a semiconductor wafer, in a chemical mechanical polishing (CMP) process. The CMP process is used to polish a dielectric layer of the semiconductor. The monitoring method comprises: 1. exposing the dielectric layer of the semiconductor wafer to an input light beam of fixed wavelength at a predetermined angle to generate a reflected light beam within a predetermined time period after performing the CMP process, the intensity of the reflected light beam undergoing periodic changes in response to the gradual thinning of the dielectric layer during the CMP process, 2. monitoring the intensity of the reflected light beam at a starting period within the predetermined time period and obtaining a periodic change rule according to the periodic changes of the intensity of the reflected light beam, and 3. monitoring the intensity of the reflected light beam throughout the rest of the predetermined time period and generating an output signal to stop the CMP process if the change of the intensity of the reflected light beam is not in accordance with the periodic change rule.

    摘要翻译： 本发明提供了一种用于在化学机械抛光（CMP）工艺中监测半导体晶片的监控方法。 CMP工艺用于抛光半导体的电介质层。 监视方法包括：1.将半导体晶片的电介质层以预定角度曝光到固定波长的输入光束，以在执行CMP处理之后的预定时间段内产生反射光束，反射光的强度 在CMP工艺期间响应于电介质层逐渐变薄的光束经历周期性变化，2.在预定时间段内在起始时段监测反射光束的强度，并根据周期性变化规律获得周期性变化规律 反射光束的强度，以及3.在预定时间段的其余时间内监测反射光束的强度，并且如果反射光束的强度的变化不是，则产生输出信号以停止CMP处理 按照定期变更规则。

    Method for forming dielectric layers
    5.
    发明授权
    Method for forming dielectric layers 有权
    电介质层形成方法

    公开(公告)号：US06562731B2

    公开(公告)日：2003-05-13

    申请号：US09752470

    申请日：2001-01-02

    申请人： Chih-Chien Liu ,  Juan-Yuan Wu ,  Water Lur

    发明人： Chih-Chien Liu ,  Juan-Yuan Wu ,  Water Lur

    IPC分类号： H01L2131

    CPC分类号： H01L21/02112 ,  C23C16/50 ,  H01L21/02107 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31612

    摘要： A method for forming dielectric layers is described. Wiring lines are formed on a provided semiconductor substrate. Spacers are formed on the sidewalls of the wiring lines. A liner layer is formed on the wiring lines and on the spacers by a first HDPCVD step, such as unbiased, unclamped HDPCVD. A dielectric layer is formed on the liner layer to cover the wiring lines and to fill gaps between the wiring lines by a second HDPCVD step.

    摘要翻译： 描述形成电介质层的方法。 配线在所提供的半导体衬底上形成。 间隔件形成在布线的侧壁上。 通过第一HDPCVD步骤，例如无偏压，未夹紧的HDPCVD，在布线和间隔物上形成衬垫层。 在衬垫层上形成介电层以覆盖布线，并通过第二HDPCVD步骤填充布线之间的间隙。

    Method of trench polishing
    6.
    发明授权
    Method of trench polishing 有权
    沟槽抛光方法

    公开(公告)号：US06291111B1

    公开(公告)日：2001-09-18

    申请号：US09165148

    申请日：1998-10-01

    申请人： Coming Chen ,  Juan-Yuan Wu ,  Jenn Tsao ,  Water Lur

    发明人： Coming Chen ,  Juan-Yuan Wu ,  Jenn Tsao ,  Water Lur

    IPC分类号： G03F700

    CPC分类号： H01L21/76229 ,  H01L21/31053

    摘要： A method of trench polishing. A semiconductor substrate is provided. A photo-mask with a pattern is provided. The method of fabricating the photo-mask further comprising providing an original pattern which comprises a plurality of active regions with individual size. The original pattern is enlarged outwards to connect and merge some of the active regions. The active regions is diminished inwards until some small active regions eliminate, the diminished line width being denoted as B. A reverse treatment is performed to obtain a reverse pattern. The reverse pattern is enlarged with a line width C. The reverse pattern is combined with the original pattern. The substrate is patterned with the photo-mask with the combined pattern. An insulation layer is formed on the substrate. The insulation layer is polished.

    摘要翻译： 沟槽抛光方法。 提供半导体衬底。 提供带有图案的照相面具。 制造光掩模的方法还包括提供包括多个具有各自尺寸的活性区域的原始图案。 原始图案向外扩大以连接和合并一些活动区域。 活性区域向内减小，直到一些小的活性区域消除，线宽度减小为B。进行反向处理以获得反向图案。 反向图案以线宽C放大。反向图案与原始图案组合。 用组合图案的光掩模对衬底进行图案化。 在基板上形成绝缘层。 绝缘层被抛光。

    Equipment for forming a glue layer of an opening
    8.
    发明授权
    Equipment for forming a glue layer of an opening 有权
    用于形成开口胶层的设备

    公开(公告)号：US06228209B1

    公开(公告)日：2001-05-08

    申请号：US09174993

    申请日：1998-10-19

    申请人： Coming Chen ,  Juan-Yuan Wu ,  Water Lur

    发明人： Coming Chen ,  Juan-Yuan Wu ,  Water Lur

    IPC分类号： C23F102

    CPC分类号： H01L21/76865 ,  C23C14/568 ,  H01L21/76844

    摘要： A fabrication equipment to form an opening plug is provided. The equipment at least includes a load/unload chamber, a degas chamber, an usual sputtering chamber, a radio frequency (RF) sputtering chamber, a physical vapor deposition (PVD) chamber, and a chemical vapor deposition (CVD). The load/unload chamber is used to load a substrate. The degas chamber is used to remove moisture on the substrate. The usual sputtering chamber is used to form an opening on the substrate. The PVD chamber is used to form a first glue layer. The RF sputtering chamber is used to remove an overhang structure on the first glue layer. The CVD chamber is used to form a second glue layer over the first glue layer.

    摘要翻译： 提供一种形成开口塞的制造设备。 该设备至少包括装载/卸载室，脱气室，通常的溅射室，射频（RF）溅射室，物理气相沉积（PVD）室和化学气相沉积（CVD））。 加载/卸载室用于装载基板。 脱气室用于去除基材上的水分。 通常的溅射室用于在基板上形成开口。 PVD室用于形成第一胶层。 RF溅射室用于去除第一胶层上的悬垂结构。 CVD室用于在第一胶层上形成第二胶层。