公开(公告)号：US08853559B2

公开(公告)日：2014-10-07

申请号：US13388450

申请日：2010-02-24

申请人： Hironori Matsumoto ,  Jumpei Kusukawa

发明人： Hironori Matsumoto ,  Jumpei Kusukawa

IPC分类号： H05K1/11 ,  H01L23/62 ,  H01L25/18 ,  H05K1/02 ,  H01L23/64 ,  H01L23/14 ,  H01L25/07 ,  H05K1/05 ,  H05K1/03 ,  H05K7/00 ,  H05K1/18 ,  H01L23/498

CPC分类号： H05K1/056 ,  H01L23/142 ,  H01L23/49844 ,  H01L23/62 ,  H01L23/647 ,  H01L25/072 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H05K1/0204 ,  H05K1/0256 ,  H05K1/0257 ,  H05K1/0262 ,  H05K1/053 ,  H05K2201/0154 ,  H05K2201/0162 ,  H05K2201/0209 ,  H05K2201/0761 ,  H05K2201/09781 ,  H05K2201/10022 ,  H01L2924/00

摘要： The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged. According to the invention, the electric field concentration at the end sections of the wiring pattern to which a high voltage is applied is reduced and partial-discharge-resistant characteristics are improved.

摘要翻译： 本发明涉及一种用于诸如功率半导体器件，逆变器模块等的电力转换器等的电力设备中使用的高压绝缘电路板，​​并且提供了一种绝缘电路板，​​其中电场 在布线图案的端部处的浓度降低，部分放电被抑制，可靠性高。 根据本发明，提供了一种绝缘电路板，​​其具有：金属基底; 以及通过绝缘层形成在金属基底基板的至少一个表面上的布线图案，其特征在于，在布线图案之间存在电位差的两个相邻布线图案之间，至少一个或多个布线图案 或与绝缘层接触并且在相邻布线图案之间的电位差范围内具有电位的导体。 根据本发明，施加高电压的布线图案的端部处的电场浓度降低，并且提高耐局部放电特性。

公开(公告)号：US20120127684A1

公开(公告)日：2012-05-24

申请号：US13388450

申请日：2010-02-24

申请人： Hironori Matsumoto ,  Jumpei Kusukawa

发明人： Hironori Matsumoto ,  Jumpei Kusukawa

IPC分类号： H05K7/04 ,  H05K1/05

CPC分类号： H05K1/056 ,  H01L23/142 ,  H01L23/49844 ,  H01L23/62 ,  H01L23/647 ,  H01L25/072 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H05K1/0204 ,  H05K1/0256 ,  H05K1/0257 ,  H05K1/0262 ,  H05K1/053 ,  H05K2201/0154 ,  H05K2201/0162 ,  H05K2201/0209 ,  H05K2201/0761 ,  H05K2201/09781 ,  H05K2201/10022 ,  H01L2924/00

摘要： The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged. According to the invention, the electric field concentration at the end sections of the wiring pattern to which a high voltage is applied is reduced and partial-discharge-resistant characteristics are improved.

摘要翻译： 本发明涉及一种用于诸如功率半导体器件，逆变器模块等的电力转换器等的电力设备中使用的高压绝缘电路板，​​并且提供了一种绝缘电路板，​​其中电场 在布线图案的端部处的浓度降低，部分放电被抑制，可靠性高。 根据本发明，提供了一种绝缘电路板，​​其具有：金属基底; 以及通过绝缘层形成在金属基底基板的至少一个表面上的布线图案，其特征在于，在布线图案之间存在电位差的两个相邻布线图案之间，至少一个或多个布线图案 或与绝缘层接触并且在相邻布线图案之间的电位差范围内具有电位的导体。 根据本发明，施加高电压的布线图案的端部处的电场浓度降低，并且提高耐局部放电特性。