公开(公告)号：US20110176197A1

公开(公告)日：2011-07-21

申请号：US12816807

申请日：2010-06-16

申请人： Jung-Hun NOH ,  DaeJin PARK ,  SonUk LEE

发明人： Jung-Hun NOH ,  DaeJin PARK ,  SonUk LEE

IPC分类号： G02F1/167 ,  G02F1/1333 ,  B32B38/10

CPC分类号： B32B37/0007 ,  B32B2457/20

摘要： A method of manufacturing a substrate includes; disposing a preliminary planarization layer on a first surface of a plastic substrate, bonding a second surface of the plastic substrate onto a carrier substrate, wherein the second surface of the plastic surface is substantially opposite to the first surface, curing the preliminary planarization layer to form a planarization layer, and separating the carrier substrate from the plastic substrate.

摘要翻译： 制造基板的方法包括： 在塑料基板的第一表面上设置初步平坦化层，将塑料基板的第二表面接合到载体基板上，其中塑料表面的第二表面基本上与第一表面相对，固化初步平坦化层以形成 平坦化层，并将载体衬底与塑料衬底分离。

公开(公告)号：US20100255633A1

公开(公告)日：2010-10-07

申请号：US12820024

申请日：2010-06-21

申请人： Seung-Hwan CHO ,  Bo-Sung Kim ,  Keun-Kyu Song ,  Tae-Young Choi ,  Min-Ho Yoon ,  Jung-Hun Noh

发明人： Seung-Hwan CHO ,  Bo-Sung Kim ,  Keun-Kyu Song ,  Tae-Young Choi ,  Min-Ho Yoon ,  Jung-Hun Noh

IPC分类号： H01L51/40

CPC分类号： H01L51/0541 ,  H01L51/0023 ,  H01L51/102

摘要： A manufacturing method for a thin film transistor array panel including forming a gate electrode, forming an insulating layer on the gate electrode, sequentially forming a lower conducting layer and a upper conducting layer on the insulating layer, etching the upper conducting layer to form a first source electrode and a first drain electrode, etching the lower conducting layer to form the second source electrode and the second drain electrode, over-etching the second source electrode and the second drain electrode, and forming an organic semiconductor between the second source electrode and the second drain electrode.

摘要翻译： 一种薄膜晶体管阵列板的制造方法，包括形成栅电极，在栅电极上形成绝缘层，在绝缘层上依次形成下导电层和上导电层，蚀刻上导电层以形成第一 源电极和第一漏电极，蚀刻下导电层以形成第二源电极和第二漏电极，过蚀刻第二源电极和第二漏电极，以及在第二源电极和第二漏电极之间形成有机半导体 第二漏电极。

公开(公告)号：US20090250690A1

公开(公告)日：2009-10-08

申请号：US12326650

申请日：2008-12-02

申请人： Jung-Han SHIN ,  Seung-Hwan CHO ,  Seong-Sik SHIN ,  Keun-Kyu SONG ,  Jung-Hun NOH

发明人： Jung-Han SHIN ,  Seung-Hwan CHO ,  Seong-Sik SHIN ,  Keun-Kyu SONG ,  Jung-Hun NOH

IPC分类号： H01L51/05 ,  H01L51/40

CPC分类号： H01L27/283 ,  G02F1/1368 ,  G02F2202/02 ,  H01L51/0545 ,  H01L51/105

摘要： In an organic thin film transistor (TFT) substrate, the organic TFT substrate includes gate lines, data lines, a gate electrode, a source electrode, a drain electrode, a gate insulating layer, an organic semiconductor layer, and an organic protective layer. The gate and data lines are insulated from each other and cross each other to define pixel areas. The gate electrode is connected to the gate line. The source electrode is connected to the data line. The drain electrode faces the source electrode with the gate electrode disposed therebetween. The gate insulating layer covers the gate electrode and exposes a portion of the source and drain electrodes. The organic semiconductor layer contacts the source and drain electrodes. The organic protective layer is disposed on the organic semiconductor layer to protect the organic semiconductor layer.

摘要翻译： 在有机薄膜晶体管（TFT）基板中，有机TFT基板包括栅极线，数据线，栅电极，源电极，漏电极，栅绝缘层，有机半导体层和有机保护层。 栅极和数据线彼此绝缘并且彼此交叉以限定像素区域。 栅电极连接到栅极线。 源电极连接到数据线。 漏电极面对源电极，栅电极位于其间。 栅极绝缘层覆盖栅极并暴露出源极和漏极的一部分。 有机半导体层接触源极和漏极。 有机保护层设置在有机半导体层上以保护有机半导体层。

公开(公告)号：US20090026445A1

公开(公告)日：2009-01-29

申请号：US12148908

申请日：2008-04-22

申请人： Jung-Hun Noh ,  Keun-Kyu Song ,  Seung-Hwan Cho

发明人： Jung-Hun Noh ,  Keun-Kyu Song ,  Seung-Hwan Cho

IPC分类号： H01L51/00 ,  H01L21/00 ,  G02F1/136

CPC分类号： H01L51/0541 ,  H01L27/3274 ,  H01L51/0558

摘要： A method for manufacturing an organic thin film transistor array panel includes forming a data line including a source electrode and a drain electrode apart from the data line on a substrate and forming a bank insulating layer including a first opening and a second opening on the data line and the drain electrode. An organic semiconductor is formed in the first opening, sequential deposition is performed of an insulating material layer and a metal layer on the bank insulating layer and the organic semiconductor. A first passivation layer is formed on the metal layer which is etched using the first passivation layer as an etch mask to form a gate line including a gate electrode. The insulating material layer is etched using the first passivation layer as an etch mask to form a gate insulating layer. A second passivation layer is formed on the first passivation layer and a pixel electrode is formed on the second passivation layer.

摘要翻译： 一种制造有机薄膜晶体管阵列面板的方法包括在基板上形成包括源极电极和漏电极的数据线，该数据线与数据线分开，并在数据线上形成包括第一开口和第二开口的堤绝缘层 和漏电极。 在第一开口中形成有机半导体，在堤绝缘层和有机半导体上进行绝缘材料层和金属层的顺序沉积。 在金属层上形成第一钝化层，使用第一钝化层作为蚀刻掩模进行蚀刻，以形成包括栅电极的栅极线。 使用第一钝化层作为蚀刻掩模蚀刻绝缘材料层以形成栅极绝缘层。 在第一钝化层上形成第二钝化层，在第二钝化层上形成像素电极。

公开(公告)号：US07977144B2

公开(公告)日：2011-07-12

申请号：US12772845

申请日：2010-05-03

申请人： Seung-Hwan Cho ,  Bo-Sung Kim ,  Keun-Kyu Song ,  Tae-Young Choi ,  Jung-Hun Noh

发明人： Seung-Hwan Cho ,  Bo-Sung Kim ,  Keun-Kyu Song ,  Tae-Young Choi ,  Jung-Hun Noh

IPC分类号： H01L21/00

CPC分类号： H01L51/0545 ,  H01L27/283 ,  H01L27/3244 ,  H01L51/0021

摘要： A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.

摘要翻译： 一种薄膜晶体管阵列面板的制造方法，在基板上形成栅极线和像素电极，形成覆盖栅极线的栅极绝缘层，在栅极绝缘层上形成包括源电极和漏极的数据线， 在所述栅绝缘层上形成覆盖所述数据线和所述漏电极的层间绝缘层，在所述层间绝缘层中形成第一开口，在所述第一开口中形成有机半导体，在所述有机半导体上形成钝化层， 并且在所述层间绝缘层中形成第二开口以使所述像素电极露出。

公开(公告)号：US07952091B2

公开(公告)日：2011-05-31

申请号：US12347438

申请日：2008-12-31

申请人： Seon-Pil Jang ,  Jung-Han Shin ,  Min-Ho Yoon ,  Seong-Sik Shin ,  Jung-Hun Noh

发明人： Seon-Pil Jang ,  Jung-Han Shin ,  Min-Ho Yoon ,  Seong-Sik Shin ,  Jung-Hun Noh

IPC分类号： H01L51/00

CPC分类号： H01L51/0545 ,  H01L51/107

摘要： Disclosed are an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes a gate electrode, an insulating layer, an organic semiconductor layer, a protective layer, and source and drain electrodes. The insulating layer is on the gate electrode, and the organic semiconductor layer is on the insulating layer. The protective layer is on the organic semiconductor layer, and includes an electrode pattern part to expose the organic semiconductor layer. The source and drain electrodes are in the electrode pattern part and connected to the organic semiconductor layer.

摘要翻译： 公开了一种有机薄膜晶体管及其制造方法。 有机薄膜晶体管包括栅电极，绝缘层，有机半导体层，保护层以及源极和漏极。 绝缘层位于栅电极上，有机半导体层位于绝缘层上。 保护层在有机半导体层上，并且包括用于暴露有机半导体层的电极图案部分。 源极和漏极在电极图案部分中并连接到有机半导体层。

公开(公告)号：US20090230385A1

公开(公告)日：2009-09-17

申请号：US12347438

申请日：2008-12-31

申请人： Seon-Pil Jang ,  Jung-Han Shin ,  Min-Ho Yoon ,  Seong-Sik Shin ,  Jung-Hun Noh

发明人： Seon-Pil Jang ,  Jung-Han Shin ,  Min-Ho Yoon ,  Seong-Sik Shin ,  Jung-Hun Noh

IPC分类号： H01L51/10 ,  H01L51/40 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L51/0545 ,  H01L51/107

摘要： Disclosed are an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes a gate electrode, an insulating layer, an organic semiconductor layer, a protective layer, and source and drain electrodes. The insulating layer is on the gate electrode, and the organic semiconductor layer is on the insulating layer. The protective layer is on the organic semiconductor layer, and includes an electrode pattern part to expose the organic semiconductor layer. The source and drain electrodes are in the electrode pattern part and connected to the organic semiconductor layer.

摘要翻译： 公开了一种有机薄膜晶体管及其制造方法。 有机薄膜晶体管包括栅电极，绝缘层，有机半导体层，保护层以及源极和漏极。 绝缘层位于栅电极上，有机半导体层位于绝缘层上。 保护层在有机半导体层上，并且包括用于暴露有机半导体层的电极图案部分。 源极和漏极在电极图案部分中并连接到有机半导体层。

公开(公告)号：US20080258138A1

公开(公告)日：2008-10-23

申请号：US12148909

申请日：2008-04-23

申请人： Keun-Kyu Song ,  Seung-Hwan Cho ,  Jung-Hun Noh

发明人： Keun-Kyu Song ,  Seung-Hwan Cho ,  Jung-Hun Noh

IPC分类号： H01L51/05 ,  H01L51/40 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L51/0545 ,  G02F1/1368 ,  G02F1/167 ,  G02F2202/022 ,  H01L51/0005

摘要： An organic thin film transistor array panel, for an embodiment, includes a plurality of pixel electrodes formed on a top layer to cover organic thin film transistors, with display areas defined by the areas of the pixel electrodes. Accordingly, the aperture ratio of the display device may be increased. A ratio of width to length (W/L) in a channel of an organic thin film transistor may be increased, and thereby on current (Ion) of the organic thin film transistor may be increased. The organic semiconductor may be prevented from overflowing while being formed in holes by an inkjet printing method such that deterioration of thin film transistor characteristics and pixel defects is prevented. The adhesive of the electrophoretic sheet is prevented from penetrating into the organic semiconductor when the electrophoretic display is formed by attaching the electrophoretic sheet to the organic thin film transistor array panel by a lamination method.

摘要翻译： 对于一个实施例，有机薄膜晶体管阵列面板包括形成在顶层上以覆盖有机薄膜晶体管的多个像素电极，具有由像素电极的面积限定的显示区域。 因此，可以增加显示装置的开口率。 可以增加有机薄膜晶体管的沟道中的宽度与长度（W / L）的比率，从而可以增加有机薄膜晶体管的电流（Ion）。 可以通过喷墨印刷方法在形成孔的同时防止有机半导体溢出，从而防止薄膜晶体管特性和像素缺陷的劣化。 当通过层压方法将电泳片附着到有机薄膜晶体管阵列板上形成电泳显示器时，防止电泳片的粘合剂渗透到有机半导体中。

公开(公告)号：US20080078993A1

公开(公告)日：2008-04-03

申请号：US11864581

申请日：2007-09-28

申请人： Seung-Hwan CHO ,  Bo-Sung Kim ,  Keun-Kyu Song ,  Tae-Young Choi ,  Min-Ho Yoon ,  Jung-Hun Noh

发明人： Seung-Hwan CHO ,  Bo-Sung Kim ,  Keun-Kyu Song ,  Tae-Young Choi ,  Min-Ho Yoon ,  Jung-Hun Noh

IPC分类号： H01L51/10 ,  H01L51/40

CPC分类号： H01L51/0541 ,  H01L51/0023 ,  H01L51/102

摘要： A manufacturing method for a thin film transistor array panel including forming a gate electrode, forming an insulating layer on the gate electrode, sequentially forming a lower conducting layer and a upper conducting layer on the insulating layer, etching the upper conducting layer to form a first source electrode and a first drain electrode, etching the lower conducting layer to form the second source electrode and the second drain electrode, over-etching the second source electrode and the second drain electrode, and forming an organic semiconductor between the second source electrode and the second drain electrode.

摘要翻译： 一种薄膜晶体管阵列板的制造方法，包括形成栅电极，在栅电极上形成绝缘层，在绝缘层上依次形成下导电层和上导电层，蚀刻上导电层以形成第一 源电极和第一漏电极，蚀刻下导电层以形成第二源电极和第二漏电极，过蚀刻第二源电极和第二漏电极，以及在第二源电极和第二漏电极之间形成有机半导体 第二漏电极。

公开(公告)号：US08300301B2

公开(公告)日：2012-10-30

申请号：US12816807

申请日：2010-06-16

申请人： Jung-Hun Noh ,  DaeJin Park ,  SonUk Lee

发明人： Jung-Hun Noh ,  DaeJin Park ,  SonUk Lee

IPC分类号： G02B26/00 ,  G09G3/34

CPC分类号： B32B37/0007 ,  B32B2457/20

摘要： A method of manufacturing a substrate includes; disposing a preliminary planarization layer on a first surface of a plastic substrate, bonding a second surface of the plastic substrate onto a carrier substrate, wherein the second surface of the plastic surface is substantially opposite to the first surface, curing the preliminary planarization layer to form a planarization layer, and separating the carrier substrate from the plastic substrate.

摘要翻译： 制造基板的方法包括： 在塑料基板的第一表面上设置初步平坦化层，将塑料基板的第二表面接合到载体基板上，其中塑料表面的第二表面基本上与第一表面相对，固化初步平坦化层以形成 平坦化层，并将载体衬底与塑料衬底分离。