公开(公告)号：US08352219B2

公开(公告)日：2013-01-08

申请号：US12528792

申请日：2008-02-04

申请人： Kunihiro Takahashi ,  Toshiaki Sakurai ,  Tatsuya Nakada ,  Kengo Inoue

发明人： Kunihiro Takahashi ,  Toshiaki Sakurai ,  Tatsuya Nakada ,  Kengo Inoue

IPC分类号： G06F17/50 ,  G06F7/60 ,  G06F17/10 ,  G06G7/48

CPC分类号： G06F17/5018 ,  Y02T10/82

摘要： The object is to enable the calculation of load transfer paths in case of distributed load applied to the structure with the numerical structure-analysis calculation system. The value of the parameter U** at each point is calculated according to the ratio of the complementary strain energy U at the application of load without fixing the point in the structure and the complementary strain energy U′ at the application of load with fixing one point in the structure. In the actual calculation, according to the complementary strain energy U, and the flexibility matrix CAC with respect to the loading point A and one point C in the structure, and the inverse matrix CCC−1 of the flexibility matrix with respect to point C, and the load pA at the loading point A, the value of the parameter U** (CACCCC−1CCApA·pA/(2U)) at point C is calculated. Or, from the complementary strain energy U, and the inverse matrix CCC−1, and the displacement dC at point C, the value of the parameter U**(dC·CCC−1dC/(2U)) at point C is calculated.

摘要翻译： 目的是使用数值结构分析计算系统在分布式负载施加到结构的情况下计算负载传输路径。 每个点处的参数U **的值根据在施加负载时的互补应变能U的比例而不固定结构中的点和在施加负载时的互补应变能U' 指向结构。 在实际计算中，根据互补应变能U，以及相对于装载点A和结构中的一个点C的柔性矩阵CAC以及相对于点C的柔性矩阵的逆矩阵CCC-1， 在加载点A处的负载pA，计算点C处的参数U **（CACCCC-1CCApA·pA /（2U））的值。 或者，从互补应变能U和逆矩阵CCC-1以及C点的位移dC，计算点C处的参数U **（dC·CCC-1dC /（2U））的值。

公开(公告)号：US20120252227A1

公开(公告)日：2012-10-04

申请号：US13493244

申请日：2012-06-11

申请人： Tamotsu Owada ,  Shun-ichi Fukuyama ,  Hirofumi Watatani ,  Kengo Inoue ,  Atsuo Shimizu

发明人： Tamotsu Owada ,  Shun-ichi Fukuyama ,  Hirofumi Watatani ,  Kengo Inoue ,  Atsuo Shimizu

IPC分类号： H01L21/31

CPC分类号： H01L21/02227 ,  C23C16/30 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76834

摘要： A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：制备具有覆盖铜布线的碳化硅层的下面的结构，并且通过气相沉积作为原料气体四甲基环四硅氧烷，二氧化碳气体和氧气生长碳氢化合物 所述氧气的流量为二氧化碳气体流量的3％以下。 下面结构的碳化硅层的表面可以用含有氧的弱氧化气体的等离子体处理，其分子量大于O 2的分子量，使表面更亲水。 膜剥离和层间绝缘层中的裂纹减少。

公开(公告)号：US07485570B2

公开(公告)日：2009-02-03

申请号：US11206955

申请日：2005-08-19

申请人： Tamotsu Owada ,  Shun-ichi Fukuyama ,  Hirofumi Watatani ,  Kengo Inoue ,  Atsuo Shimizu

发明人： Tamotsu Owada ,  Shun-ichi Fukuyama ,  Hirofumi Watatani ,  Kengo Inoue ,  Atsuo Shimizu

IPC分类号： H01L21/00

CPC分类号： H01L21/02227 ,  C23C16/30 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76834

摘要： A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：制备具有覆盖铜布线的碳化硅层的下面的结构，并且通过气相沉积作为原料气体四甲基环四硅氧烷，二氧化碳气体和氧气生长碳氢化合物 所述氧气的流量为二氧化碳气体流量的3％以下。 下面结构的碳化硅层的表面可以用含有氧的弱氧化气体的等离子体处理，其分子量大于O 2的分子量，使表面更亲水。 膜剥离和层间绝缘层中的裂纹减少。

公开(公告)号：US07211480B2

公开(公告)日：2007-05-01

申请号：US10882260

申请日：2004-07-02

申请人： Kengo Inoue ,  Hiroyuki Ota

发明人： Kengo Inoue ,  Hiroyuki Ota

IPC分类号： H01L21/8238

CPC分类号： H01L21/76232 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/823878 ,  H01L29/7833

摘要： A semiconductor device manufacturing method includes the steps of: (a) forming a stopper layer for chemical mechanical polishing on a surface of a semiconductor substrate; (b) forming an element isolation trench in the stopper layer and the semiconductor substrate; (c) depositing a nitride film covering an inner surface of the trench; (d) depositing a first oxide film through high density plasma CVD, the first oxide film burying at least a lower portion of the trench deposited with the nitride film; (e) washing out the first oxide film on a side wall of the trench by dilute hydrofluoric acid; (f) depositing a second oxide film by high density plasma CVD, the second oxide film burying the trench after the washing-out; and (g) removing the oxide films on the stopper layer by chemical mechanical polishing.

摘要翻译： 半导体器件制造方法包括以下步骤：（a）在半导体衬底的表面上形成用于化学机械抛光的阻挡层; （b）在所述阻挡层和半导体衬底中形成元件隔离沟槽; （c）沉积覆盖所述沟槽的内表面的氮化物膜; （d）通过高密度等离子体CVD沉积第一氧化物膜，第一氧化膜埋入沉积有氮化物膜的沟槽的至少下部; （e）通过稀氢氟酸在沟槽的侧壁上洗出第一氧化膜; （f）通过高密度等离子体CVD沉积第二氧化膜，第二氧化膜在洗出之后埋入沟槽; 和（g）通过化学机械抛光去除阻挡层上的氧化物膜。

公开(公告)号：US20060205193A1

公开(公告)日：2006-09-14

申请号：US11220591

申请日：2005-09-08

申请人： Ken Sugimoto ,  Yoshiyuki Ohkura ,  Hirofumi Watatani ,  Tamotsu Owada ,  Kengo Inoue

发明人： Ken Sugimoto ,  Yoshiyuki Ohkura ,  Hirofumi Watatani ,  Tamotsu Owada ,  Kengo Inoue

IPC分类号： H01L21/26 ,  H01L21/42

CPC分类号： H01L21/02167 ,  C23C16/0227 ,  C23C16/325 ,  H01L21/3148 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76849 ,  H01L21/76867

摘要： The method for forming an SiC-based film comprises the step of generating NH3 plasma on the surface of a substrate 20 in a chamber to make NH3 plasma processing on the substrate 20, the step of removing reaction products containing nitrogen remaining in the chamber, and the step of forming an SiC film 34 on the substrate 20 by PECVD.

摘要翻译： 形成SiC基膜的方法包括在室中的衬底20的表面上产生NH 3等离子体以在衬底上进行NH 3等离子体处理的步骤 20，除去残留在室内的含有氮的反应产物的步骤，以及通过PECVD在基板20上形成SiC膜34的步骤。

公开(公告)号：US07626234B2

公开(公告)日：2009-12-01

申请号：US11429962

申请日：2006-05-09

申请人： Kengo Inoue ,  Hiroyuki Ota

发明人： Kengo Inoue ,  Hiroyuki Ota

IPC分类号： H01L29/76

CPC分类号： H01L21/76232 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/823878 ,  H01L29/7833

摘要： A semiconductor device manufacturing method includes the steps of: (a) forming a stopper layer for chemical mechanical polishing on a surface of a semiconductor substrate; (b) forming an element isolation trench in the stopper layer and the semiconductor substrate; (c) depositing a nitride film covering an inner surface of the trench; (d) depositing a first oxide film through high density plasma CVD, the first oxide film burying at least a lower portion of the trench deposited with the nitride film; (e) washing out the first oxide film on a side wall of the trench by dilute hydrofluoric acid; (f) depositing a second oxide film by high density plasma CVD, the second oxide film burying the trench after the washing-out; and (g) removing the oxide films on the stopper layer by chemical mechanical polishing.

摘要翻译： 半导体器件制造方法包括以下步骤：（a）在半导体衬底的表面上形成用于化学机械抛光的阻挡层; （b）在所述阻挡层和半导体衬底中形成元件隔离沟槽; （c）沉积覆盖所述沟槽的内表面的氮化物膜; （d）通过高密度等离子体CVD沉积第一氧化物膜，第一氧化膜埋入沉积有氮化物膜的沟槽的至少下部; （e）通过稀氢氟酸在沟槽的侧壁上洗出第一氧化膜; （f）通过高密度等离子体CVD沉积第二氧化膜，第二氧化膜在洗出之后埋入沟槽; 和（g）通过化学机械抛光去除阻挡层上的氧化物膜。

公开(公告)号：US06949830B2

公开(公告)日：2005-09-27

申请号：US10694826

申请日：2003-10-29

申请人： Tamotsu Owada ,  Shun-ichi Fukuyama ,  Hirofumi Watatani ,  Kengo Inoue ,  Atsuo Shimizu

发明人： Tamotsu Owada ,  Shun-ichi Fukuyama ,  Hirofumi Watatani ,  Kengo Inoue ,  Atsuo Shimizu

IPC分类号： C23C16/42 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76834 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76826 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

摘要翻译： 一种半导体器件，包括具有覆盖铜布线的碳化硅层的下面的结构，并且通过使用作为源气体四甲基环四硅氧烷，二氧化碳气体和氧气的气相沉积在底层结构上生长碳氧化碳，所述氧气的流速 为二氧化碳气体流量的3％以下。 下面结构的碳化硅层的表面可以用含有氧的弱氧化气体的等离子体处理，并且分子量大于O 2 O 2的分子量以使表面更亲水。 膜剥离和层间绝缘层中的裂纹减少。

公开(公告)号：US20100100361A1

公开(公告)日：2010-04-22

申请号：US12528792

申请日：2008-02-04

申请人： Kunihiro Takasashi ,  Toshiaki Sakurai ,  Tatsuya Nakada ,  Kengo Inoue

发明人： Kunihiro Takasashi ,  Toshiaki Sakurai ,  Tatsuya Nakada ,  Kengo Inoue

IPC分类号： G06F17/50 ,  G06F17/16

CPC分类号： G06F17/5018 ,  Y02T10/82

摘要： The object is to enable the calculation of load transfer paths in case of distributed load applied to the structure with the numerical structure-analysis calculation system. The value of the parameter U** at each point is calculated according to the ratio of the complementary strain energy U at the application of load without fixing the point in the structure and the complementary strain energy U′ at the application of load with fixing one point in the structure. In the actual calculation, according to the complementary strain energy U, and the flexibility matrix CAC with respect to the loading point A and one point C in the structure, and the inverse matrix CCC−1 of the flexibility matrix with respect to point C, and the load pA at the loading point A, the value of the parameter U** (CACCCC−1CCApA·pA/(2U))at point C is calculated. Or, from the complementary strain energy U, and the inverse matrix CCC−1, and the displacement dC at point C, the value of the parameter U**(dC·CCC−1dC/(2U)) at point C is calculated.

摘要翻译： 目的是使用数值结构分析计算系统在分布式负载施加到结构的情况下计算负载传输路径。 每个点处的参数U **的值根据在施加负载时的互补应变能U的比例而不固定结构中的点和在施加负载时的互补应变能U' 指向结构。 在实际计算中，根据互补应变能U，以及相对于装载点A和结构中的一个点C的柔性矩阵CAC以及相对于点C的柔性矩阵的逆矩阵CCC-1， 在加载点A处的负载pA，计算点C处的参数U **（CACCCC-1CCApA·pA /（2U））的值。 或者，从互补应变能U和逆矩阵CCC-1以及C点的位移dC，计算点C处的参数U **（dC·CCC-1dC /（2U））的值。

公开(公告)号：US20060255426A1

公开(公告)日：2006-11-16

申请号：US11429962

申请日：2006-05-09

申请人： Kengo Inoue ,  Hiroyuki Ota

发明人： Kengo Inoue ,  Hiroyuki Ota

IPC分类号： H01L29/00

CPC分类号： H01L21/76232 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/823878 ,  H01L29/7833

摘要： A semiconductor device manufacturing method includes the steps of: (a) forming a stopper layer for chemical mechanical polishing on a surface of a semiconductor substrate; (b) forming an element isolation trench in the stopper layer and the semiconductor substrate; (c) depositing a nitride film covering an inner surface of the trench; (d) depositing a first oxide film through high density plasma CVD, the first oxide film burying at least a lower portion of the trench deposited with the nitride film; (e) washing out the first oxide film on a side wall of the trench by dilute hydrofluoric acid; (f) depositing a second oxide film by high density plasma CVD, the second oxide film burying the trench after the washing-out; and (g) removing the oxide films on the stopper layer by chemical mechanical polishing.

公开(公告)号：US07037803B2

公开(公告)日：2006-05-02

申请号：US10721870

申请日：2003-11-26

申请人： Kengo Inoue ,  Toshifumi Mori ,  Ryou Nakamura ,  Hiroyuki Ohta ,  Takashi Saiki

发明人： Kengo Inoue ,  Toshifumi Mori ,  Ryou Nakamura ,  Hiroyuki Ohta ,  Takashi Saiki

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/823871 ,  H01L21/823878

摘要： A semiconductor device manufacture method has the steps of: (a) forming a polishing stopper layer over a semiconductor substrate; (b) etching the semiconductor substrate to form a trench; (c) forming a first liner insulating layer of silicon oxide over the surface of the trench; (d) forming a second liner insulating layer of silicon nitride over the first liner insulating layer, the second liner insulating layer having a thickness of at least 20 nm or at most 8 nm; (e1) depositing a third liner insulating layer of silicon oxide over the second liner insulating layer by plasma CVD at a first bias; and (e2) depositing an isolation layer of silicon oxide by plasma CVD at a second bias higher than the first bias, the isolation layer burying a recess defined by the third liner insulating layer.

摘要翻译： 半导体器件制造方法具有以下步骤：（a）在半导体衬底上形成抛光阻挡层; （b）蚀刻半导体衬底以形成沟槽; （c）在所述沟槽的表面上形成氧化硅的第一衬垫绝缘层; （d）在所述第一衬垫绝缘层上形成氮化硅的第二衬垫绝缘层，所述第二衬垫绝缘层的厚度为至少20nm或至多8nm; （e1）在第一偏压下通过等离子体CVD沉积第二衬里绝缘层上的第三衬垫绝缘层氧化硅; 和（e2）以高于第一偏压的第二偏压通过等离子体CVD沉积氧化硅隔离层，隔离层埋设由第三衬里绝缘层限定的凹部。