ANGULAR VELOCITY SENSOR
    2.
    发明申请
    ANGULAR VELOCITY SENSOR 有权
    角速度传感器

    公开(公告)号:US20130239681A1

    公开(公告)日:2013-09-19

    申请号:US13989644

    申请日:2011-12-22

    IPC分类号: G01C19/56

    摘要: An angular velocity sensor includes a sensor element having a shape defined in an XYZ space, and can detect an angular velocity about a Z axis. The sensor element includes a support body extending in a direction of an X axis, an arm connected with the support body, and a weight connected with the arm. The arm has a first end connected with the support body and a second end connected with the weight. The arm has substantially a J-shape including a first arm portion extending in a direction of a Y axis from the first end to a first corner, a second arm portion extending in the direction of the X axis from the first corner to a second corner, and a third arm portion extending in the direction of the Y axis from the second corner to the second end. The length of the arm in the direction of the X axis is larger than the length of the weight in the direction of the X axis. This angular velocity sensor can improve the sensibility to angular velocity about the Z axis.

    摘要翻译: 角速度传感器包括具有限定在XYZ空间中的形状的传感器元件,并且可以检测围绕Z轴的角速度。 传感器元件包括沿X轴方向延伸的支撑体,与支撑体连接的臂以及与臂相连的重物。 臂具有与支撑体连接的第一端和与重物连接的第二端。 臂具有大致J字形,包括从第一端到第一角沿Y轴方向延伸的第一臂部分,从X轴方向从第一角延伸到第二拐角的第二臂部分 以及从Y轴方向从第二角延伸到第二端的第三臂部。 臂沿X轴方向的长度大于X轴方向的重量长度。 该角速度传感器可以提高围绕Z轴的角速度的敏感度。

    Silicon carbide semiconductor device including deep layer
    4.
    发明授权
    Silicon carbide semiconductor device including deep layer 有权
    碳化硅半导体器件包括深层

    公开(公告)号:US07994513B2

    公开(公告)日:2011-08-09

    申请号:US12385715

    申请日:2009-04-16

    IPC分类号: H01L21/02

    摘要: A silicon carbide semiconductor device includes a substrate, a drift layer located on a first surface of the substrate, a base region located on the drift layer, a source region located on the base region, a trench sandwiched by each of the base region to the drift layer, a channel layer located in the trench, a gate insulating layer located on the channel layer, a gate electrode located on the gate insulating layer, a source electrode electrically coupled with the source region and the base region, a drain electrode located on a second surface of the substrate, and a deep layer located under the base region and extending to a depth deeper than the trench. The deep layer is formed into a lattice pattern.

    摘要翻译: 碳化硅半导体器件包括衬底,位于衬底的第一表面上的漂移层,位于漂移层上的基极区域,位于基极区域上的源极区域,夹在基底区域之中的沟槽 漂移层,位于沟槽中的沟道层,位于沟道层上的栅极绝缘层,位于栅极绝缘层上的栅电极,与源区和基极区电耦合的源电极,位于 衬底的第二表面,以及位于基底区域下方并延伸到比沟槽深的深度的深层。 深层形成为格子图案。

    Trench gate type insulated gate bipolar transistor
    5.
    发明授权
    Trench gate type insulated gate bipolar transistor 有权
    沟槽栅型绝缘栅双极晶体管

    公开(公告)号:US07498658B2

    公开(公告)日:2009-03-03

    申请号:US11402874

    申请日:2006-04-13

    IPC分类号: H01L21/331

    CPC分类号: H01L29/7397 H01L29/0696

    摘要: A trench gate type IGBT includes: a first semiconductor layer; a second semiconductor on the first semiconductor layer; a third semiconductor on the second semiconductor layer; trenches for separating the third semiconductor layer into first regions and second regions; a gate insulation film on an inner wall of each trench; a gate electrode on the gate insulation film; a fourth semiconductor layer in a surface portion of each first region and contacting each trench; a first electrode connecting to the first region and the fourth semiconductor layer; and a second electrode connecting to the first semiconductor layer. The first regions and the second regions are alternately arranged. Two second regions are continuously connected together to be integrated into one body.

    摘要翻译: 沟槽栅型IGBT包括:第一半导体层; 在所述第一半导体层上的第二半导体; 第二半导体层上的第三半导体; 用于将第三半导体层分离成第一区域和第二区域的沟槽; 每个沟槽的内壁上的栅极绝缘膜; 栅极绝缘膜上的栅电极; 在每个第一区域的表面部分中的第四半导体层,并接触每个沟槽; 连接到第一区域和第四半导体层的第一电极; 以及连接到第一半导体层的第二电极。 第一区域和第二区域交替布置。 两个第二区域连续地连接在一起以集成到一个主体中。

    COMPUTER APPARATUS
    6.
    发明申请
    COMPUTER APPARATUS 有权
    电脑装置

    公开(公告)号:US20070284437A1

    公开(公告)日:2007-12-13

    申请号:US11741245

    申请日:2007-04-27

    申请人: Kensaku Yamamoto

    发明人: Kensaku Yamamoto

    IPC分类号: G06K5/00

    摘要: A computer apparatus includes an equipment-information holding unit which holds equipment information which contains setting information of equipment of the computer apparatus and license information for using the equipment. An image-data generating unit generates image data for printing the equipment information on a sheet in a predetermined form. An equipment-information setting unit stores the equipment information into the equipment-information holding unit based on image data read from the printed sheet on which the equipment information is printed.

    摘要翻译: 计算机装置包括:设备信息保持单元,其保存包含计算机装置的设备的设置信息和使用设备的许可信息的设备信息。 图像数据生成单元生成用于以预定形式将设备信息打印在纸张上的图像数据。 设备信息设置单元基于从其上打印有设备信息的打印纸读取的图像数据将设备信息存储到设备信息保持单元中。

    Nitride semiconductor light-emitting diode chip and method of manufacturing the same
    7.
    发明授权
    Nitride semiconductor light-emitting diode chip and method of manufacturing the same 有权
    氮化物半导体发光二极管芯片及其制造方法

    公开(公告)号:US07105859B2

    公开(公告)日:2006-09-12

    申请号:US10982020

    申请日:2004-11-05

    IPC分类号: H01L33/00 H01L29/22

    CPC分类号: H01L33/20 H01L33/0095

    摘要: A nitride semiconductor light emitting diode chip includes a transparent substrate and a nitride semiconductor stacked-layer structure formed on the upper surface of the substrate, the nitride semiconductor stacked-layer structure including a light-emitting layer and a plurality of other semiconductor layers, the substrate having an arbitrary crystallographic main surface and having a thickness of more than 120 μm, thereby providing an improved efficiency of extracting light from the chip. At least one of the division planes of the chip may be angled relative to a plane perpendicular to the main surface of the substrate and the lower surface of the substrate may have a smaller area than an upper region of the nitride semiconductor stacked-layer structure to further improve the efficiency of extracting light from the chip.

    摘要翻译: 氮化物半导体发光二极管芯片包括在衬底的上表面上形成的透明衬底和氮化物半导体叠层结构,包括发光层和多个其它半导体层的氮化物半导体层叠结构, 基板具有任意的晶体主表面并且具有大于120μm的厚度,从而提供从芯片提取光的提高的效率。 芯片的分割平面中的至少一个可以相对于垂直于衬底的主表面的平面成角度,并且衬底的下表面可以具有比氮化物半导体层叠结构的上部区域更小的面积, 进一步提高从芯片提取光的效率。

    Authentication ticket processing apparatus and method with improved performance for self-contained ticket
    8.
    发明授权
    Authentication ticket processing apparatus and method with improved performance for self-contained ticket 有权
    认证机票处理设备和方法,具有改进自主机票的性能

    公开(公告)号:US08612745B2

    公开(公告)日:2013-12-17

    申请号:US11561070

    申请日:2006-11-17

    IPC分类号: H04L29/06

    CPC分类号: H04L9/3213 H04L63/0807

    摘要: An authentication ticket processing apparatus includes a temporary data storage unit configured to keep user information upon receiving the user information from a user management database for managing user information, the temporary data storage unit allowing access thereto to be performed at higher speed than access to the user management database. The authentication ticket processing apparatus is configured such that, when there is a need to acquire user information in response to a decoding request from a server, a check is made whether user information corresponding to the decoding request is present in the temporary data storage unit, and the corresponding user information is acquired from the temporary data storage unit if the corresponding user information is present in the temporary data storage unit.

    摘要翻译: 认证券处理装置包括临时数据存储单元,其被配置为在从用户管理数据库接收用户信息时保持用户信息,用于管理用户信息,允许访问其的临时数据存储单元以比访问用户更高的速度执行 管理数据库。 认证券处理装置被配置为当需要响应于来自服务器的解码请求来获取用户信息时,检查与解码请求对应的用户信息是否存在于临时数据存储单元中, 并且如果相应的用户信息存在于临时数据存储单元中,则从临时数据存储单元获取相应的用户信息。

    SiC single crystal substrate, SiC single crystal epitaxial wafer, and SiC semiconductor device
    9.
    发明授权
    SiC single crystal substrate, SiC single crystal epitaxial wafer, and SiC semiconductor device 有权
    SiC单晶衬底,SiC单晶外延晶片和SiC半导体器件

    公开(公告)号:US08470091B2

    公开(公告)日:2013-06-25

    申请号:US12656210

    申请日:2010-01-21

    IPC分类号: H01L29/24

    摘要: A direction of a dislocation line of a threading dislocation is aligned, and an angle between the direction of the dislocation line of the threading dislocation and a [0001]-orientation c-axis is equal to or smaller than 22.5 degrees. The threading dislocation having the dislocation line along with the [0001]-orientation c-axis is perpendicular to a direction of a dislocation line of a basal plane dislocation. Accordingly, the dislocation does not provide an extended dislocation on the c-face, so that a stacking fault is not generated. Thus, when an electric device is formed in a SiC single crystal substrate having the direction of the dislocation line of the threading dislocation, which is the [0001]-orientation c-axis, a SiC semiconductor device is obtained such that device characteristics are excellent without deterioration, and a manufacturing yield ration is improved.

    摘要翻译: 螺纹位错的位错线的方向对准,穿透位错的位错线的方向与[0001]取向c轴的角度等于或小于22.5度。 具有位错线以及[0001]取向c轴的穿透位错垂直于基面位错的位错线的方向。 因此,位错不会在c面上提供扩展位错,因此不会产生堆垛错误。 因此,当在具有作为[0001]取向c轴的穿透位错的位错线的方向的SiC单晶衬底中形成电子器件时,获得SiC半导体器件,使得器件特性优异 不劣化,制造产率不断提高。