公开(公告)号：US09634152B2

公开(公告)日：2017-04-25

申请号：US13537650

申请日：2012-06-29

申请人： Ki Hong Lee ,  Seung Ho Pyi ,  Jung Yun Chang

发明人： Ki Hong Lee ,  Seung Ho Pyi ,  Jung Yun Chang

IPC分类号： H01L27/088 ,  H01L21/8239 ,  H01L29/792 ,  H01L29/66 ,  H01L27/11582

摘要： A semiconductor device includes memory blocks each configured to comprise a pair of channels, each channel including a pipe channel formed in a pipe gate of the memory block and a drain-side channel and a source-side channel coupled to the pipe channel; first slits placed between the memory blocks adjacent to other memory blocks; and a second slit placed between the source-side channel and the drain-side channel of each pair of channels.

公开(公告)号：US09620513B2

公开(公告)日：2017-04-11

申请号：US13599148

申请日：2012-08-30

申请人： Ki Hong Lee ,  Seung Ho Pyi ,  Sung Ik Moon

发明人： Ki Hong Lee ,  Seung Ho Pyi ,  Sung Ik Moon

IPC分类号： H01L27/11 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11548 ,  H01L27/11575

CPC分类号： H01L27/11582 ,  H01L21/0332 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575

摘要： A semiconductor device includes a cell structure; n first pad structures formed on one side of the cell structure and each configured to have a step form in which 2n layers form one stage; and n second pad structures formed on the other side of the cell structure each configured to have a step form in which 2n layers form one stage, wherein n is a natural number of 1 or higher, and the first pad structures and the second pad structures have asymmetrical step forms having different heights.

公开(公告)号：US09112044B2

公开(公告)日：2015-08-18

申请号：US13315147

申请日：2011-12-08

申请人： Sung Jin Whang ,  Ki Hong Lee

发明人： Sung Jin Whang ,  Ki Hong Lee

IPC分类号： H01L27/108 ,  H01L29/788 ,  H01L21/764 ,  H01L27/115 ,  H01L29/792 ,  H01L29/786

CPC分类号： H01L27/1052 ,  H01L21/764 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/78642 ,  H01L29/7889 ,  H01L29/7926

摘要： A three-dimensional (3-D) non-volatile memory device includes a plurality of word line structures extended in parallel and including a plurality of interlayer dielectric layers and a plurality of word lines that are alternately stacked over a substrate, a plurality of channels protruding from the substrate configured to penetrate the plurality of interlayer dielectric layers and the plurality of word lines, and an air gap formed between the plurality of word line structures.

摘要翻译： 三维（3-D）非易失性存储器件包括并行延伸的多个字线结构，并且包括交替堆叠在衬底上的多个层间电介质层和多个字线，多个通道 从被配置为穿透多个层间电介质层和多个字线的基板突出，以及形成在多个字线结构之间的气隙。

公开(公告)号：US09099348B2

公开(公告)日：2015-08-04

申请号：US13602038

申请日：2012-08-31

申请人： Ki Hong Lee ,  Seung Ho Pyi ,  Hyun Soo Shon

发明人： Ki Hong Lee ,  Seung Ho Pyi ,  Hyun Soo Shon

IPC分类号： H01L29/76 ,  H01L27/115

CPC分类号： H01L27/11582 ,  H01L27/11573

摘要： A semiconductor device includes: vertical channel layers; a pipe channel layer configured to connect lower ends of the vertical channel layers; and a pipe gate surrounding the pipe channel layer and including a first region, which is in contact with the pipe channel layer and includes a first-type impurity, and remaining second regions including a second-type impurity different from the first type impurity.

摘要翻译： 半导体器件包括：垂直沟道层; 管道沟道层，被配置为连接垂直沟道层的下端; 以及围绕所述管道沟道层的管道浇口，并且包括与所述管道沟道层接触并且包括第一类型杂质的第一区域，以及包括与所述第一类型杂质不同的第二类型杂质的剩余的第二区域。

公开(公告)号：US09000509B2

公开(公告)日：2015-04-07

申请号：US13403065

申请日：2012-02-23

申请人： Ki-Hong Lee ,  Kwon Hong ,  Dae-Gyu Shin

发明人： Ki-Hong Lee ,  Kwon Hong ,  Dae-Gyu Shin

IPC分类号： H01L29/792 ,  H01L29/78 ,  H01L29/772 ,  H01L21/28 ,  H01L27/115 ,  H01L29/66

CPC分类号： H01L21/28282 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： A nonvolatile memory device includes a pipe gate having a pipe channel hole; a plurality of interlayer insulation layers and a plurality of gate electrodes alternately stacked over the pipe gate; a pair of columnar cell channels passing through the interlayer insulation layers and the gate electrodes and coupling a pipe channel formed in the pile channel hole; a first blocking layer and a charge trapping and charge storage layer formed on sidewalls of the columnar cell channels; and a second blocking layer formed between the first blocking layer and the plurality of gate electrodes.

摘要翻译： 非易失性存储装置包括具有管道通道孔的管道浇口; 多个层间绝缘层和交替层叠在管栅上的多个栅电极; 一对穿过层间绝缘层和栅电极的柱状电池通道，并且耦合形成在通道孔中的管道; 第一阻挡层和形成在柱状细胞通道的侧壁上的电荷俘获和电荷存储层; 以及形成在第一阻挡层和多个栅电极之间的第二阻挡层。

公开(公告)号：US08878277B2

公开(公告)日：2014-11-04

申请号：US13598528

申请日：2012-08-29

申请人： Ki Hong Lee ,  Seung Ho Pyi ,  Seok Min Jeon

发明人： Ki Hong Lee ,  Seung Ho Pyi ,  Seok Min Jeon

IPC分类号： H01L29/76

CPC分类号： H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： A 3D non-volatile memory device includes a pipe gate, at least one first channel layer including a first pipe channel layer formed in the pipe gate and a pair of first source side channel layer and first drain side channel layer connected to the first pipe channel layer, and at least one second channel layer including a second pipe channel layer formed in the pipe gate and positioned over the first pipe channel layer and a pair of second source side channel layer and second drain side channel layer connected to the second pipe channel layer.

摘要翻译： 3D非易失性存储器件包括管道浇口，至少一个第一沟道层，其包括形成在管道栅极中的第一管道沟道层，以及一对第一源极侧沟道层和与第一管道沟道连接的第一漏极侧沟道层 层，以及至少一个第二沟道层，其包括形成在管道浇口中并位于第一管道沟道层上的第二管道沟道层和连接到第二管道沟道层的一对第二源极侧沟道层和第二漏极侧沟道层 。

公开(公告)号：US08754485B2

公开(公告)日：2014-06-17

申请号：US13477632

申请日：2012-05-22

申请人： Ki Hong Lee ,  Seung Ho Pyi ,  Sung Chul Shin

发明人： Ki Hong Lee ,  Seung Ho Pyi ,  Sung Chul Shin

IPC分类号： H01L21/70

CPC分类号： H01L27/115 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/7926

摘要： A 3-dimensional (3-D) non-volatile memory device includes a first channel protruding from a substrate, a selection gate formed on sidewalls of the first channel and in an L shape, and a gate insulating layer interposed between the first channel and the selection gate and surrounding the first channel. A method of manufacturing a 3-D non-volatile memory device includes forming first channels protruding from a substrate, forming a first gate insulating layer surrounding the first channels, and forming first selection gates having an L shape on sidewalls of the first channels on which the first gate insulating layers are formed.

摘要翻译： 三维（3-D）非易失性存储装置包括从基板突出的第一通道，形成在第一通道的侧壁上且呈L形的选择栅极，以及插入在第一通道和第二通道之间的栅极绝缘层 选择门和围绕第一通道。 一种制造3-D非易失性存储器件的方法包括形成从衬底突出的第一通道，形成围绕第一通道的第一栅极绝缘层，以及在第一通道的侧壁上形成具有L形形状的第一选择栅极， 形成第一栅极绝缘层。

公开(公告)号：US08654579B2

公开(公告)日：2014-02-18

申请号：US13298591

申请日：2011-11-17

申请人： Beom Yong Kim ,  Kwon Hong ,  Kee Jeung Lee ,  Ki Hong Lee

发明人： Beom Yong Kim ,  Kwon Hong ,  Kee Jeung Lee ,  Ki Hong Lee

IPC分类号： G11C11/40 ,  H01L29/792

CPC分类号： H01L27/11524 ,  G11C16/14 ,  G11C16/28 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582

摘要： A non-volatile memory device includes a plurality of memory cells stacked along a channel protruded from a substrate, a first select transistor connected to one end of the plurality of memory cells, a first interlayer dielectric layer for being coupled between a source line and the first select transistor, and a second interlayer dielectric layer disposed between the first select transistor and the one end of the plurality of memory cells, and configured to include a first recess region.

摘要翻译： 非易失性存储器件包括沿着从衬底突出的通道堆叠的多个存储器单元，连接到多个存储器单元的一端的第一选择晶体管，用于耦合在源极线与源极之间的第一层间电介质层 第一选择晶体管和设置在第一选择晶体管和多个存储单元的一端之间的第二层间电介质层，并且被配置为包括第一凹部区域。

公开(公告)号：US08637919B2

公开(公告)日：2014-01-28

申请号：US13310329

申请日：2011-12-02

申请人： Ki-Hong Lee ,  Kwon Hong ,  Beom-yong Kim

发明人： Ki-Hong Lee ,  Kwon Hong ,  Beom-yong Kim

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/11578 ,  H01L27/11575 ,  H01L27/11582

摘要： A nonvolatile memory device includes a channel protruding in a vertical direction from a substrate, a plurality of interlayer dielectric layers and gate electrode layers which are alternately stacked over the substrate along the channel, and a memory layer formed between the channel and a stacked structure of the interlayer dielectric layers and gate electrode layers. Two or more gate electrode layers of the plurality of gate electrode layers are coupled to an interconnection line to form a selection transistor.

摘要翻译： 非易失性存储器件包括沿着垂直方向从衬底突出的沟道，多个层间电介质层和栅极电极层，沿着沟道交替堆叠在衬底上;以及存储层，形成在沟道和层叠结构之间 层间电介质层和栅电极层。 多个栅电极层中的两个或多个栅电极层耦合到互连线以形成选择晶体管。

公开(公告)号：US08456909B2

公开(公告)日：2013-06-04

申请号：US13308972

申请日：2011-12-01

申请人： Ki-Hong Lee ,  Kwon Hong ,  Min-Soo Kim

发明人： Ki-Hong Lee ,  Kwon Hong ,  Min-Soo Kim

IPC分类号： G11C16/04

CPC分类号： H01L27/11565 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/7926

摘要： Provided are a nonvolatile memory device and a method for fabricating the same, which can secure the structural stability of a three-dimensional nonvolatile memory device. The nonvolatile memory device includes one or more columnar channel plugs, a plurality of word lines and a plurality of dielectric layers stacked alternately to surround the columnar channel plug, a memory layer disposed between the word line and the columnar channel plug, a plurality of word line connection portions, each of the word line connection portions connecting ends of word lines of a common layer from among the plurality of word lines, and a plurality of word line extension portions extending from the word line connection portions.

摘要翻译： 提供一种非易失性存储器件及其制造方法，其可以确保三维非易失性存储器件的结构稳定性。 非易失性存储装置包括一个或多个柱状通道插头，多个字线和多个电介质层，交替堆叠以包围柱状通道插头，设置在字线和柱状通道插头之间的存储层，多个字 每个字线连接部分从多个字线中连接公共层的字线的端部，以及从字线连接部分延伸的多个字线延伸部分。