公开(公告)号：US09231417B2

公开(公告)日：2016-01-05

申请号：US14342699

申请日：2012-06-12

申请人： Kazunori Watanabe ,  Koji Asakawa

发明人： Kazunori Watanabe ,  Koji Asakawa

IPC分类号： H02J7/16 ,  H02J7/00 ,  H02J7/04 ,  H01M10/44

CPC分类号： H02J7/0029 ,  H01M10/448 ,  H01M2220/30 ,  H02J7/007 ,  H02J7/04 ,  H02J2007/0037

摘要： The charging current value in the first trickle charge after the rapid charge is differentiated from the charging current value in the second and subsequent trickle charge. Thus, for example, in the first trickle charge, charging can be performed with the charging current value required to simultaneously activate and charge an inactive battery. In the second and subsequent trickle charge, charging can be performed with the charging current value required to compensate for self-discharge of a rechargeable battery. By charging the battery with the charging current value required to compensate for self-discharge of the battery in the second and subsequent trickle charge, power consumption required to charge the battery can be reduced, compared to the case where the trickle charge is continued with a constant charging current value required to simultaneously activate and charge the inactive battery, as the conventional device.

摘要翻译： 在快速充电之后的第一涓流充电中的充电电流值与第二次和随后的涓流充电中的充电电流值不同。 因此，例如，在第一涓流充电中，可以以同时激活并对不活动电池充电所需的充电电流值进行充电。 在第二次和随后的涓流充电中，可以利用补偿可再充电电池的自放电所需的充电电流值进行充电。 通过在第二次和随后的涓流充电中以补偿电池的自放电所需的充电电流值对电池充电，与使用电池继续进行涓流充电的情况相比，可以减少对电池充电所需的功耗 恒定的充电电流值，同时激活和充电非活性电池，如传统的设备。

公开(公告)号：US09047941B2

公开(公告)日：2015-06-02

申请号：US13425796

申请日：2012-03-21

申请人： Hideyuki Nishizawa ,  Reiko Yoshimura ,  Tsukasa Tada ,  Shigeki Hattori ,  Masaya Terai ,  Satoshi Mikoshiba ,  Koji Asakawa

发明人： Hideyuki Nishizawa ,  Reiko Yoshimura ,  Tsukasa Tada ,  Shigeki Hattori ,  Masaya Terai ,  Satoshi Mikoshiba ,  Koji Asakawa

IPC分类号： H01L51/10 ,  H01L29/792 ,  G11C13/00 ,  B82Y10/00 ,  H01L51/00 ,  H01L51/05

CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C13/0016 ,  G11C2213/53 ,  H01L45/1233 ,  H01L45/1253 ,  H01L51/0078 ,  H01L51/0092 ,  H01L51/0098 ,  H01L51/0595

摘要： An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecular layer including charge-storage molecular chains or variable-resistance molecular chains, the charge-storage molecular chains or the variable-resistance molecular chains including fused polycyclic groups.

摘要翻译： 实施方案的有机分子存储器包括第一导电层，第二导电层和介于第一导电层和第二导电层之间的有机分子层，有机分子层包括电荷储存分子链或可变电阻分子 链，电荷储存分子链或可变阻力分子链，包括稠合多环基团。

公开(公告)号：US08778201B2

公开(公告)日：2014-07-15

申请号：US13278833

申请日：2011-10-21

申请人： Koji Asakawa ,  Toshiro Hiraoka ,  Yoshihiro Akasaka ,  Yasuyuki Hotta

发明人： Koji Asakawa ,  Toshiro Hiraoka ,  Yoshihiro Akasaka ,  Yasuyuki Hotta

IPC分类号： B44C1/22

CPC分类号： C08J9/26 ,  B82Y10/00 ,  B82Y30/00 ,  C03C17/007 ,  C03C2217/425 ,  C03C2217/479 ,  C03C2218/33 ,  C08J2333/12 ,  C08J2383/16 ,  C23F1/30 ,  G03F7/0002 ,  G11B5/74 ,  G11B5/743 ,  G11B5/855 ,  G11B2005/0029 ,  H01G11/30 ,  H01G11/56 ,  H01J9/02 ,  H01J9/025 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/0337 ,  H01L21/31695 ,  H01M2/145 ,  H01M2/1653 ,  H01M4/131 ,  H01M4/133 ,  H01M4/8605 ,  H01M4/96 ,  H01M8/0234 ,  H01M8/0245 ,  H01M8/026 ,  H01M8/1011 ,  H01M10/0525 ,  Y02E60/13 ,  Y02E60/523 ,  Y02P70/56 ,  Y10S438/945 ,  Y10S438/947 ,  Y10S977/90 ,  Y10T428/24149

摘要： A pattern forming material contains a block copolymer or graft copolymer and forms a structure having micro polymer phases, in which, with respect to at least two polymer chains among polymer chains constituting the block copolymer or graft copolymer, the ratio between N/(Nc−No) values of monomer units constituting respective polymer chains is 1.4 or more, where N represents total number of atoms in the monomer unit, Nc represents the number of carbon atoms in the monomer unit, No represents the number of oxygen atoms in the monomer unit.

摘要翻译： 图案形成材料含有嵌段共聚物或接枝共聚物，并形成具有微聚合物相的结构，其中，关于构成嵌段共聚物或接枝共聚物的聚合物链中的至少两个聚合物链，N /（Nc- 否）构成各聚合物链的单体单元的值为1.4以上，其中N表示单体单元中的总原子数，Nc表示单体单元中的碳原子数，No表示单体单元中的氧原子数 。

公开(公告)号：US20140061763A1

公开(公告)日：2014-03-06

申请号：US13727160

申请日：2012-12-26

申请人： Misako Morota ,  Hideyuki Nishizawa ,  Masaya Terai ,  Shigeki Hattori ,  Koji Asakawa

发明人： Misako Morota ,  Hideyuki Nishizawa ,  Masaya Terai ,  Shigeki Hattori ,  Koji Asakawa

IPC分类号： H01L29/792 ,  H01L29/66

CPC分类号： H01L27/11582 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

摘要： A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.

摘要翻译： 实施例的非易失性半导体存储器件包括：半导体层; 隧道绝缘膜，其形成在所述半导体层上并且包括第一有机分子膜，所述第一有机分子膜包含以烷基分子链为主链的第一有机分子; 形成在隧道绝缘膜上的电荷存储层，电荷存储层由无机材料制成; 形成在电荷存储层上的块绝缘膜; 以及形成在所述块绝缘膜上的控制栅电极。

公开(公告)号：US08575587B2

公开(公告)日：2013-11-05

申请号：US13236793

申请日：2011-09-20

申请人： Koji Asakawa ,  Shigeki Hattori ,  Hideyuki Nishizawa ,  Satoshi Mikoshiba ,  Reika Ichihara ,  Masaya Terai

发明人： Koji Asakawa ,  Shigeki Hattori ,  Hideyuki Nishizawa ,  Satoshi Mikoshiba ,  Reika Ichihara ,  Masaya Terai

IPC分类号： H01L47/00 ,  H01L29/06

CPC分类号： H01L51/0591 ,  G11C13/0014 ,  G11C13/003 ,  G11C2213/72 ,  G11C2213/73 ,  G11C2213/77

摘要： A storage device includes: a plurality of first electrode wirings; a plurality of second electrode wirings which cross the first electrode wirings; a via plug which is formed between the second electrode wiring and the two adjacent first electrode wirings, and in which a maximum diameter of a bottom surface opposing the first electrode wirings in a direction vertical to a direction in which the first electrode wirings stretch is smaller than a length corresponding to a pitch of the first electrode wiring plus a width of the first electrode wirings; a first storage element which is formed between the via plug and one of the two first electrode wirings; and a second storage element which is formed between the via plug and the other one of the two first electrode wirings.

摘要翻译： 存储装置包括：多个第一电极布线; 与第一电极布线交叉的多个第二电极布线; 形成在所述第二电极布线和所述两个相邻的第一电极布线之间的通孔塞，其中与所述第一电极布线相反的方向上的与所述第一电极相对的底面的最大直径在与所述第一电极布线拉伸的方向垂直的方向上布线的最大直径较小 比对应于第一电极布线的间距加上第一电极布线的宽度的长度; 第一存储元件，其形成在所述通孔插头和所述两个第一电极布线中的一个之间; 以及第二存储元件，其形成在所述通孔插头和所述两个第一电极布线中的另一个之间。

公开(公告)号：US20130248962A1

公开(公告)日：2013-09-26

申请号：US13602523

申请日：2012-09-04

申请人： Misako Morota ,  Hideyuki Nishizawa ,  Shigeki Hattori ,  Masaya Terai ,  Koji Asakawa

发明人： Misako Morota ,  Hideyuki Nishizawa ,  Shigeki Hattori ,  Masaya Terai ,  Koji Asakawa

IPC分类号： H01L29/788 ,  H01L29/66

CPC分类号： H01L29/788 ,  G11C13/0014 ,  G11C2213/18 ,  G11C2213/71 ,  H01L27/11582 ,  H01L29/40117 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7926 ,  H01L51/0067 ,  H01L51/0591

摘要： A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; an organic molecular layer formed on the semiconductor layer, the organic molecular layer including a plurality of organic molecules, each of the organic molecules includes a tunnel insulating unit of alkyl chain having one end bonded to the semiconductor layer, a charge storing unit, and a bonding unit configured to bond the other end of the alkyl chain to the charge storing unit; a block insulating film formed on the organic molecular layer; and a gate electrode formed on the block insulating film.

摘要翻译： 实施例的非易失性半导体存储器件包括：半导体层; 形成在所述半导体层上的有机分子层，所述有机分子层包含多个有机分子，所述有机分子中的每一个包括具有与所述半导体层接合的一端的烷基链的隧道绝缘单元，电荷存储单元和 接合单元，被配置为将所述烷基链的另一端键合到所述电荷存储单元; 形成在有机分子层上的块绝缘膜; 以及形成在所述块绝缘膜上的栅电极。

公开(公告)号：US20130242670A1

公开(公告)日：2013-09-19

申请号：US13601539

申请日：2012-08-31

申请人： Shigeki Hattori ,  Masakazu Yamagiwa ,  Masaya Terai ,  Hideyuki Nishizawa ,  Koji Asakawa ,  Yoshiaki Fukuzumi

发明人： Shigeki Hattori ,  Masakazu Yamagiwa ,  Masaya Terai ,  Hideyuki Nishizawa ,  Koji Asakawa ,  Yoshiaki Fukuzumi

IPC分类号： H01L29/788 ,  G11C16/04

CPC分类号： H01L21/28273 ,  B82Y10/00 ,  G11C16/0416 ,  G11C16/0483 ,  H01L27/11556 ,  H01L29/42332 ,  H01L29/7881

摘要： A nonvolatile semiconductor storage device includes a semiconductor layer, a first insulating film formed on the semiconductor layer, a charge storage layer formed on the first insulating film and having fine metal grains, a second insulating film formed on the charge storage layer, and a gate electrode formed on the second insulating film. During a write operation, a differential voltage is applied across the gate electrode and the semiconductor layer to place the gate electrode at a lower voltage than the semiconductor layer and cause a positive electric charge to be stored in the charge storage layer.

摘要翻译： 非易失性半导体存储装置包括半导体层，形成在半导体层上的第一绝缘膜，形成在第一绝缘膜上并具有细金属颗粒的电荷存储层，形成在电荷存储层上的第二绝缘膜和栅极 电极形成在第二绝缘膜上。 在写入操作期间，在栅极电极和半导体层两端施加差分电压，以使栅极电极位于比半导体层低的电压下，并将正电荷存储在电荷存储层中。

公开(公告)号：US20130169217A1

公开(公告)日：2013-07-04

申请号：US13807671

申请日：2011-06-13

申请人： Kazunori Watanabe ,  Koji Asakawa ,  Seiichi Iwao

发明人： Kazunori Watanabe ,  Koji Asakawa ,  Seiichi Iwao

IPC分类号： H02J7/00

CPC分类号： H02J7/0047 ,  H01M10/44 ,  H01M10/488 ,  H02J7/0077 ,  H02J2007/0049

摘要： Under a control by a controller (14), a rechargeable electric device makes a full charge display to display on a display unit (15) that a secondary battery (11) is fully charged, after a start of charging the secondary battery (11) in a case where either when a count value of a counter reaches a first predetermined value (C1) corresponding to the full charge of the secondary battery (11), or when a duty ratio of switching signals which make an on/off control of a switching element (131) becomes smaller than or equal to a predetermined value (D) corresponding to the charge current obtained at a time of the full charge of the secondary battery (11).

摘要翻译： 在控制器（14）的控制下，在二次电池（11）开始充电之后，可再充电电子装置进行充满电显示，以在二次电池（11）完全充电的显示单元（15）上显示， 在计数器的计数值达到与二次电池（11）的全部电荷对应的第一预定值（C1）的情况下，或当对二次电池（11）的开/关控制的开关信号的占空比 开关元件（131）变得小于或等于对应于在二次电池（11）的完全充电时获得的充电电流的预定值（D）。

公开(公告)号：US20130162377A1

公开(公告)日：2013-06-27

申请号：US13702879

申请日：2011-09-12

申请人： Shinichiro Ando ,  Koji Asakawa ,  Akifumi Sato ,  W. P. Hemantha Desilva ,  Tomoo Yamazaki

发明人： Shinichiro Ando ,  Koji Asakawa ,  Akifumi Sato ,  W. P. Hemantha Desilva ,  Tomoo Yamazaki

IPC分类号： H01H71/10

CPC分类号： H01H71/0207 ,  H01H9/342 ,  H01H73/04 ,  H01H77/104 ,  H01H77/108 ,  H01H2077/025

摘要： A molded case housing each part is configured of a case main body (54) and a cover (55) placed on an upper portion of the case main body, the case main body (54) is configured of a bottom portion case (56) that forms a bottom portion of a circuit breaker and an intermediate case (57), placed on an upper portion of the bottom portion case, having a dividing wall that blocks off a space between the intermediate case and the bottom portion case. A power source side terminal block (3) and second movable contact (4) are fitted inside the bottom portion case, and a first movable contact (5), the load side terminal block (9), the contact portion (52), and the arc extinguishing chamber (6) are fitted inside the intermediate case.

摘要翻译： 由壳体主体（54）和放置在壳体主体上部的盖（55）构成的壳体，其中，壳体主体（54）由底部壳体（56）构成， 形成断路器的底部和放置在底部壳体的上部的中间壳体（57），具有阻挡中间壳体和底部壳体之间的空间的分隔壁。 电源侧端子块（3）和第二可动触头（4）装配在底部壳体内，第一可动触头（5），负载侧端子块（9），接触部分（52）和 灭弧室（6）安装在中间壳体内。

公开(公告)号：US20130135746A1

公开(公告)日：2013-05-30

申请号：US13723374

申请日：2012-12-21

申请人： Tsutomu Nakanishi ,  Akira Fujimoto ,  Koji Asakawa ,  Takeshi Okino

发明人： Tsutomu Nakanishi ,  Akira Fujimoto ,  Koji Asakawa ,  Takeshi Okino

IPC分类号： G02B1/11

CPC分类号： G02B1/118 ,  B81C1/0046 ,  C03C15/00 ,  C03C17/007 ,  C03C17/28 ,  C03C2217/42 ,  C03C2217/77 ,  C03C2218/34 ,  C03C2218/355 ,  Y10T428/24421

摘要： The present invention provides such a formation method that an antireflection structure having excellent antireflection functions can be formed in a large area and at small cost. Further, the present invention also provides an antireflection structure formed by that method. In the formation method, a base layer and particles placed thereon are subjected to an etching process. The particles on the base layer serve as an etching mask in the process, and hence they are more durable against etching than the base layer. The etching rate ratio of the base layer to the particles is more than 1 but not more than 5. The etching process is stopped before the particles disappear. It is also possible to produce an antireflection structure by nanoimprinting method employing a stamper. The stamper is formed by use of a master plate produced according to the above formation method.