PRODUCTION OF SELF-ORGANIZED PIN-TYPE NANOSTRUCTURES, AND THE RATHER EXTENSIVE APPLICATIONS THEREOF
    2.
    发明申请
    PRODUCTION OF SELF-ORGANIZED PIN-TYPE NANOSTRUCTURES, AND THE RATHER EXTENSIVE APPLICATIONS THEREOF 有权
    自组织PIN型纳米结构的生产及其广泛的应用

    公开(公告)号:US20090261353A1

    公开(公告)日:2009-10-22

    申请号:US12089727

    申请日:2006-10-10

    摘要: The invention relates to methods and devices comprising a nanostructure (2;4,4a) for improving the optical behavior of components and apparatuses and/or improving the behavior of sensors by increasing the active surface area. The nanostructure (2) is produced by means of a special RIE etching process, can be modified regarding the composition of the materials thereof, and can be provided with adequate coatings. The amount of material used for the base layer (3) can be reduced by supplying a buffer layer (406). Many applications are disclosed.

    摘要翻译: 本发明涉及包括纳米结构(2; 4,4a)的方法和装置,用于通过增加活性表面积来改善部件和装置的光学行为和/或改善传感器的行为。 纳米结构(2)通过特殊的RIE蚀刻工艺生产,可以根据其材料的组成进行修改,并且可以提供足够的涂层。 通过提供缓冲层(406)可以减少用于基层(3)的材料的量。 公开了许多应用。

    Photodetector comprising a monolithically integrated transimpedance amplifier and evaluation electronics, and production method
    3.
    发明授权
    Photodetector comprising a monolithically integrated transimpedance amplifier and evaluation electronics, and production method 失效
    光检测器包括单片集成跨阻放大器和评估电子器件,以及生产方法

    公开(公告)号:US07491925B2

    公开(公告)日:2009-02-17

    申请号:US10596035

    申请日:2004-12-06

    IPC分类号: H03F3/08

    摘要: The aim of the invention is to configure a photodetector (10) such that no disadvantages are created for processing low luminous intensities on detectors known in prior art, especially when monolithically integrating the evaluation electronics. Said aim is achieved by a photodetector for processing low luminous intensities, comprising a monolithically integrated transimpedance amplifier and monolithically integrated evaluation electronics. An actual photocell component (20) is assigned to the chip face onto which the light preferably falls. Electronic circuit components (30) are arranged on the opposite chip face. Electrical connections (40) between the photocell and the electronic circuit are provided with an extension in the direction running perpendicular to the chip normal.

    摘要翻译: 本发明的目的是配置光电检测器(10),使得在现有技术中已知的检测器上特别是当对评估电子器件进行单片整合时,不会产生用于处理低发光强度的缺点。 所述目的通过用于处理低发光强度的光电检测器实现,其包括单片集成跨阻抗放大器和单片集成评估电子器件。 实际的光电池组件(20)被分配给光优选落在其上的芯片面。 电子电路部件(30)布置在相对的芯片面上。 在光电管和电子电路之间的电连接(40)在垂直于芯片法线的方向上具有延伸。

    Production of self-organized pin-type nanostructures, and the rather extensive applications thereof
    4.
    发明授权
    Production of self-organized pin-type nanostructures, and the rather extensive applications thereof 有权
    自组织针型纳米结构的生产及其广泛应用

    公开(公告)号:US08350209B2

    公开(公告)日:2013-01-08

    申请号:US12089727

    申请日:2006-10-10

    IPC分类号: H01J3/14 H01J5/16

    摘要: The invention relates to methods and devices comprising a nanostructure (2;4,4a) for improving the optical behavior of components and apparatuses and/or improving the behavior of sensors by increasing the active surface area. The nanostructure (2) is produced by means of a special RIE etching process, can be modified regarding the composition of the materials thereof, and can be provided with adequate coatings. The amount of material used for the base layer (3) can be reduced by supplying a buffer layer (406). Many applications are disclosed.

    摘要翻译: 本发明涉及包括纳米结构(2; 4,4a)的方法和装置,用于通过增加活性表面积来改善部件和装置的光学行为和/或改善传感器的行为。 纳米结构(2)通过特殊的RIE蚀刻工艺生产,可以根据其材料的组成进行修改,并且可以提供足够的涂层。 通过提供缓冲层(406)可以减少用于基层(3)的材料的量。 公开了许多应用。

    Vertical Pin or Nip Photodiode and Method for the Production which is Compatible with a Conventional Cmos-Process
    5.
    发明申请
    Vertical Pin or Nip Photodiode and Method for the Production which is Compatible with a Conventional Cmos-Process 审中-公开
    垂直销或二极管光电二极管及与传统Cmos工艺兼容的生产方法

    公开(公告)号:US20090001434A1

    公开(公告)日:2009-01-01

    申请号:US11718364

    申请日:2005-11-03

    CPC分类号: H01L31/105 H01L27/14601

    摘要: The invention relates to a fast photodiode and to a method for the production thereof in CMOS technology. The integrated PIN photodiode, which is formed or can be formed by CMOS technology, consists of an anode corresponding to a highly doped p-type substrate with a specific electric resistance of less than 50 mOhm*cm, a lightly p-doped l-region which is adjacent to the anode, and an n-type cathode which corresponds to the doping in the n-well region. The lightly doped l-region has a doping concentration of less than 1014 cm−3 and has a thickness of between 8 and 25 μm. The cathode region is completely embedded in the very lightly doped l-region. A distance from the edge of the cathode region to a highly doped adjacent region is in the range of 2.5 μm to 10 μm.

    摘要翻译: 本发明涉及一种快速光电二极管及其在CMOS技术中的制造方法。 由CMOS技术形成或可以形成的集成PIN光电二极管由对应于具有小于50mOhm * cm的比电阻的高掺杂p型衬底的阳极组成,轻掺杂的p型区域 其与阳极相邻,以及对应于n阱区域中的掺杂的n型阴极。 轻掺杂的1-区具有小于1014cm-3的掺杂浓度,并且具有在8和25μm之间的厚度。 阴极区域完全嵌入非常轻掺杂的l区域。 从阴极区域的边缘到高度掺杂的相邻区域的距离在2.5μm到10μm的范围内。

    Uses of self-organized needle-type nanostructures
    6.
    发明授权
    Uses of self-organized needle-type nanostructures 有权
    使用自组织的针状纳米结构

    公开(公告)号:US08258557B2

    公开(公告)日:2012-09-04

    申请号:US12443261

    申请日:2007-04-10

    IPC分类号: H01L31/062

    摘要: The invention relates to processes for the production and elements (components) with a nanostructure (2; 4, 4a) for improving the optical behavior of components and devices and/or for improving the behavior of sensors by enlarging the active surface area. The nanostructure (2) is produced in a self-masking fashion by means of RIE etching and its material composition can be modified and it can be provided with suitable cover layers.

    摘要翻译: 本发明涉及用于改进组件和装置的光学行为和/或通过扩大活性表面积来改善传感器的行为的纳米结构(2; 4,4a)的元件(部件)的制造方法和元件(部件)。 纳米结构(2)通过RIE蚀刻以自我掩蔽的方式制造,并且其材料组成可以被改变,并且可以提供合适的覆盖层。

    Self-organized pin-type nanostructures, and production thereof on silicon
    7.
    发明授权
    Self-organized pin-type nanostructures, and production thereof on silicon 有权
    自组织pin型纳米结构及其在硅上的制备

    公开(公告)号:US08058086B2

    公开(公告)日:2011-11-15

    申请号:US12089724

    申请日:2006-10-10

    IPC分类号: H01L21/00

    摘要: By means of an RIE etch process for silicon (3), a pin-type structure (4,4a) without crystal defects is formed with high aspect ratio and with nano dimensions on the surface of silicon wafers without any additional patterning measures (e-beam, interference lithography, and the like) by selecting the gas components of the etch plasma in self-organization wherein, among others, a broadband antireflective behavior is obtained that may be applicable in many fields.

    摘要翻译: 通过对硅(3)的RIE蚀刻工艺,在没有任何附加图案化措施的情况下,在硅晶片的表面上形成具有高纵横比和纳米尺寸的无晶体缺陷的引脚型结构(4,4a) 光束,干涉光刻等),通过选择自组织中的蚀刻等离子体的气体成分,其中尤其可获得可应用于许多领域的宽带抗反射行为。

    BROADBAND ANTIREFLECTIVE OPTICAL COMPONENTS WITH CURVED SURFACES AND THEIR PRODUCTION
    9.
    发明申请
    BROADBAND ANTIREFLECTIVE OPTICAL COMPONENTS WITH CURVED SURFACES AND THEIR PRODUCTION 审中-公开
    带弯曲表面的宽带抗反射光学元件及其生产

    公开(公告)号:US20090180188A1

    公开(公告)日:2009-07-16

    申请号:US12294129

    申请日:2007-03-23

    IPC分类号: G02B1/11 G02B5/30

    CPC分类号: G02B1/118 G02B1/11

    摘要: Methods and optical devices are proposed, which comprise a nanostructure (4) on a curved surface so that a broadband antireflective characteristic is obtained. The nanostructure is fabricated by means of a self-masking single step etch process of silicon (3) on the curved surface

    摘要翻译: 提出了在曲面上包含纳米结构(4)的方法和光学装置,从而获得宽带抗反射特性。 通过硅(3)在弯曲表面上的自掩蔽单步蚀刻工艺制造纳米结构

    Photodetector comprising a monolithically integrated transimpedance amplifier and evaluation electronics, and production method
    10.
    发明申请
    Photodetector comprising a monolithically integrated transimpedance amplifier and evaluation electronics, and production method 失效
    光检测器包括单片集成跨阻放大器和评估电子器件,以及生产方法

    公开(公告)号:US20070164393A1

    公开(公告)日:2007-07-19

    申请号:US10596035

    申请日:2004-12-06

    IPC分类号: H01L29/00

    摘要: The aim of the invention is to configure a photodetector (10) such that no disadvantages are created for processing low luminous intensities on detectors known in prior art, especially when monolithically integrating the evalation electronics. Said aim is achieved by a photodetector for processing low luminous intensities, comprising a monolithically integrated transimpedance amplifier and monolithically integrated evaluation electronics. An actual photocell component (20) is assigned to the chip face onto which the light preferably falls. Electronic circuit components (30) are arranged on the opposite chip face. Electrical connections (40) between the photocell and the electronic circuit are provided with an extension in the direction running perpendicular to the chip normal.

    摘要翻译: 本发明的目的是配置光电检测器(10),使得在现有技术中已知的检测器上特别是当对评估电子器件进行单片整合时,不会产生用于处理低发光强度的缺点。 所述目的通过用于处理低发光强度的光电检测器实现,其包括单片集成跨阻抗放大器和单片集成评估电子器件。 实际的光电池组件(20)被分配给光优选落在其上的芯片面。 电子电路部件(30)布置在相对的芯片面上。 在光电管和电子电路之间的电连接(40)在垂直于芯片法线的方向上具有延伸。