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1.发明授权Circuitized substrate with dielectric layer having dielectric composition not including continuous or semi-continuous fibers 有权具有介电层的电路化基底，其电介质组成不包括连续或半连续的纤维公开(公告)号：US08445094B2
公开(公告)日：2013-05-21
申请号：US11896786
申请日：2007-09-06
Applicant: Robert Japp , Kostas Papathomas
Inventor： Robert Japp , Kostas Papathomas
CPC classification number: H05K1/0373 , H01L2224/16225 , H01L2924/15311 , H05K3/4602 , H05K2201/0209 , H05K2201/0239 , Y10T428/24322 , Y10T428/24355 , Y10T428/24917
Abstract: A circuitized substrate which includes at least one circuit layer and at least one substantially solid dielectric layer comprised of a dielectric composition which includes a cured resin material and a predetermined percentage by weight of particulate fillers, but not including continuous or semi-continuous fibers as part thereof.
Abstract translation: 一种电路化衬底，其包括至少一个电路层和至少一个基本上固体的电介质层，该电介质层包括固化树脂材料和预定重量百分比的颗粒填料，但不包括连续或半连续纤维作为部分 其中。
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2.发明授权Information handling system including a circuitized substrate having a dielectric layer without continuous fibers 有权信息处理系统包括具有不带连续纤维的电介质层的电路化基板
公开(公告)号：US07508076B2
公开(公告)日：2009-03-24
申请号：US11350777
申请日：2006-02-10
Applicant: Robert Japp , Voya Markovich , Cheryl Palomaki , Kostas Papathomas , David L. Thomas
Inventor： Robert Japp , Voya Markovich , Cheryl Palomaki , Kostas Papathomas , David L. Thomas
IPC: H01L23/48
CPC classification number: H01L23/145 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H05K1/0373 , H05K3/4602 , H05K2201/0209
Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
Abstract translation: 一种信息处理系统，其包括作为其一部分的电路化基板，其包括由包括其中包含预定量的颗粒的树脂材料的介电材料构成的第一层，并且不包括连续纤维，半连续纤维等作为其一部分，以及 位于电介质第一层上的至少一个电路层。
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3.发明申请Circuitized substrate with conductive paste, electrical assembly including said circuitized substrate and method of making said substrate 有权具有导电浆料的电路基板，包括所述电路化基板的电气组件和制造所述基板的方法
公开(公告)号：US20070221404A1
公开(公告)日：2007-09-27
申请号：US11802434
申请日：2007-05-23
Applicant: Rabindra Das , Kostas Papathomas , Voya Markovich
Inventor： Rabindra Das , Kostas Papathomas , Voya Markovich
CPC classification number: H05K1/0313 , B23K26/382 , B23K26/40 , B23K2101/40 , B23K2103/16 , B23K2103/172 , B23K2103/52 , H01B1/22 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/01322 , H01L2924/15311 , H05K1/097 , H05K3/4053 , H05K3/4069 , H05K3/462 , H05K3/4623 , H05K3/4641 , H05K2201/0257 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/09718 , H05K2201/10378 , H05K2203/0425 , H05K2203/1152 , Y10T29/49128 , Y10T29/49165 , H01L2924/00
Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.
Abstract translation: 一种电路化基板，包括用于提供电连接的导电浆料。 在一个实施方案中，糊状物包括包含纳米颗粒的金属组分，并且可以包括附加元素，例如焊料或其它金属微粒，以及导电聚合物和有机物。 糊料组合物的颗粒烧结并且根据添加的另外的元素而熔化，因为层压，从而形成通过糊料的有效连续的电路。 还提供了制造这种基板的方法，以及利用该基板并且包括诸如与其耦合的半导体芯片的电子部件的电组件。
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4.发明授权Dielectric composition for forming dielectric layer for use in circuitized substrates 有权用于形成用于电路化基板的电介质层的介电组合物
公开(公告)号：US07270845B2
公开(公告)日：2007-09-18
申请号：US10812889
申请日：2004-03-31
Applicant: Robert Japp , Kostas Papathomas
Inventor： Robert Japp , Kostas Papathomas
IPC: H01K3/10
CPC classification number: H05K1/0373 , H01L2224/16225 , H01L2924/15311 , H05K3/4602 , H05K2201/0209 , H05K2201/0239 , Y10T428/24322 , Y10T428/24355 , Y10T428/24917
Abstract: A dielectric composition which forms a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a cured resin material and a predetermined percentage by weight of particulate fillers, thus not including continuous fibers, semi-continuous fibers or the like as part thereof.
Abstract translation: 形成电介质层的电介质组合物，其可用于诸如PCB，芯片载体等的电路化基板中。 作为这样的层，其包括固化树脂材料和预定重量的颗粒填料，因此不包括连续纤维，半连续纤维等作为其一部分。
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5.发明申请Method of making same low moisture absorptive circuitized substrave with reduced thermal expansion 有权制造具有降低的热膨胀的相同的低吸湿电路化子串的方法
公开(公告)号：US20070182016A1
公开(公告)日：2007-08-09
申请号：US11730942
申请日：2007-04-05
Applicant: Robert Japp , Irving Memis , Kostas Papathomas
Inventor： Robert Japp , Irving Memis , Kostas Papathomas
IPC: H01L23/48
CPC classification number: H01L23/3735 , H01L23/145 , H01L23/3733 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L23/564 , H01L2224/16225 , H01L2924/15311 , H05K1/0366 , H05K1/0373 , H05K3/4602 , H05K3/4626 , H05K3/4652 , H05K3/4655 , H05K3/4688 , H05K2201/0209 , H05K2201/0278 , H05K2201/068
Abstract: A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof.
Abstract translation: 一种制造电路化基板的方法，所述电路化基板包括复合层，所述复合层包括具有低热膨胀系数的多个纤维的第一介电子层和低吸湿性树脂的第二介电子层，所述第二介电子层 不包括连续或半连续纤维等作为其一部分。 衬底还包括至少一个作为其一部分的导电层。
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6.发明申请Low moisture absorptive circuitized substrate, method of making same, electrical assembly utilizing same, and information handling system utilizing same 失效低吸水性电路化基板，其制造方法，利用其组合的电气组件以及利用其的信息处理系统
公开(公告)号：US20050224251A1
公开(公告)日：2005-10-13
申请号：US10920235
申请日：2004-08-18
Applicant: Irving Memis , Kostas Papathomas
Inventor： Irving Memis , Kostas Papathomas
IPC: H01L21/44 , H01L21/48 , H01L21/50 , H01L23/14 , H01L23/48 , H01L23/492 , H01L23/498 , H01L23/52 , H01L29/40 , H05K1/03 , H05K3/00 , H05K3/46
CPC classification number: H01L23/145 , H01L21/48 , H01L21/50 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H05K1/0373 , H05K3/4602 , H05K2201/0209 , H01L2924/00
Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combination not including continuous or semi-continuous fibers as part thereof. The substrate further includes at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.
Abstract translation: 电路化基板，包括由介电材料组成的第一层，该电介质材料包括与包含在树脂内的结节状含氟聚合物纤维网结合的低吸水性聚合物树脂，由该组合形成的所得电介质层不包括连续或半连续纤维作为其一部分 。 衬底还包括位于电介质第一层上的至少一个电路化层。 还提供电气组件和制造基板的方法，如本发明的电路化基板作为其一部分的信息处理系统（例如，计算机）。
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公开(公告)号：US6114019A
公开(公告)日：2000-09-05
申请号：US33456
申请日：1998-03-02
Applicant: Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
Inventor： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
CPC classification number: H05K3/4652 , H05K1/113 , H05K3/4069 , H05K3/4602 , H01L2224/48091 , H01L2224/73204 , H01L2924/12044 , H05K2201/0347 , H05K2201/0355 , H05K2201/092 , H05K2201/0959 , H05K2203/0191 , H05K2203/025 , H05K2203/0278 , H05K2203/0338 , H05K2203/0554 , H05K3/0023 , H05K3/0094 , H05K3/025 , H05K3/246 , H05K3/429 , Y10S428/901 , Y10T29/49126 , Y10T29/4913 , Y10T29/49139 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917 , Y10T428/24926 , Y10T428/24942 , Y10T428/249996
Abstract: A circuit assembly that includes a circuitized substrate having a dielectric interior layer with a first surface and at least one hole therein. A filler material substantially fills the hole within the dielectric interior layer. A first wiring layer is positioned on the first surface of the dielectric interior layer, wherein the first wiring layer substantially covers the hole and assists in retaining the filler material within the hole in the dielectric interior layer. A first dielectric photoresist layer is positioned on the first wiring layer and on the first surface of the dielectric interior layer. The first dielectric photoresist layer also includes at least one hole therein. The filler material also substantially fills the hole within the first dielectric photoresist layer. A second wiring layer is positioned on the first dielectric photoresist layer and includes a plurality of conductive pads as part thereof. At least one external component can be electrically coupled to the conductive pads of the second wiring layer.
Abstract translation: 一种电路组件，其包括具有电介质内层的电路化衬底，其具有第一表面和至少一个孔。 填充材料基本上填充电介质内层内的孔。 第一布线层位于电介质内层的第一表面上，其中第一布线层基本上覆盖孔，并有助于将填料保持在电介质内层的孔内。 第一电介质光致抗蚀剂层定位在第一布线层上和电介质内层的第一表面上。 第一电介质光致抗蚀剂层还包括至少一个孔。 填充材料还基本上填充第一介电光致抗蚀剂层内的孔。 第二布线层位于第一电介质光致抗蚀剂层上，并且包括多个导电焊盘作为其一部分。 至少一个外部部件可以电耦合到第二布线层的导电焊盘。
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8.发明授权Via fill compositions for direct attach of devices and method for applying same 失效用于直接附着装置的填充组合物和用于施加它们的方法
公开(公告)号：US6106891A
公开(公告)日：2000-08-22
申请号：US215992
申请日：1998-12-18
Applicant: Joseph Duane Kulesza , Voya Rista Markovich , Kostas Papathomas , Joseph Gene Sabia
Inventor： Joseph Duane Kulesza , Voya Rista Markovich , Kostas Papathomas , Joseph Gene Sabia
IPC: B32B7/04 , C08G59/40 , C08G73/00 , C08L63/00 , C09D163/00 , H01B1/20 , H01B1/22 , H01B1/24 , H05K1/09 , H05K1/11 , H05K1/16 , H05K3/00 , H05K3/40 , H05K3/42
CPC classification number: H01B1/24 , B32B7/04 , H01B1/22 , H05K1/095 , H05K1/113 , H05K1/167 , H05K3/4053 , H05K3/4069 , H01L2224/16235 , H05K1/16 , H05K2201/0347 , H05K2201/09563 , H05K2201/10734 , H05K2203/0126 , H05K2203/0191 , H05K2203/0207 , H05K2203/0278 , H05K2203/0338 , H05K2203/0763 , H05K3/0023 , H05K3/0047 , H05K3/0094 , Y10S428/901 , Y10T29/49099 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24273 , Y10T428/24331 , Y10T428/24339 , Y10T428/24826 , Y10T428/24917 , Y10T428/24926 , Y10T428/25
Abstract: The present invention permits solder joints to be made directly to via and through holes without the solder being wicked into the vias or through holes, by filling plated through holes with an epoxy or cyanate fill composition. When cured and overplated, the fill composition provides support for the solder joint and provides a flat solderable surface for the inter-connection. In certain embodiments, the cured fill compositions, offer a further advantage of being conductive. The invention also relates to several novel methods for filling through holes with such fill compositions, and to resistors located in through holes and vias.
Abstract translation: 本发明允许焊接接头直接制成通孔和通孔，而不会通过用环氧树脂或氰酸盐填充组合物填充电镀通孔，焊料不会被弄脏到通孔或通孔中。 当固化和过度镀覆时，填充组合物为焊接接头提供支撑，并为相互连接提供平坦的可焊接表面。 在某些实施方案中，固化的填充组合物提供另外的导电性的优点。 本发明还涉及用这种填充组合物填充通孔的几种新方法，以及位于通孔和通孔中的电阻器。
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9.发明授权
公开(公告)号：US5863332A
公开(公告)日：1999-01-26
申请号：US770058
申请日：1996-12-19
Applicant: Elizabeth Foster , Jeffrey Curtis Hedrick , Robert Maynard Japp , Kostas Papathomas , Stephen Leo Tisdale , Alfred Viehbeck
Inventor： Elizabeth Foster , Jeffrey Curtis Hedrick , Robert Maynard Japp , Kostas Papathomas , Stephen Leo Tisdale , Alfred Viehbeck
CPC classification number: B29B15/122 , B05C5/02 , B05C9/06 , Y10S118/11
Abstract: The invention involves a fluid treatment device and fluid treatment method to solution or melt coat or impregnate a resin or polymer to a predetermined, metered thickness into a substrate. The invention is effective in impregnating or coating various substrates in both a continuous or batch process on one side, two sides, or in the case of a porous substrate, penetration and complete saturation is possible. The invention offers significant advantages and benefits over existing methods and equipment and allows the coating or impregnation process to be performed at lower cost and higher efficiency with increased environmental safety.
Abstract translation: 本发明涉及一种流体处理装置和流体处理方法，以将预定的计量厚度的树脂或聚合物溶解或熔融涂覆或浸渍到基材中。 本发明在一侧或两侧以连续或间歇方式浸渍或涂覆各种基材是有效的，或者在多孔基材的情况下，渗透和完全饱和是可能的。 本发明与现有的方法和设备相比具有显着的优点和优点，并且允许以更低的成本和更高的效率以更高的环境安全性进行涂覆或浸渍过程。
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10.发明申请Method of providing printed circuit board with conductive holes and board resulting therefrom 有权为印刷电路板提供导电孔和由此产生的板的方法
公开(公告)号：US20060183316A1
公开(公告)日：2006-08-17
申请号：US11397713
申请日：2006-04-05
Applicant: James Larnerd , John Lauffer , Voya Markovich , Kostas Papathomas
Inventor： James Larnerd , John Lauffer , Voya Markovich , Kostas Papathomas
IPC: H01L21/4763 , H01L21/44
CPC classification number: H05K3/429 , H01L2224/13 , H05K1/113 , H05K1/115 , H05K3/0032 , H05K3/0035 , H05K3/421 , H05K2201/0347 , H05K2201/09454 , H05K2201/09509 , H05K2201/09518 , H05K2201/09563 , H05K2201/0959 , H05K2201/0969 , H05K2201/09845
Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.
Abstract translation: 一种制造印刷电路板的方法，其中导电通孔形成在板结构的两个电介质层内，以便连接指定的导电层。 一个孔连接两个相邻的层，另一个连接两个相邻的层，包括通过另一个孔连接的一个导电层。 也可以使用一个或多个孔连接所有三个导电层。 所得到的孔可以例如用金属电镀或导电或不导电的糊料填充。 在后者的情况下，也可以在浆料上方设置顶部覆盖导电层，例如在板的外表面上用作衬垫等。
