公开(公告)号：US08979963B2

公开(公告)日：2015-03-17

申请号：US13502747

申请日：2012-03-22

申请人： Weibing Yang ,  Chun-hao Wu ,  Kun-hsien Lin ,  Yongqiang Wang ,  Erqing Zhu ,  Xiande Li ,  Minghu Qi ,  Zenghong Chen ,  Zhenhua Guo ,  Yunshao Jiang

发明人： Weibing Yang ,  Chun-hao Wu ,  Kun-hsien Lin ,  Yongqiang Wang ,  Erqing Zhu ,  Xiande Li ,  Minghu Qi ,  Zenghong Chen ,  Zhenhua Guo ,  Yunshao Jiang

IPC分类号： B01D46/00 ,  F24F13/28 ,  F24F3/16 ,  B01D46/10 ,  B01D29/52

CPC分类号： F24F13/28 ,  B01D29/52 ,  B01D46/0019 ,  B01D46/10 ,  B01D2279/51 ,  E04B9/064 ,  E04B9/244 ,  F24F3/1603 ,  F24F3/1607 ,  F24F3/161 ,  F24F2221/14

摘要： The present invention discloses a suspended ceiling filtration apparatus, which includes filtration units. The filtration unit includes a filtration part, two horizontal strip support legs and two longitudinal strip support legs. A support plate protrudes from the support legs. The filtration part is placed on the support plate, and a buffer filling part is disposed between the filtration part and the support plate. The buffer filling part is utilized to self-adaptively swell and shrink relative to the support plate according to a weight of the supported filtration part, the buffer filling part fills a gap between the support plate and the filtration part.

摘要翻译： 本发明公开了一种悬吊天花板过滤装置，其包括过滤单元。 过滤单元包括过滤部分，两个水平条带支撑腿和两个纵向条支撑腿。 支撑板从支撑腿突出。 将过滤部件放置在支撑板上，并且缓冲填充部分设置在过滤部分和支撑板之间。 缓冲填充部分根据支撑的过滤部分的重量被用于相对于支撑板自适应地膨胀和收缩，缓冲填充部分填充支撑板和过滤部分之间的间隙。

公开(公告)号：US08777548B2

公开(公告)日：2014-07-15

申请号：US13510907

申请日：2012-04-13

申请人： Weibing Yang ,  Chun Hao Wu ,  Kun Hsien Lin ,  Yongqiang Wang ,  Erqing Zhu ,  Xiande Li

发明人： Weibing Yang ,  Chun Hao Wu ,  Kun Hsien Lin ,  Yongqiang Wang ,  Erqing Zhu ,  Xiande Li

IPC分类号： B65G1/133

CPC分类号： B65G49/061 ,  B65G49/067 ,  B65G49/068

摘要： A pick-and-place apparatus for handling glass substrate is disclosed and which comprises a chassis and a transportation platform which includes a transferring device disposed on the chassis and includes a first frame and a plurality of transferring rods rotationally disposed across the first frame along a first reference direction. A vertical displacing mechanism is provided for moving the transportation platform to move vertically to a pre-determined height. And a horizontal displacing device is provided for moving the transportation platform to more along the first reference direction such that the transferring device can be moved in and out of the cartridge, wherein the first transferring rods rotationally move the glass substrate into the cartridge or out of the cartridge.

摘要翻译： 公开了一种用于处理玻璃基板的拾放装置，其包括底盘和运输平台，该底盘和运输平台包括设置在底盘上的转移装置，并且包括第一框架和沿着第一框架旋转地布置成横跨第一框架的多个转移杆 第一参考方向。 提供垂直移位机构，用于使运输平台移动以垂直移动至预定高度。 并且提供水平移动装置，用于沿着第一参考方向将运输平台移动到更多的位置，使得转移装置可以移入和移出盒，其中第一转移杆将玻璃基板旋转地移动到盒中或者从 墨盒。

公开(公告)号：US08552530B2

公开(公告)日：2013-10-08

申请号：US12848531

申请日：2010-08-02

申请人： Kun-Hsien Lin ,  Zi-Ping Chen ,  Che-Hao Chuang ,  Ryan Hsin-Chin Jiang

发明人： Kun-Hsien Lin ,  Zi-Ping Chen ,  Che-Hao Chuang ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L29/06

CPC分类号： H01L27/0259

摘要： A vertical transient voltage suppressor for protecting an electronic device is disclosed. The vertical transient voltage includes a conductivity type substrate having highly doping concentration; a first type lightly doped region is arranged on the conductivity type substrate, wherein the conductivity type substrate and the first type lightly doped region respectively belong to opposite types; a first type heavily doped region and a second type heavily doped region are arranged in the first type lightly doped region, wherein the first and second type heavily doped regions and the conductivity type substrate belong to same types; and a deep first type heavily doped region is arranged on the conductivity type substrate and neighbors the first type lightly doped region, wherein the deep first type heavily doped region and the first type lightly doped region respectively belong to opposite types, and wherein the deep first type heavily doped region is coupled to the first type heavily doped region.

摘要翻译： 公开了一种用于保护电子设备的垂直瞬态电压抑制器。 垂直瞬变电压包括具有高掺杂浓度的导电型衬底; 导电型衬底上布置有第一类型轻掺杂区域，其中导电类型衬底和第一类型轻掺杂区域分别属于相反类型; 第一类型重掺杂区和第二类重掺杂区布置在第一类型轻掺杂区域中，其中第一和第二类型重掺杂区和导电类型衬底属于相同类型; 并且深度第一类型重掺杂区域布置在导电类型衬底上并且与第一类型轻掺杂区域相邻，其中深第一类型重掺杂区域和第一类型轻掺杂区域分别属于相反类型，并且其中深第一类型重掺杂区域 型重掺杂区域耦合到第一类型重掺杂区域。

公开(公告)号：US20120319179A1

公开(公告)日：2012-12-20

申请号：US13161519

申请日：2011-06-16

申请人： Hsin-Fu Huang ,  Zhi-Cheng Lee ,  Chi-Mao Hsu ,  Chin-Fu Lin ,  Kun-Hsien Lin ,  Tzung-Ying Lee ,  Min-Chuan Tsai

发明人： Hsin-Fu Huang ,  Zhi-Cheng Lee ,  Chi-Mao Hsu ,  Chin-Fu Lin ,  Kun-Hsien Lin ,  Tzung-Ying Lee ,  Min-Chuan Tsai

IPC分类号： H01L21/28 ,  H01L29/78

CPC分类号： H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A metal gate includes a substrate, a gate dielectric layer, a work function metal layer, an aluminum nitride layer and a stop layer. The gate dielectric layer is located on the substrate. The work function metal layer is located on the gate dielectric layer. The aluminum nitride layer is located on the work function metal layer. The stop layer is located on the aluminum nitride layer.

摘要翻译： 金属栅极包括基板，栅极电介质层，功函数金属层，氮化铝层和停止层。 栅介质层位于衬底上。 功函数金属层位于栅介质层上。 氮化铝层位于功函数金属层上。 阻挡层位于氮化铝层上。

公开(公告)号：US08304838B1

公开(公告)日：2012-11-06

申请号：US13216016

申请日：2011-08-23

申请人： Zi-Ping Chen ,  Tung-Yang Chen ,  Kun-Hsien Lin ,  Ryan Hsin-Chin Jiang

发明人： Zi-Ping Chen ,  Tung-Yang Chen ,  Kun-Hsien Lin ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L21/00

CPC分类号： H01L27/0255

摘要： An electrostatic discharge protection device structure is disclosed, which comprises a semiconductor substrate and an N-type epitaxial layer arranged on the semiconductor substrate. At least one snapback cascade structure is arranged in the N-type epitaxial layer, wherein the snapback cascade structure further comprises first and second P-type wells arranged in the N-type epitaxial layer. First and second heavily doped areas arranged in the first P-type well respectively belong to opposite types. And, third and fourth heavily doped areas arranged in the second P-type well respectively belong to opposite types, wherein the second and third heavily doped areas respectively belong to opposite types and are electrically connected with each other. When the first heavily doped area receives an ESD signal, an ESD current flows from the first heavily doped area to the fourth heavily doped area through the first P-type well, the N-type epitaxial layer, and the second P-type well.

摘要翻译： 公开了一种静电放电保护器件结构，其包括半导体衬底和布置在半导体衬底上的N型外延层。 在N型外延层中布置有至少一个快速反应级联结构，其中快速回退级联结构还包括布置在N型外延层中的第一和第二P型阱。 排列在第一P型井中的第一和第二重掺杂区域分别属于相反的类型。 并且，排列在第二P型阱中的第三和第四重掺杂区域分别属于相反的类型，其中第二和第三重掺杂区域分别属于相反的类型并且彼此电连接。 当第一重掺杂区域接收到ESD信号时，ESD电流通过第一P型阱，N型外延层和第二P型阱从第一重掺杂区流动到第四重掺杂区。

公开(公告)号：US20120256275A1

公开(公告)日：2012-10-11

申请号：US13081479

申请日：2011-04-06

申请人： Hsin-Fu Huang ,  Chi-Mao Hsu ,  Kun-Hsien Lin ,  Chin-Fu Lin ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Yi-Wei Chen ,  Bin-Siang Tsai ,  Ted Ming-Lang Guo ,  Ger-Pin Lin ,  Yu-Ling Liang ,  Yen-Ming Chen ,  Tsai-Yu Wen

发明人： Hsin-Fu Huang ,  Chi-Mao Hsu ,  Kun-Hsien Lin ,  Chin-Fu Lin ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Yi-Wei Chen ,  Bin-Siang Tsai ,  Ted Ming-Lang Guo ,  Ger-Pin Lin ,  Yu-Ling Liang ,  Yen-Ming Chen ,  Tsai-Yu Wen

IPC分类号： H01L29/772 ,  H01L21/283

CPC分类号： H01L21/823857 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833

摘要： A manufacturing method of a metal gate structure includes first providing a substrate having a dummy gate formed thereon. The dummy gate includes a high-K gate dielectric layer, a bottom barrier layer, a first etch stop layer and a sacrificial layer sequentially and upwardly stacked on the substrate. Then, the sacrificial layer is removed to form a gate trench with the first etch stop layer exposed on the bottom of the gate trench. After forming the gate trench, a first work function metal layer is formed in the gate trench.

摘要翻译： 金属栅极结构的制造方法包括首先提供其上形成有虚拟栅极的衬底。 虚拟栅极包括高K栅极电介质层，底部阻挡层，第一蚀刻停止层和依次且向上堆叠在基板上的牺牲层。 然后，去除牺牲层以形成栅极沟槽，其中第一蚀刻停止层暴露在栅极沟槽的底部。 在形成栅极沟槽之后，在栅极沟槽中形成第一功函数金属层。

公开(公告)号：US20120025350A1

公开(公告)日：2012-02-02

申请号：US12848531

申请日：2010-08-02

申请人： Kun-Hsien LIN ,  Zi-Ping CHEN ,  Che-Hao CHUANG ,  Ryan Hsin-Chin JIANG

发明人： Kun-Hsien LIN ,  Zi-Ping CHEN ,  Che-Hao CHUANG ,  Ryan Hsin-Chin JIANG

IPC分类号： H01L29/06

CPC分类号： H01L27/0259

摘要： A vertical transient voltage suppressor for protecting an electronic device is disclosed. The vertical transient voltage includes a conductivity type substrate having highly doping concentration; a first type lightly doped region is arranged on the conductivity type substrate, wherein the conductivity type substrate and the first type lightly doped region respectively belong to opposite types; a first type heavily doped region and a second type heavily doped region are arranged in the first type lightly doped region, wherein the first and second type heavily doped regions and the conductivity type substrate belong to same types; and a deep first type heavily doped region is arranged on the conductivity type substrate and neighbors the first type lightly doped region, wherein the deep first type heavily doped region and the first type lightly doped region respectively belong to opposite types, and wherein the deep first type heavily doped region is coupled to the first type heavily doped region.

摘要翻译： 公开了一种用于保护电子设备的垂直瞬态电压抑制器。 垂直瞬变电压包括具有高掺杂浓度的导电型衬底; 导电型衬底上布置有第一类型轻掺杂区域，其中导电类型衬底和第一类型轻掺杂区域分别属于相反类型; 第一类型重掺杂区和第二类重掺杂区布置在第一类型轻掺杂区域中，其中第一和第二类型重掺杂区和导电类型衬底属于相同类型; 并且深度第一类型重掺杂区域布置在导电类型衬底上并且与第一类型轻掺杂区域相邻，其中深第一类型重掺杂区域和第一类型轻掺杂区域分别属于相反类型，并且其中深第一类型重掺杂区域 型重掺杂区域耦合到第一类型重掺杂区域。

公开(公告)号：US07825473B2

公开(公告)日：2010-11-02

申请号：US11186086

申请日：2005-07-21

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H01L23/62

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

公开(公告)号：US20100155774A1

公开(公告)日：2010-06-24

申请号：US12342118

申请日：2008-12-23

申请人： Tang Kuei TSENG ,  Kun Hsien LIN ,  Hsin Chin JIANG

发明人： Tang Kuei TSENG ,  Kun Hsien LIN ,  Hsin Chin JIANG

IPC分类号： H01L29/747 ,  H01L21/332

CPC分类号： H01L29/87

摘要： A bidirectional transient voltage suppression device is disclosed. The bi-directional transient voltage suppression device comprises a semiconductor die. The semiconductor die has a multi-layer structure comprising a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type, an epitaxial layer, and five diffused regions. The buried layer and the semiconductor substrate form a first semiconductor junction. The first diffused region of the second conductivity type and the semiconductor substrate form a second semiconductor junction. The fourth diffused region of the first conductivity type and the third diffused region of the second conductivity type form a third semiconductor junction. The fifth diffused region of the first conductivity type and the second diffused region of the second conductivity type form a fourth semiconductor junction.

摘要翻译： 公开了一种双向瞬态电压抑制装置。 双向瞬态电压抑制装置包括半导体管芯。 半导体管芯具有包括第一导电类型的半导体衬底，第二导电类型的掩埋层，外延层和五个扩散区域的多层结构。 掩埋层和半导体衬底形成第一半导体结。 第二导电类型的第一扩散区域和半导体衬底形成第二半导体结。 第一导电类型的第四扩散区域和第二导电类型的第三扩散区域形成第三半导体结。 第一导电类型的第五扩散区域和第二导电类型的第二扩散区域形成第四半导体结。

公开(公告)号：US09490342B2

公开(公告)日：2016-11-08

申请号：US13161591

申请日：2011-06-16

申请人： Chien-Ming Lai ,  Yi-Wen Chen ,  Zhi-Cheng Lee ,  Tong-Jyun Huang ,  Che-Hua Hsu ,  Kun-Hsien Lin ,  Tzung-Ying Lee ,  Chi-Mao Hsu ,  Hsin-Fu Huang ,  Chin-Fu Lin

发明人： Chien-Ming Lai ,  Yi-Wen Chen ,  Zhi-Cheng Lee ,  Tong-Jyun Huang ,  Che-Hua Hsu ,  Kun-Hsien Lin ,  Tzung-Ying Lee ,  Chi-Mao Hsu ,  Hsin-Fu Huang ,  Chin-Fu Lin

IPC分类号： H01L21/3205 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/6659 ,  H01L21/28088 ,  H01L21/32134 ,  H01L21/823842 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7833

摘要： A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening.

摘要翻译： 一种制造半导体器件的方法包括以下步骤。 首先，提供具有伪栅极电极层的虚拟栅极结构。 然后，去除虚拟栅极电极层，以在虚拟栅极结构中形成开口，从而暴露在伪栅极电极层下面的下面的层。 然后，进行氢氧化铵处理处理以处理伪栅极结构。 之后，将金属材料填充到开口中。