公开(公告)号：US07612701B2

公开(公告)日：2009-11-03

申请号：US12323640

申请日：2008-11-26

Applicant: Taehee Cho ,  Sandor L. Barna ,  Andrew M. Lever ,  Kwang-Bo Cho ,  Chiajen Lee

Inventor： Taehee Cho ,  Sandor L. Barna ,  Andrew M. Lever ,  Kwang-Bo Cho ,  Chiajen Lee

IPC: H03M1/44

CPC classification number: H03M1/0607 ,  H03M1/0695 ,  H03M1/1225 ,  H03M1/442

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract translation: 在级/通道的放大器配置之前，在流水线模数转换器的两个级和/或两个信道处理电路之间共享的运算放大器的输入端放电寄生电容的机构被切换 。 当在两个时钟相位之间产生短暂的复位脉冲时，会发生放电动作。 短复位脉冲施加到连接到运算放大器输入的开关。 当复位脉冲闭合开关时，产生放电路径，运算放大器输入端的任何寄生电容通过路径放电。 寄生电容的放电大大减轻了存储器效应和与存储器效应相关的问题。

公开(公告)号：US07573516B2

公开(公告)日：2009-08-11

申请号：US10958592

申请日：2004-10-06

Applicant: Alexander I. Krymski ,  Kwang-Bo Cho

Inventor： Alexander I. Krymski ,  Kwang-Bo Cho

IPC: H04N5/335 ,  G03B7/00

CPC classification number: H04N5/3532 ,  H04N5/2353 ,  H04N5/3745 ,  H04N5/3765

Abstract: A shutter system for a pixel array is disclosed. The system includes a read shift register, first and second reset shift registers, and a plurality of logic gates. The read shift register is configured to sequentially count rows of the pixel array from top to bottom, such that the read shift register generates a read pointer. The first reset shift register is configured to sequentially reset rows of the pixel array from top to bottom. The first reset shift register provides a first reset pointer for allowing reset of pixels in a row indicated by the first reset pointer. The first reset pointer allows reset of pixels prior to reading of the pixels in a row indicated by the read pointer. The time difference between the first reset pointer and the read pointer indicates an exposure time. The second reset shift register is configured to provide a second reset pointer, which enables the first reset shift register to sequentially reset rows of the pixel array without generating any flashes when the exposure time is increased. The plurality of logic gates direct outputs of the read shift register and the first and second reset shift registers to each pixel in the pixel array.

Abstract translation: 公开了一种用于像素阵列的快门系统。 该系统包括读移位寄存器，第一和第二复位移位寄存器以及多个逻辑门。 读移位寄存器被配置为从上到下顺序地计数像素阵列的行，使得读移位寄存器生成读指针。 第一复位移位寄存器被配置为从顶部到底部依次重置像素阵列的行。 第一复位移位寄存器提供第一复位指针，用于允许由第一复位指针指示的行中的像素复位。 第一个复位指针允许在读取指针所指示的行中的像素之前复位像素。 第一复位指针和读指针之间的时间差表示曝光时间。 第二复位移位寄存器被配置为提供第二复位指针，其使第一复位移位寄存器能够在曝光时间增加时顺序地复位像素阵列的行，而不产生任何闪烁。 多个逻辑门将读取的移位寄存器和第一和第二复位移位寄存器的输出直接引导到像素阵列中的每个像素。

公开(公告)号：US07471228B2

公开(公告)日：2008-12-30

申请号：US11604901

申请日：2006-11-28

Applicant: Taehee Cho ,  Sandor L. Barna ,  Andrew M. Lever ,  Kwang-Bo Cho ,  Chiajen Lee

Inventor： Taehee Cho ,  Sandor L. Barna ,  Andrew M. Lever ,  Kwang-Bo Cho ,  Chiajen Lee

IPC: H03M1/42

CPC classification number: H03M1/0607 ,  H03M1/0695 ,  H03M1/1225 ,  H03M1/442

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract translation: 在级/通道的放大器配置之前，在流水线模数转换器的两个级和/或两个信道处理电路之间共享的运算放大器的输入端放电寄生电容的机构被切换 。 当在两个时钟相位之间产生短暂的复位脉冲时，会发生放电动作。 短复位脉冲施加到连接到运算放大器输入的开关。 当复位脉冲闭合开关时，产生放电路径，运算放大器输入端的任何寄生电容通过路径放电。 寄生电容的放电大大减轻了存储器效应和与存储器效应相关的问题。

公开(公告)号：US07382407B2

公开(公告)日：2008-06-03

申请号：US10230205

申请日：2002-08-29

Applicant: Kwang-Bo Cho ,  Igor Subbotin ,  Michael Kaplinsky ,  Sandor L. Barna ,  Gary E. Slayton

Inventor： Kwang-Bo Cho ,  Igor Subbotin ,  Michael Kaplinsky ,  Sandor L. Barna ,  Gary E. Slayton

IPC: H04N5/335

CPC classification number: H04N5/2355 ,  H04N5/235 ,  H04N5/35554 ,  H04N5/3575 ,  H04N5/378

Abstract: The invention provides a new method and apparatus for NTSC and PAL image sensors which employs fusion of adjacent row pixel charge samples to generate image data for a row. A variety of fusion schemes are possible for fusing the pixel signals from the adjacent rows. The rows of pixels are scanned so that each scan takes an odd row signal sample and, in some cases, an adjacent even row signal sample when specified conditions are met. One sampled row of the two adjacent rows integrate an image with a first integration period while the other adjacent row integrates an image with a second integration period.

Abstract translation: 本发明提供了一种用于NTSC和PAL图像传感器的新方法和装置，其使用相邻行像素电荷样本的融合来生成行的图像数据。 各种融合方案可以用于融合来自相邻行的像素信号。 扫描像素行，使得当满足特定条件时，每个扫描采取奇数行信号采样，并且在一些情况下，采用相邻偶数行信号采样。 两个相邻行的一个采样行将第一积分周期的图像整合，而另一个相邻行将图像与第二积分周期相集成。

公开(公告)号：US07317480B1

公开(公告)日：2008-01-08

申请号：US10000660

申请日：2001-10-30

Applicant: Kwang-Bo Cho ,  Michael Kaplinsky ,  Sandor L. Barna ,  Zeynep Toros ,  Igor Subbotin

Inventor： Kwang-Bo Cho ,  Michael Kaplinsky ,  Sandor L. Barna ,  Zeynep Toros ,  Igor Subbotin

IPC: H04N5/217 ,  H04N9/64 ,  H03M1/12

CPC classification number: H03M1/1019 ,  H03M1/1215 ,  H03M1/46 ,  H04N5/361 ,  H04N5/374 ,  H04N9/045

Abstract: Image sensor with a successive approximation A/D converter that automatically compensates for black level and provides a signal indicative of the difference between the reset level and the signal level. Black level for each of a plurality of color pixels may be obtained. This may be obtained from, for example, an image sensor with intentionally darkened pixels. Levels from these pixels are sampled, and an average of these pixels is used to form a black level for similarly-colored pixels. That black level is stored, and used to drive a D/A converter. Another D/A converter forms the actual conversion, and is compared to a reference. The reference is selected such that the output signal is automatically compensated for black level, and also corresponds to the difference between signal and reset.

Abstract translation: 具有逐次逼近A / D转换器的图像传感器，其自动补偿黑电平并提供指示复位电平和信号电平之间的差异的信号。 可以获得多个彩色像素中的每一个的黑色电平。 这可以从例如具有有意变暗的像素的图像传感器获得。 对这些像素的电平进行采样，并且使用这些像素的平均来形成用于类似彩色像素的黑色电平。 存储黑色电平，并用于驱动D / A转换器。 另一个D / A转换器形成实际转换，并与参考进行比较。 选择参考，使得输出信号自动补偿黑电平，并且也对应于信号和复位之间的差异。

公开(公告)号：US20070195183A1

公开(公告)日：2007-08-23

申请号：US11785546

申请日：2007-04-18

Applicant: Ilia Ovsiannikov ,  Kwang-Bo Cho ,  Michael Kaplinsky

Inventor： Ilia Ovsiannikov ,  Kwang-Bo Cho ,  Michael Kaplinsky

IPC: H04N5/335

CPC classification number: H04N5/35509

Abstract: An apparatus and method for measuring the breakpoint of a response curve representing the voltage output of an image array having an extended dynamic range. By flooding a light-opaque pixel with a charge and then applying an intermediate reset voltage to the pixel, the signal is read from the pixel and stored. The full reset voltage is applied to the pixel, and then the signal in the pixel is read and stored. The voltage output difference is the difference between the first and second stored signal. The voltage output difference is then used to determine the voltage of the knee point. Further, a conventional saturated pixel can be reset with an intermediate reset just prior to readout. The resulting signal can then be used to determine the voltage of the knee point.

Abstract translation: 一种用于测量表示具有扩展动态范围的图像阵列的电压输出的响应曲线的断点的装置和方法。 通过用充电填充不透明的像素，然后对像素施加中间复位电压，从像素读取信号并存储。 将全部复位电压施加到像素，然后读取并存储像素中的信号。 电压输出差是第一和第二存储信号之间的差。 然后使用电压输出差异来确定拐点的电压。 此外，传统的饱和像素可以在读出之前用中间复位来复位。 然后可以使用所得到的信号来确定拐点的电压。

公开(公告)号：US20070045677A1

公开(公告)日：2007-03-01

申请号：US11208782

申请日：2005-08-23

Applicant: Chiajen Lee ,  Kwang-Bo Cho

Inventor： Chiajen Lee ,  Kwang-Bo Cho

IPC: H01L31/113

CPC classification number: H04N5/378 ,  H04N5/3415 ,  H04N5/3653 ,  H04N5/3742

Abstract: An imaging device with readout chain circuitry that uses multiple analog-to-digital converters and amplifiers, which are similarly calibrated using a stitching technique, to readout each color of a column and mitigate the possibility of a boundary effect.

Abstract translation: 具有读出链电路的成像装置，其使用多个模拟 - 数字转换器和放大器，其使用拼接技术类似地校准，以读出列的每种颜色并减轻边界效应的可能性。

公开(公告)号：US07148833B1

公开(公告)日：2006-12-12

申请号：US11211566

申请日：2005-08-26

Applicant: Taehee Cho ,  Sandor L. Barna ,  Andrew M. Lever ,  Kwang-Bo Cho ,  Chiajen Lee

Inventor： Taehee Cho ,  Sandor L. Barna ,  Andrew M. Lever ,  Kwang-Bo Cho ,  Chiajen Lee

IPC: H03M1/44

CPC classification number: H03M1/0607 ,  H03M1/0695 ,  H03M1/1225 ,  H03M1/442

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

公开(公告)号：US20060197857A1

公开(公告)日：2006-09-07

申请号：US11418268

申请日：2006-05-05

Applicant: Sandor Barna ,  Guiseppe Rossi ,  Kwang-Bo Cho ,  Roger Panicacci

Inventor： Sandor Barna ,  Guiseppe Rossi ,  Kwang-Bo Cho ,  Roger Panicacci

IPC: H04N5/335

CPC classification number: H04N5/23241 ,  H04N5/374 ,  H04N5/378

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

公开(公告)号：US20060006915A1

公开(公告)日：2006-01-12

申请号：US10887891

申请日：2004-07-12

Applicant: Hai Yan ,  Chiajen Lee ,  Geetanjali Asuri ,  Tien-Min Miao ,  Siri Eikedal ,  Christopher Zeleznik ,  Kwang-Bo Cho ,  Gennadiy Agranov

Inventor： Hai Yan ,  Chiajen Lee ,  Geetanjali Asuri ,  Tien-Min Miao ,  Siri Eikedal ,  Christopher Zeleznik ,  Kwang-Bo Cho ,  Gennadiy Agranov

IPC: H03K3/017

CPC classification number: H04N5/3597 ,  H03K17/164 ,  H04N5/3765

Abstract: An imager with a slew rate control circuit that uses multiple digital control signals to control the rising and falling slew rates of boosted signals, such as transistor gate signals, and/or supply voltages used by an imager or other device. By using digital signals, the invention provides slew rate control that is less affected by power supply, temperature and process variations.

Abstract translation: 具有压摆率控制电路的成像器使用多个数字控制信号来控制诸如晶体管栅极信号的升压和降压转换速率和/或由成像器或其它器件使用的电源电压。 通过使用数字信号，本发明提供了受电源，温度和工艺变化影响较小的压摆率控制。