公开(公告)号：US10886126B2

公开(公告)日：2021-01-05

申请号：US13225135

申请日：2011-09-02

申请人： Zhaohui Zhong ,  Seunghyun Lee ,  Kyunghoon Lee

发明人： Zhaohui Zhong ,  Seunghyun Lee ,  Kyunghoon Lee

IPC分类号： B32B9/00 ,  H01L21/02 ,  C23C16/26 ,  C23C16/455 ,  B82Y40/00 ,  C23C16/02 ,  B82Y30/00 ,  C01B32/184 ,  C01B32/186

摘要： A method of producing uniform multilayer graphene by chemical vapor deposition (CVD) is provided. The method is limited in size only by CVD reaction chamber size and is scalable to produce multilayer graphene films on a wafer scale that have the same number of layers of graphene throughout substantially the entire film. Uniform bilayer graphene may be produced using a method that does not require assembly of independently produced single layer graphene. The method includes a CVD process wherein a reaction gas is flowed in the chamber at a relatively low pressure compared to conventional processes and the temperature in the reaction chamber is thereafter decreased relatively slowly compared to conventional processes. One application for uniform multilayer graphene is transparent conductors. In processes that require multiple transfers of single layer graphene to achieve multilayer graphene structures, the disclosed method can reduce the number of process steps by at least half.

公开(公告)号：US08816623B2

公开(公告)日：2014-08-26

申请号：US13092032

申请日：2011-04-21

申请人： Mingi Kim ,  Jongwon Heo ,  Kyunghoon Lee

发明人： Mingi Kim ,  Jongwon Heo ,  Kyunghoon Lee

IPC分类号： H02K29/06 ,  H02P6/00 ,  H02P27/08 ,  H02P23/00

CPC分类号： H02P27/08 ,  H02P23/0077

摘要： Disclosed herein is a motor control apparatus and a method thereof. The operation efficiency of a compressor may be maintained by using a sensorless algorithm, sampling a current applied to a motor more than twice within a period of the triangular carrier wave for performing pulse width modulation to calculate a reference voltage, driving the motor according to the calculated reference voltage to improve control resolution, and performing a high-speed operation while reducing a volume of the compressor, without adding a separate hardware when controlling the operation of the motor provided in the compressor at a high speed.

摘要翻译： 这里公开了一种马达控制装置及其方法。 可以通过使用无传感器算法来维持压缩机的操作效率，在三角载波的周期内对施加到电动机的电流进行两次以上的采样以进行脉宽调制以计算参考电压，根据 计算出的参考电压以提高控制分辨率，并且在减小压缩机的体积的同时执行高速操作，而不是在高速控制设置在压缩机中的电动机的操作时增加单独的硬件。

公开(公告)号：US20130320519A1

公开(公告)日：2013-12-05

申请号：US13488029

申请日：2012-06-04

申请人： MinJung Kim ,  KyungHoon Lee ,  JoungIn Yang ,  WonIl Kwon ,  DaeSik Choi

发明人： MinJung Kim ,  KyungHoon Lee ,  JoungIn Yang ,  WonIl Kwon ,  DaeSik Choi

IPC分类号： H01L21/78 ,  H01L23/48

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3171 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device has a semiconductor wafer with an interconnect structure formed over a first surface of the wafer. A trench is formed in a non-active area of the semiconductor wafer from the first surface partially through the semiconductor wafer. A protective coating is formed over the first surface and into the trench. A lamination tape is applied over the protective coating. A portion of a second surface of the semiconductor wafer is removed by backgrinding or wafer thinning to expose the protecting coating in the trench. A die attach film is applied over the second surface of the semiconductor wafer. A cut or modified region is formed in the die attach film under the trench using a laser. The semiconductor wafer is expanded to separate the cut or modified region of the die attach film and singulate the semiconductor wafer.

摘要翻译： 半导体器件具有形成在晶片的第一表面上的互连结构的半导体晶片。 在半导体晶片的非有源区域中，部分地通过半导体晶片从第一表面形成沟槽。 在第一表面和沟槽中形成保护涂层。 在保护涂层上涂覆层压胶带。 半导体晶片的第二表面的一部分通过背面研磨或晶片变薄去除以暴露沟槽中的保护涂层。 将芯片附着膜施加在半导体晶片的第二表面上。 使用激光在沟槽下的管芯附着膜中形成切割或改性区域。 半导体晶片被扩展以分离芯片附着膜的切割或改性区域并使半导体晶片分离。

公开(公告)号：US20120126395A1

公开(公告)日：2012-05-24

申请号：US12949396

申请日：2010-11-18

申请人： KyungHoon Lee ,  Soo Moon Park ,  SeungWon Kim

发明人： KyungHoon Lee ,  Soo Moon Park ,  SeungWon Kim

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L23/3121 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/10165 ,  H01L2224/1308 ,  H01L2224/16225 ,  H01L2224/8114 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81805

摘要： A semiconductor device has an interposer frame having a die attach area. A uniform height insulating layer is formed over the interposer frame at corners of the die attach area. The insulating layer can be formed as rectangular or circular pillars at the corners of the die attach area. The insulating layer can also be formed in a central region of the die attach area. A semiconductor die has a plurality of bumps formed over an active surface of the semiconductor die. The bumps can have a non-fusible portion and fusible portion. The semiconductor die is mounted over the insulating layer which provides a uniform standoff distance between the semiconductor die and interposer frame. The bumps of the semiconductor die are bonded to the interposer frame. An encapsulant is deposited over the semiconductor die and interposer frame and between the semiconductor die and interposer frame.

摘要翻译： 半导体器件具有具有管芯附着区域的插入器框架。 在芯片安装区域的角部，在插入器框架上形成均匀的高度绝缘层。 绝缘层可以在芯片安装区域的角部处形成为矩形或圆形的支柱。 绝缘层也可以形成在芯片附着区域的中心区域中。 半导体管芯具有形成在半导体管芯的有源表面上的多个凸点。 凸块可以具有不可熔部分和易熔部分。 半导体管芯安装在绝缘层上，其在半导体管芯和内插器框架之间提供均匀的间隔距离。 半导体管芯的凸点接合到插入器框架。 密封剂沉积在半导体管芯和内插器框架之间以及半导体管芯和内插器框架之间。

公开(公告)号：US20100320587A1

公开(公告)日：2010-12-23

申请号：US12489122

申请日：2009-06-22

申请人： KyungHoon Lee ,  DaeWook Yang ,  SunMi Kim

发明人： KyungHoon Lee ,  DaeWook Yang ,  SunMi Kim

IPC分类号： H01L23/50 ,  H01L21/56

CPC分类号： H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83365 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a device having a conductor with ends exposed on opposite sides of the device; forming a first surface depression on the device around the conductor; connecting a first component over the conductor and surrounded by the first surface depression; and applying a first underfill between the first component and the device, the first underfill substantially filled within a perimeter of the first surface depression.

摘要翻译： 一种制造集成电路封装系统的方法，包括：提供具有导体的器件，端子暴露在器件的相对两侧; 在导体周围的器件上形成第一表面凹陷; 将第一部件连接在导体上并被第一表面凹陷包围; 以及在所述第一部件和所述装置之间施加第一底部填充物，所述第一底部填充物基本上填充在所述第一表面凹陷的周边内。

公开(公告)号：US20090321907A1

公开(公告)日：2009-12-31

申请号：US12146135

申请日：2008-06-25

申请人： KyungHoon Lee ,  Oh Han Kim

发明人： KyungHoon Lee ,  Oh Han Kim

IPC分类号： H01L23/48 ,  H01L21/58

CPC分类号： H01L23/315 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/48 ,  H01L24/83 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked integrated circuit package system includes: forming a recessed integrated circuit package system having a first encapsulation over a first integrated circuit and an interior cavity in the first encapsulation; forming a mountable integrated circuit package system having a second integrated circuit over a carrier; and mounting the recessed integrated circuit package system over the mountable integrated circuit package system with the second integrated circuit within the interior cavity and the first integrated circuit coupled with the carrier.

摘要翻译： 堆叠集成电路封装系统包括：形成在第一封装中的第一集成电路和内腔上具有第一封装的凹陷集成电路封装系统; 形成具有载体上的第二集成电路的可安装的集成电路封装系统; 以及将所述凹陷集成电路封装系统安装在所述可安装集成电路封装系统上，其中所述第二集成电路在所述内部空腔内，所述第一集成电路与所述载体耦合。

公开(公告)号：US09390945B2

公开(公告)日：2016-07-12

申请号：US13466945

申请日：2012-05-08

申请人： KyungHoon Lee ,  JoungIn Yang ,  Sang Mi Park ,  DaeSik Choi ,  YiSu Park

发明人： KyungHoon Lee ,  JoungIn Yang ,  Sang Mi Park ,  DaeSik Choi ,  YiSu Park

IPC分类号： H01L21/00 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L21/563 ,  H01L24/16 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00

摘要： A semiconductor device has a substrate and insulating layer formed over a surface of the substrate. A first conductive layer is formed over the surface of the substrate. A second conductive layer is formed over an opposing surface of the substrate. A conductive via is formed through the substrate. An opening is formed in the insulating layer while leaving the first conductive layer intact. The opening narrows with a non-linear side or linear side. The opening can have a rectangular shape. A semiconductor die is mounted over the surface of the substrate. An underfill material is deposited between the semiconductor die and substrate. The opening in the insulating layer reduces a flow rate of the underfill material proximate to the opening. The flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening.

摘要翻译： 半导体器件具有在衬底的表面上形成的衬底和绝缘层。 在衬底的表面上形成第一导电层。 在衬底的相对表面上形成第二导电层。 通过衬底形成导电通孔。 在绝缘层中形成开口，同时使第一导电层完好无损。 开口以非线性侧面或线性侧面变窄。 开口可以具有矩形形状。 半导体管芯安装在衬底的表面上。 在半导体管芯和衬底之间沉积底部填充材料。 绝缘层中的开口减小靠近开口的底部填充材料的流速。 靠近开口的底部填充材料的流速基本上等于底部填充材料远离开口的流速。

公开(公告)号：US09293349B2

公开(公告)日：2016-03-22

申请号：US13569088

申请日：2012-08-07

申请人： OhHan Kim ,  SunMi Kim ,  KyungHoon Lee

发明人： OhHan Kim ,  SunMi Kim ,  KyungHoon Lee

IPC分类号： H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00

CPC分类号： H01L23/60 ,  H01L21/561 ,  H01L21/563 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/552 ,  H01L24/97 ,  H01L2224/05026 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device includes a multi-layer substrate. A ground shield is disposed between layers of the substrate and electrically connected to a ground point. A plurality of semiconductor die is mounted to the substrate over the ground shield. The ground shield extends beyond a footprint of the plurality of semiconductor die. An encapsulant is formed over the plurality of semiconductor die and substrate. Dicing channels are formed in the encapsulant, between the plurality of semiconductor die, and over the ground shield. A plurality of metal-filled holes is formed along the dicing channels, and extends into the substrate and through the ground shield. A top shield is formed over the plurality of semiconductor die and electrically and mechanically connects to the ground shield through the metal-filled holes. The top and ground shields are configured to block electromagnetic interference generated with respect to an integrated passive device disposed in the semiconductor die.

摘要翻译： 半导体器件包括多层衬底。 接地屏蔽层设置在基板的层之间并且电连接到接地点。 多个半导体管芯通过接地屏蔽件安装到衬底上。 接地护罩延伸超过多个半导体管芯的覆盖区。 在多个半导体管芯和衬底上形成密封剂。 切割通道形成在密封剂中，在多个半导体管芯之间，并在接地屏蔽层之上。 沿着切割通道形成多个金属填充的孔，并延伸到基板中并通过接地屏蔽。 在多个半导体管芯上形成顶部屏蔽，并通过金属填充的孔电连接和机械地连接到接地屏蔽层。 顶部和接地屏蔽被配置为阻止相对于设置在半导体管芯中的集成无源器件产生的电磁干扰。

公开(公告)号：US09202715B2

公开(公告)日：2015-12-01

申请号：US13298267

申请日：2011-11-16

申请人： YoungChul Kim ,  KyungHoon Lee ,  Seong Won Park ,  Ki Youn Jang ,  JaeHyun Lee ,  DeokKyung Yang ,  In Sang Yoon ,  SungEun Park

发明人： YoungChul Kim ,  KyungHoon Lee ,  Seong Won Park ,  Ki Youn Jang ,  JaeHyun Lee ,  DeokKyung Yang ,  In Sang Yoon ,  SungEun Park

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L25/10

CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching a connection post to the substrate, the connection post having a post top and a post side; mounting an integrated circuit die on the substrate, the integrated circuit die having a top die surface; and forming a package body on the substrate, the connection post, and the integrated circuit die.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供基板; 将连接柱附接到所述基板，所述连接柱具有柱顶和柱侧; 在基板上安装集成电路管芯，集成电路管芯具有顶部管芯表面; 以及在所述基板，所述连接柱和所述集成电路管芯上形成封装体。

公开(公告)号：US09053953B1

公开(公告)日：2015-06-09

申请号：US13842305

申请日：2013-03-15

申请人： KyungHoon Lee ,  DaeWook Yang ,  SunMi Kim

发明人： KyungHoon Lee ,  DaeWook Yang ,  SunMi Kim

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83365 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： An integrated circuit packaging system, and a method of manufacture thereof, including: a device formed as a die having a conductor with ends exposed on opposite sides of the die; a first surface depression on the device, the first surface depression surrounding one of the ends of the conductor exposed at a stack side of the die; a first component over and connected to the conductor, the first component surrounded by the first surface depression; and a first underfill between and in direct contact with the first component and the device, the first underfill substantially filled to a side of an inner edge and within a perimeter of the first surface depression isolated from the conductor.

摘要翻译： 一种集成电路封装系统及其制造方法，包括：形成为芯片的器件，具有导体，所述导体的端部暴露在所述管芯的相对侧上; 所述器件上的第一表面凹陷，围绕在所述管芯的堆叠侧暴露的所述导体的端部之一的所述第一表面凹陷; 所述第一部件在所述导体之上并连接到所述导体，所述第一部件被所述第一表面凹陷包围; 以及与第一部件和装置直接接触并且与第一部件和装置直接接触的第一底部填充物，第一底部填充物基本上填充到内部边缘的一侧并且在与导体隔离的第一表面凹部的周边内。